1250c2277SThomas Gleixner/* 25b171e82SAlexander Kuleshov * linux/arch/x86/kernel/head_64.S -- start in 32bit and switch to 64bit 3250c2277SThomas Gleixner * 4250c2277SThomas Gleixner * Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE 5250c2277SThomas Gleixner * Copyright (C) 2000 Pavel Machek <pavel@suse.cz> 6250c2277SThomas Gleixner * Copyright (C) 2000 Karsten Keil <kkeil@suse.de> 7250c2277SThomas Gleixner * Copyright (C) 2001,2002 Andi Kleen <ak@suse.de> 8250c2277SThomas Gleixner * Copyright (C) 2005 Eric Biederman <ebiederm@xmission.com> 9250c2277SThomas Gleixner */ 10250c2277SThomas Gleixner 11250c2277SThomas Gleixner 12250c2277SThomas Gleixner#include <linux/linkage.h> 13250c2277SThomas Gleixner#include <linux/threads.h> 14250c2277SThomas Gleixner#include <linux/init.h> 15250c2277SThomas Gleixner#include <asm/segment.h> 16250c2277SThomas Gleixner#include <asm/pgtable.h> 17250c2277SThomas Gleixner#include <asm/page.h> 18250c2277SThomas Gleixner#include <asm/msr.h> 19250c2277SThomas Gleixner#include <asm/cache.h> 20369101daSCyrill Gorcunov#include <asm/processor-flags.h> 21b12d8db8STejun Heo#include <asm/percpu.h> 229900aa2fSH. Peter Anvin#include <asm/nops.h> 23250c2277SThomas Gleixner 2449a69787SGlauber de Oliveira Costa#ifdef CONFIG_PARAVIRT 2549a69787SGlauber de Oliveira Costa#include <asm/asm-offsets.h> 2649a69787SGlauber de Oliveira Costa#include <asm/paravirt.h> 27ffc4bc9cSH. Peter Anvin#define GET_CR2_INTO(reg) GET_CR2_INTO_RAX ; movq %rax, reg 2849a69787SGlauber de Oliveira Costa#else 29ffc4bc9cSH. Peter Anvin#define GET_CR2_INTO(reg) movq %cr2, reg 309900aa2fSH. Peter Anvin#define INTERRUPT_RETURN iretq 3149a69787SGlauber de Oliveira Costa#endif 3249a69787SGlauber de Oliveira Costa 333ad2f3fbSDaniel Mack/* we are not able to switch in one step to the final KERNEL ADDRESS SPACE 34250c2277SThomas Gleixner * because we need identity-mapped pages. 35250c2277SThomas Gleixner * 36250c2277SThomas Gleixner */ 37250c2277SThomas Gleixner 38a6523748SEduardo Habkost#define pud_index(x) (((x) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) 39a6523748SEduardo Habkost 40a6523748SEduardo HabkostL4_PAGE_OFFSET = pgd_index(__PAGE_OFFSET) 41a6523748SEduardo HabkostL3_PAGE_OFFSET = pud_index(__PAGE_OFFSET) 42a6523748SEduardo HabkostL4_START_KERNEL = pgd_index(__START_KERNEL_map) 43a6523748SEduardo HabkostL3_START_KERNEL = pud_index(__START_KERNEL_map) 44a6523748SEduardo Habkost 45250c2277SThomas Gleixner .text 464ae59b91STim Abbott __HEAD 47250c2277SThomas Gleixner .code64 48250c2277SThomas Gleixner .globl startup_64 49250c2277SThomas Gleixnerstartup_64: 50250c2277SThomas Gleixner /* 511256276cSKonrad Rzeszutek Wilk * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0, 52250c2277SThomas Gleixner * and someone has loaded an identity mapped page table 53250c2277SThomas Gleixner * for us. These identity mapped page tables map all of the 54250c2277SThomas Gleixner * kernel pages and possibly all of memory. 55250c2277SThomas Gleixner * 568170e6beSH. Peter Anvin * %rsi holds a physical pointer to real_mode_data. 57250c2277SThomas Gleixner * 58250c2277SThomas Gleixner * We come here either directly from a 64bit bootloader, or from 595b171e82SAlexander Kuleshov * arch/x86/boot/compressed/head_64.S. 60250c2277SThomas Gleixner * 61250c2277SThomas Gleixner * We only come here initially at boot nothing else comes here. 62250c2277SThomas Gleixner * 63250c2277SThomas Gleixner * Since we may be loaded at an address different from what we were 64250c2277SThomas Gleixner * compiled to run at we first fixup the physical addresses in our page 65250c2277SThomas Gleixner * tables and then reload them. 66250c2277SThomas Gleixner */ 67250c2277SThomas Gleixner 6804633df0SBorislav Petkov /* Sanitize CPU configuration */ 6904633df0SBorislav Petkov call verify_cpu 7004633df0SBorislav Petkov 718170e6beSH. Peter Anvin /* 728170e6beSH. Peter Anvin * Compute the delta between the address I am compiled to run at and the 73250c2277SThomas Gleixner * address I am actually running at. 74250c2277SThomas Gleixner */ 75250c2277SThomas Gleixner leaq _text(%rip), %rbp 76250c2277SThomas Gleixner subq $_text - __START_KERNEL_map, %rbp 77250c2277SThomas Gleixner 78250c2277SThomas Gleixner /* Is the address not 2M aligned? */ 79a4733143SAlexander Kuleshov testl $~PMD_PAGE_MASK, %ebp 80250c2277SThomas Gleixner jnz bad_address 81250c2277SThomas Gleixner 828170e6beSH. Peter Anvin /* 838170e6beSH. Peter Anvin * Is the address too large? 84250c2277SThomas Gleixner */ 858170e6beSH. Peter Anvin leaq _text(%rip), %rax 868170e6beSH. Peter Anvin shrq $MAX_PHYSMEM_BITS, %rax 878170e6beSH. Peter Anvin jnz bad_address 88250c2277SThomas Gleixner 898170e6beSH. Peter Anvin /* 908170e6beSH. Peter Anvin * Fixup the physical addresses in the page table 918170e6beSH. Peter Anvin */ 928170e6beSH. Peter Anvin addq %rbp, early_level4_pgt + (L4_START_KERNEL*8)(%rip) 93250c2277SThomas Gleixner 94250c2277SThomas Gleixner addq %rbp, level3_kernel_pgt + (510*8)(%rip) 95250c2277SThomas Gleixner addq %rbp, level3_kernel_pgt + (511*8)(%rip) 96250c2277SThomas Gleixner 97250c2277SThomas Gleixner addq %rbp, level2_fixmap_pgt + (506*8)(%rip) 98250c2277SThomas Gleixner 998170e6beSH. Peter Anvin /* 1008170e6beSH. Peter Anvin * Set up the identity mapping for the switchover. These 1018170e6beSH. Peter Anvin * entries should *NOT* have the global bit set! This also 1028170e6beSH. Peter Anvin * creates a bunch of nonsense entries but that is fine -- 1038170e6beSH. Peter Anvin * it avoids problems around wraparound. 1048170e6beSH. Peter Anvin */ 105250c2277SThomas Gleixner leaq _text(%rip), %rdi 1068170e6beSH. Peter Anvin leaq early_level4_pgt(%rip), %rbx 107250c2277SThomas Gleixner 108250c2277SThomas Gleixner movq %rdi, %rax 1098170e6beSH. Peter Anvin shrq $PGDIR_SHIFT, %rax 1108170e6beSH. Peter Anvin 1118170e6beSH. Peter Anvin leaq (4096 + _KERNPG_TABLE)(%rbx), %rdx 1128170e6beSH. Peter Anvin movq %rdx, 0(%rbx,%rax,8) 1138170e6beSH. Peter Anvin movq %rdx, 8(%rbx,%rax,8) 1148170e6beSH. Peter Anvin 1158170e6beSH. Peter Anvin addq $4096, %rdx 1168170e6beSH. Peter Anvin movq %rdi, %rax 117250c2277SThomas Gleixner shrq $PUD_SHIFT, %rax 1188170e6beSH. Peter Anvin andl $(PTRS_PER_PUD-1), %eax 119e9d0626eSZhang Yanfei movq %rdx, 4096(%rbx,%rax,8) 120e9d0626eSZhang Yanfei incl %eax 121e9d0626eSZhang Yanfei andl $(PTRS_PER_PUD-1), %eax 122e9d0626eSZhang Yanfei movq %rdx, 4096(%rbx,%rax,8) 123250c2277SThomas Gleixner 1248170e6beSH. Peter Anvin addq $8192, %rbx 125250c2277SThomas Gleixner movq %rdi, %rax 1268170e6beSH. Peter Anvin shrq $PMD_SHIFT, %rdi 1278170e6beSH. Peter Anvin addq $(__PAGE_KERNEL_LARGE_EXEC & ~_PAGE_GLOBAL), %rax 1288170e6beSH. Peter Anvin leaq (_end - 1)(%rip), %rcx 1298170e6beSH. Peter Anvin shrq $PMD_SHIFT, %rcx 1308170e6beSH. Peter Anvin subq %rdi, %rcx 1318170e6beSH. Peter Anvin incl %ecx 1328170e6beSH. Peter Anvin 1338170e6beSH. Peter Anvin1: 1348170e6beSH. Peter Anvin andq $(PTRS_PER_PMD - 1), %rdi 1358170e6beSH. Peter Anvin movq %rax, (%rbx,%rdi,8) 1368170e6beSH. Peter Anvin incq %rdi 1378170e6beSH. Peter Anvin addq $PMD_SIZE, %rax 1388170e6beSH. Peter Anvin decl %ecx 1398170e6beSH. Peter Anvin jnz 1b 140250c2277SThomas Gleixner 14131eedd82SThomas Gleixner /* 14231eedd82SThomas Gleixner * Fixup the kernel text+data virtual addresses. Note that 14331eedd82SThomas Gleixner * we might write invalid pmds, when the kernel is relocated 14431eedd82SThomas Gleixner * cleanup_highmap() fixes this up along with the mappings 14531eedd82SThomas Gleixner * beyond _end. 146250c2277SThomas Gleixner */ 147250c2277SThomas Gleixner leaq level2_kernel_pgt(%rip), %rdi 148250c2277SThomas Gleixner leaq 4096(%rdi), %r8 149250c2277SThomas Gleixner /* See if it is a valid page table entry */ 1503e1aa7cbSDenys Vlasenko1: testb $1, 0(%rdi) 151250c2277SThomas Gleixner jz 2f 152250c2277SThomas Gleixner addq %rbp, 0(%rdi) 153250c2277SThomas Gleixner /* Go to the next page */ 154250c2277SThomas Gleixner2: addq $8, %rdi 155250c2277SThomas Gleixner cmp %r8, %rdi 156250c2277SThomas Gleixner jne 1b 157250c2277SThomas Gleixner 158250c2277SThomas Gleixner /* Fixup phys_base */ 159250c2277SThomas Gleixner addq %rbp, phys_base(%rip) 160250c2277SThomas Gleixner 1618170e6beSH. Peter Anvin movq $(early_level4_pgt - __START_KERNEL_map), %rax 1628170e6beSH. Peter Anvin jmp 1f 163250c2277SThomas GleixnerENTRY(secondary_startup_64) 164250c2277SThomas Gleixner /* 1651256276cSKonrad Rzeszutek Wilk * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0, 166250c2277SThomas Gleixner * and someone has loaded a mapped page table. 167250c2277SThomas Gleixner * 1688170e6beSH. Peter Anvin * %rsi holds a physical pointer to real_mode_data. 169250c2277SThomas Gleixner * 170250c2277SThomas Gleixner * We come here either from startup_64 (using physical addresses) 171250c2277SThomas Gleixner * or from trampoline.S (using virtual addresses). 172250c2277SThomas Gleixner * 173250c2277SThomas Gleixner * Using virtual addresses from trampoline.S removes the need 174250c2277SThomas Gleixner * to have any identity mapped pages in the kernel page table 175250c2277SThomas Gleixner * after the boot processor executes this code. 176250c2277SThomas Gleixner */ 177250c2277SThomas Gleixner 17804633df0SBorislav Petkov /* Sanitize CPU configuration */ 17904633df0SBorislav Petkov call verify_cpu 18004633df0SBorislav Petkov 1818170e6beSH. Peter Anvin movq $(init_level4_pgt - __START_KERNEL_map), %rax 1828170e6beSH. Peter Anvin1: 1838170e6beSH. Peter Anvin 184250c2277SThomas Gleixner /* Enable PAE mode and PGE */ 1858170e6beSH. Peter Anvin movl $(X86_CR4_PAE | X86_CR4_PGE), %ecx 1868170e6beSH. Peter Anvin movq %rcx, %cr4 187250c2277SThomas Gleixner 188250c2277SThomas Gleixner /* Setup early boot stage 4 level pagetables. */ 189250c2277SThomas Gleixner addq phys_base(%rip), %rax 190250c2277SThomas Gleixner movq %rax, %cr3 191250c2277SThomas Gleixner 192250c2277SThomas Gleixner /* Ensure I am executing from virtual addresses */ 193250c2277SThomas Gleixner movq $1f, %rax 194250c2277SThomas Gleixner jmp *%rax 195250c2277SThomas Gleixner1: 196250c2277SThomas Gleixner 197250c2277SThomas Gleixner /* Check if nx is implemented */ 198250c2277SThomas Gleixner movl $0x80000001, %eax 199250c2277SThomas Gleixner cpuid 200250c2277SThomas Gleixner movl %edx,%edi 201250c2277SThomas Gleixner 202250c2277SThomas Gleixner /* Setup EFER (Extended Feature Enable Register) */ 203250c2277SThomas Gleixner movl $MSR_EFER, %ecx 204250c2277SThomas Gleixner rdmsr 205250c2277SThomas Gleixner btsl $_EFER_SCE, %eax /* Enable System Call */ 206250c2277SThomas Gleixner btl $20,%edi /* No Execute supported? */ 207250c2277SThomas Gleixner jnc 1f 208250c2277SThomas Gleixner btsl $_EFER_NX, %eax 20978d77df7SH. Peter Anvin btsq $_PAGE_BIT_NX,early_pmd_flags(%rip) 210250c2277SThomas Gleixner1: wrmsr /* Make changes effective */ 211250c2277SThomas Gleixner 212250c2277SThomas Gleixner /* Setup cr0 */ 213369101daSCyrill Gorcunov#define CR0_STATE (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | \ 214369101daSCyrill Gorcunov X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | \ 215369101daSCyrill Gorcunov X86_CR0_PG) 216369101daSCyrill Gorcunov movl $CR0_STATE, %eax 217250c2277SThomas Gleixner /* Make changes effective */ 218250c2277SThomas Gleixner movq %rax, %cr0 219250c2277SThomas Gleixner 220250c2277SThomas Gleixner /* Setup a boot time stack */ 2219cf4f298SGlauber Costa movq stack_start(%rip), %rsp 222250c2277SThomas Gleixner 223250c2277SThomas Gleixner /* zero EFLAGS after setting rsp */ 224250c2277SThomas Gleixner pushq $0 225250c2277SThomas Gleixner popfq 226250c2277SThomas Gleixner 227250c2277SThomas Gleixner /* 228250c2277SThomas Gleixner * We must switch to a new descriptor in kernel space for the GDT 229250c2277SThomas Gleixner * because soon the kernel won't have access anymore to the userspace 230250c2277SThomas Gleixner * addresses where we're currently running on. We have to do that here 231250c2277SThomas Gleixner * because in 32bit we couldn't load a 64bit linear address. 232250c2277SThomas Gleixner */ 233a939098aSGlauber Costa lgdt early_gdt_descr(%rip) 234250c2277SThomas Gleixner 2358ec6993dSBrian Gerst /* set up data segments */ 2368ec6993dSBrian Gerst xorl %eax,%eax 237250c2277SThomas Gleixner movl %eax,%ds 238250c2277SThomas Gleixner movl %eax,%ss 239250c2277SThomas Gleixner movl %eax,%es 240250c2277SThomas Gleixner 241250c2277SThomas Gleixner /* 242250c2277SThomas Gleixner * We don't really need to load %fs or %gs, but load them anyway 243250c2277SThomas Gleixner * to kill any stale realmode selectors. This allows execution 244250c2277SThomas Gleixner * under VT hardware. 245250c2277SThomas Gleixner */ 246250c2277SThomas Gleixner movl %eax,%fs 247250c2277SThomas Gleixner movl %eax,%gs 248250c2277SThomas Gleixner 249f32ff538STejun Heo /* Set up %gs. 250f32ff538STejun Heo * 251947e76cdSBrian Gerst * The base of %gs always points to the bottom of the irqstack 252947e76cdSBrian Gerst * union. If the stack protector canary is enabled, it is 253947e76cdSBrian Gerst * located at %gs:40. Note that, on SMP, the boot cpu uses 254947e76cdSBrian Gerst * init data section till per cpu areas are set up. 255250c2277SThomas Gleixner */ 256250c2277SThomas Gleixner movl $MSR_GS_BASE,%ecx 257650fb439SBrian Gerst movl initial_gs(%rip),%eax 258650fb439SBrian Gerst movl initial_gs+4(%rip),%edx 259250c2277SThomas Gleixner wrmsr 260250c2277SThomas Gleixner 2618170e6beSH. Peter Anvin /* rsi is pointer to real mode structure with interesting info. 262250c2277SThomas Gleixner pass it to C */ 2638170e6beSH. Peter Anvin movq %rsi, %rdi 264250c2277SThomas Gleixner 265250c2277SThomas Gleixner /* Finally jump to run C code and to be on real kernel address 266250c2277SThomas Gleixner * Since we are running on identity-mapped space we have to jump 267250c2277SThomas Gleixner * to the full 64bit address, this is only possible as indirect 268250c2277SThomas Gleixner * jump. In addition we need to ensure %cs is set so we make this 269250c2277SThomas Gleixner * a far return. 2708170e6beSH. Peter Anvin * 2718170e6beSH. Peter Anvin * Note: do not change to far jump indirect with 64bit offset. 2728170e6beSH. Peter Anvin * 2738170e6beSH. Peter Anvin * AMD does not support far jump indirect with 64bit offset. 2748170e6beSH. Peter Anvin * AMD64 Architecture Programmer's Manual, Volume 3: states only 2758170e6beSH. Peter Anvin * JMP FAR mem16:16 FF /5 Far jump indirect, 2768170e6beSH. Peter Anvin * with the target specified by a far pointer in memory. 2778170e6beSH. Peter Anvin * JMP FAR mem16:32 FF /5 Far jump indirect, 2788170e6beSH. Peter Anvin * with the target specified by a far pointer in memory. 2798170e6beSH. Peter Anvin * 2808170e6beSH. Peter Anvin * Intel64 does support 64bit offset. 2818170e6beSH. Peter Anvin * Software Developer Manual Vol 2: states: 2828170e6beSH. Peter Anvin * FF /5 JMP m16:16 Jump far, absolute indirect, 2838170e6beSH. Peter Anvin * address given in m16:16 2848170e6beSH. Peter Anvin * FF /5 JMP m16:32 Jump far, absolute indirect, 2858170e6beSH. Peter Anvin * address given in m16:32. 2868170e6beSH. Peter Anvin * REX.W + FF /5 JMP m16:64 Jump far, absolute indirect, 2878170e6beSH. Peter Anvin * address given in m16:64. 288250c2277SThomas Gleixner */ 289250c2277SThomas Gleixner movq initial_code(%rip),%rax 290250c2277SThomas Gleixner pushq $0 # fake return address to stop unwinder 291250c2277SThomas Gleixner pushq $__KERNEL_CS # set correct cs 292250c2277SThomas Gleixner pushq %rax # target address in negative space 293250c2277SThomas Gleixner lretq 294250c2277SThomas Gleixner 29504633df0SBorislav Petkov#include "verify_cpu.S" 29604633df0SBorislav Petkov 29742e78e97SFenghua Yu#ifdef CONFIG_HOTPLUG_CPU 29842e78e97SFenghua Yu/* 29942e78e97SFenghua Yu * Boot CPU0 entry point. It's called from play_dead(). Everything has been set 30042e78e97SFenghua Yu * up already except stack. We just set up stack here. Then call 30142e78e97SFenghua Yu * start_secondary(). 30242e78e97SFenghua Yu */ 30342e78e97SFenghua YuENTRY(start_cpu0) 30442e78e97SFenghua Yu movq stack_start(%rip),%rsp 30542e78e97SFenghua Yu movq initial_code(%rip),%rax 30642e78e97SFenghua Yu pushq $0 # fake return address to stop unwinder 30742e78e97SFenghua Yu pushq $__KERNEL_CS # set correct cs 30842e78e97SFenghua Yu pushq %rax # target address in negative space 30942e78e97SFenghua Yu lretq 31042e78e97SFenghua YuENDPROC(start_cpu0) 31142e78e97SFenghua Yu#endif 31242e78e97SFenghua Yu 313250c2277SThomas Gleixner /* SMP bootup changes these two */ 314da5968aeSSam Ravnborg __REFDATA 3158170e6beSH. Peter Anvin .balign 8 3168170e6beSH. Peter Anvin GLOBAL(initial_code) 317250c2277SThomas Gleixner .quad x86_64_start_kernel 3188170e6beSH. Peter Anvin GLOBAL(initial_gs) 3192add8e23SBrian Gerst .quad INIT_PER_CPU_VAR(irq_stack_union) 320f1fbabb3SSam Ravnborg 3218170e6beSH. Peter Anvin GLOBAL(stack_start) 322250c2277SThomas Gleixner .quad init_thread_union+THREAD_SIZE-8 3239cf4f298SGlauber Costa .word 0 324b9af7c0dSSuresh Siddha __FINITDATA 325250c2277SThomas Gleixner 326250c2277SThomas Gleixnerbad_address: 327250c2277SThomas Gleixner jmp bad_address 328250c2277SThomas Gleixner 3298170e6beSH. Peter Anvin __INIT 330cdeb6048SAndy LutomirskiENTRY(early_idt_handler_array) 3319900aa2fSH. Peter Anvin # 104(%rsp) %rflags 3329900aa2fSH. Peter Anvin # 96(%rsp) %cs 3339900aa2fSH. Peter Anvin # 88(%rsp) %rip 3349900aa2fSH. Peter Anvin # 80(%rsp) error code 335749c970aSAndi Kleen i = 0 336749c970aSAndi Kleen .rept NUM_EXCEPTION_VECTORS 337cdeb6048SAndy Lutomirski .ifeq (EXCEPTION_ERRCODE_MASK >> i) & 1 3389900aa2fSH. Peter Anvin pushq $0 # Dummy error code, to make stack frame uniform 3399900aa2fSH. Peter Anvin .endif 3409900aa2fSH. Peter Anvin pushq $i # 72(%rsp) Vector number 341cdeb6048SAndy Lutomirski jmp early_idt_handler_common 342749c970aSAndi Kleen i = i + 1 343cdeb6048SAndy Lutomirski .fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc 344749c970aSAndi Kleen .endr 345cdeb6048SAndy LutomirskiENDPROC(early_idt_handler_array) 3468866cd9dSRoland McGrath 347cdeb6048SAndy Lutomirskiearly_idt_handler_common: 348cdeb6048SAndy Lutomirski /* 349cdeb6048SAndy Lutomirski * The stack is the hardware frame, an error code or zero, and the 350cdeb6048SAndy Lutomirski * vector number. 351cdeb6048SAndy Lutomirski */ 3529900aa2fSH. Peter Anvin cld 3539900aa2fSH. Peter Anvin 354b01d4e68SLinus Torvalds cmpl $2,(%rsp) # X86_TRAP_NMI 355e839004bSBorislav Petkov je .Lis_nmi # Ignore NMI 3565fa10196SH. Peter Anvin 357250c2277SThomas Gleixner cmpl $2,early_recursion_flag(%rip) 358250c2277SThomas Gleixner jz 1f 359250c2277SThomas Gleixner incl early_recursion_flag(%rip) 3609900aa2fSH. Peter Anvin 3619900aa2fSH. Peter Anvin pushq %rax # 64(%rsp) 3629900aa2fSH. Peter Anvin pushq %rcx # 56(%rsp) 3639900aa2fSH. Peter Anvin pushq %rdx # 48(%rsp) 3649900aa2fSH. Peter Anvin pushq %rsi # 40(%rsp) 3659900aa2fSH. Peter Anvin pushq %rdi # 32(%rsp) 3669900aa2fSH. Peter Anvin pushq %r8 # 24(%rsp) 3679900aa2fSH. Peter Anvin pushq %r9 # 16(%rsp) 3689900aa2fSH. Peter Anvin pushq %r10 # 8(%rsp) 3699900aa2fSH. Peter Anvin pushq %r11 # 0(%rsp) 3709900aa2fSH. Peter Anvin 3719900aa2fSH. Peter Anvin cmpl $__KERNEL_CS,96(%rsp) 3728170e6beSH. Peter Anvin jne 11f 3739900aa2fSH. Peter Anvin 3748170e6beSH. Peter Anvin cmpl $14,72(%rsp) # Page fault? 3758170e6beSH. Peter Anvin jnz 10f 3768170e6beSH. Peter Anvin GET_CR2_INTO(%rdi) # can clobber any volatile register if pv 3778170e6beSH. Peter Anvin call early_make_pgtable 3788170e6beSH. Peter Anvin andl %eax,%eax 3798170e6beSH. Peter Anvin jz 20f # All good 3808170e6beSH. Peter Anvin 3818170e6beSH. Peter Anvin10: 3829900aa2fSH. Peter Anvin leaq 88(%rsp),%rdi # Pointer to %rip 3839900aa2fSH. Peter Anvin call early_fixup_exception 3849900aa2fSH. Peter Anvin andl %eax,%eax 3859900aa2fSH. Peter Anvin jnz 20f # Found an exception entry 3869900aa2fSH. Peter Anvin 3878170e6beSH. Peter Anvin11: 3889900aa2fSH. Peter Anvin#ifdef CONFIG_EARLY_PRINTK 3899900aa2fSH. Peter Anvin GET_CR2_INTO(%r9) # can clobber any volatile register if pv 3909900aa2fSH. Peter Anvin movl 80(%rsp),%r8d # error code 3919900aa2fSH. Peter Anvin movl 72(%rsp),%esi # vector number 3929900aa2fSH. Peter Anvin movl 96(%rsp),%edx # %cs 3939900aa2fSH. Peter Anvin movq 88(%rsp),%rcx # %rip 3948866cd9dSRoland McGrath xorl %eax,%eax 395250c2277SThomas Gleixner leaq early_idt_msg(%rip),%rdi 396250c2277SThomas Gleixner call early_printk 397250c2277SThomas Gleixner cmpl $2,early_recursion_flag(%rip) 398250c2277SThomas Gleixner jz 1f 399250c2277SThomas Gleixner call dump_stack 400250c2277SThomas Gleixner#ifdef CONFIG_KALLSYMS 401250c2277SThomas Gleixner leaq early_idt_ripmsg(%rip),%rdi 4029900aa2fSH. Peter Anvin movq 40(%rsp),%rsi # %rip again 403250c2277SThomas Gleixner call __print_symbol 404250c2277SThomas Gleixner#endif 405076f9776SIngo Molnar#endif /* EARLY_PRINTK */ 406250c2277SThomas Gleixner1: hlt 407250c2277SThomas Gleixner jmp 1b 408076f9776SIngo Molnar 4098170e6beSH. Peter Anvin20: # Exception table entry found or page table generated 4109900aa2fSH. Peter Anvin popq %r11 4119900aa2fSH. Peter Anvin popq %r10 4129900aa2fSH. Peter Anvin popq %r9 4139900aa2fSH. Peter Anvin popq %r8 4149900aa2fSH. Peter Anvin popq %rdi 4159900aa2fSH. Peter Anvin popq %rsi 4169900aa2fSH. Peter Anvin popq %rdx 4179900aa2fSH. Peter Anvin popq %rcx 4189900aa2fSH. Peter Anvin popq %rax 4199900aa2fSH. Peter Anvin decl early_recursion_flag(%rip) 420e839004bSBorislav Petkov.Lis_nmi: 4215fa10196SH. Peter Anvin addq $16,%rsp # drop vector number and error code 4229900aa2fSH. Peter Anvin INTERRUPT_RETURN 423cdeb6048SAndy LutomirskiENDPROC(early_idt_handler_common) 4249900aa2fSH. Peter Anvin 4258170e6beSH. Peter Anvin __INITDATA 4268170e6beSH. Peter Anvin 4279900aa2fSH. Peter Anvin .balign 4 428250c2277SThomas Gleixnerearly_recursion_flag: 429250c2277SThomas Gleixner .long 0 430250c2277SThomas Gleixner 4319900aa2fSH. Peter Anvin#ifdef CONFIG_EARLY_PRINTK 432250c2277SThomas Gleixnerearly_idt_msg: 4338866cd9dSRoland McGrath .asciz "PANIC: early exception %02lx rip %lx:%lx error %lx cr2 %lx\n" 434250c2277SThomas Gleixnerearly_idt_ripmsg: 435250c2277SThomas Gleixner .asciz "RIP %s\n" 436076f9776SIngo Molnar#endif /* CONFIG_EARLY_PRINTK */ 437250c2277SThomas Gleixner 438250c2277SThomas Gleixner#define NEXT_PAGE(name) \ 439250c2277SThomas Gleixner .balign PAGE_SIZE; \ 4408170e6beSH. Peter AnvinGLOBAL(name) 441250c2277SThomas Gleixner 442250c2277SThomas Gleixner/* Automate the creation of 1 to 1 mapping pmd entries */ 443250c2277SThomas Gleixner#define PMDS(START, PERM, COUNT) \ 444250c2277SThomas Gleixner i = 0 ; \ 445250c2277SThomas Gleixner .rept (COUNT) ; \ 4460e192b99SCyrill Gorcunov .quad (START) + (i << PMD_SHIFT) + (PERM) ; \ 447250c2277SThomas Gleixner i = i + 1 ; \ 448250c2277SThomas Gleixner .endr 449250c2277SThomas Gleixner 4508170e6beSH. Peter Anvin __INITDATA 4518170e6beSH. Peter AnvinNEXT_PAGE(early_level4_pgt) 4528170e6beSH. Peter Anvin .fill 511,8,0 4538170e6beSH. Peter Anvin .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE 4548170e6beSH. Peter Anvin 4558170e6beSH. Peter AnvinNEXT_PAGE(early_dynamic_pgts) 4568170e6beSH. Peter Anvin .fill 512*EARLY_DYNAMIC_PAGE_TABLES,8,0 4578170e6beSH. Peter Anvin 458b9af7c0dSSuresh Siddha .data 4598170e6beSH. Peter Anvin 4608170e6beSH. Peter Anvin#ifndef CONFIG_XEN 4618170e6beSH. Peter AnvinNEXT_PAGE(init_level4_pgt) 4628170e6beSH. Peter Anvin .fill 512,8,0 4638170e6beSH. Peter Anvin#else 464250c2277SThomas GleixnerNEXT_PAGE(init_level4_pgt) 465250c2277SThomas Gleixner .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE 466a6523748SEduardo Habkost .org init_level4_pgt + L4_PAGE_OFFSET*8, 0 467250c2277SThomas Gleixner .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE 468a6523748SEduardo Habkost .org init_level4_pgt + L4_START_KERNEL*8, 0 469250c2277SThomas Gleixner /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */ 470250c2277SThomas Gleixner .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE 471250c2277SThomas Gleixner 472250c2277SThomas GleixnerNEXT_PAGE(level3_ident_pgt) 473250c2277SThomas Gleixner .quad level2_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE 474250c2277SThomas Gleixner .fill 511, 8, 0 4758170e6beSH. Peter AnvinNEXT_PAGE(level2_ident_pgt) 4768170e6beSH. Peter Anvin /* Since I easily can, map the first 1G. 4778170e6beSH. Peter Anvin * Don't set NX because code runs from these pages. 4788170e6beSH. Peter Anvin */ 4798170e6beSH. Peter Anvin PMDS(0, __PAGE_KERNEL_IDENT_LARGE_EXEC, PTRS_PER_PMD) 4808170e6beSH. Peter Anvin#endif 481250c2277SThomas Gleixner 482250c2277SThomas GleixnerNEXT_PAGE(level3_kernel_pgt) 483a6523748SEduardo Habkost .fill L3_START_KERNEL,8,0 484250c2277SThomas Gleixner /* (2^48-(2*1024*1024*1024)-((2^39)*511))/(2^30) = 510 */ 485250c2277SThomas Gleixner .quad level2_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE 486250c2277SThomas Gleixner .quad level2_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE 487250c2277SThomas Gleixner 488250c2277SThomas GleixnerNEXT_PAGE(level2_kernel_pgt) 48988f3aec7SIngo Molnar /* 49085eb69a1SIngo Molnar * 512 MB kernel mapping. We spend a full page on this pagetable 49188f3aec7SIngo Molnar * anyway. 49288f3aec7SIngo Molnar * 49388f3aec7SIngo Molnar * The kernel code+data+bss must not be bigger than that. 49488f3aec7SIngo Molnar * 49585eb69a1SIngo Molnar * (NOTE: at +512MB starts the module area, see MODULES_VADDR. 49688f3aec7SIngo Molnar * If you want to increase this then increase MODULES_VADDR 49788f3aec7SIngo Molnar * too.) 49888f3aec7SIngo Molnar */ 4998490638cSJeremy Fitzhardinge PMDS(0, __PAGE_KERNEL_LARGE_EXEC, 500d4afe414SIngo Molnar KERNEL_IMAGE_SIZE/PMD_SIZE) 501250c2277SThomas Gleixner 5028170e6beSH. Peter AnvinNEXT_PAGE(level2_fixmap_pgt) 5038170e6beSH. Peter Anvin .fill 506,8,0 5048170e6beSH. Peter Anvin .quad level1_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE 5058170e6beSH. Peter Anvin /* 8MB reserved for vsyscalls + a 2MB hole = 4 + 1 entries */ 5068170e6beSH. Peter Anvin .fill 5,8,0 5078170e6beSH. Peter Anvin 5088170e6beSH. Peter AnvinNEXT_PAGE(level1_fixmap_pgt) 509250c2277SThomas Gleixner .fill 512,8,0 510250c2277SThomas Gleixner 511250c2277SThomas Gleixner#undef PMDS 512250c2277SThomas Gleixner 513250c2277SThomas Gleixner .data 514250c2277SThomas Gleixner .align 16 515a939098aSGlauber Costa .globl early_gdt_descr 516a939098aSGlauber Costaearly_gdt_descr: 517a939098aSGlauber Costa .word GDT_ENTRIES*8-1 5183e5d8f97STejun Heoearly_gdt_descr_base: 5192add8e23SBrian Gerst .quad INIT_PER_CPU_VAR(gdt_page) 520250c2277SThomas Gleixner 521250c2277SThomas GleixnerENTRY(phys_base) 522250c2277SThomas Gleixner /* This must match the first entry in level2_kernel_pgt */ 523250c2277SThomas Gleixner .quad 0x0000000000000000 524250c2277SThomas Gleixner 5258c5e5ac3SJeremy Fitzhardinge#include "../../x86/xen/xen-head.S" 526250c2277SThomas Gleixner 52702b7da37STim Abbott __PAGE_ALIGNED_BSS 5288170e6beSH. Peter AnvinNEXT_PAGE(empty_zero_page) 529250c2277SThomas Gleixner .skip PAGE_SIZE 530ef7f0d6aSAndrey Ryabinin 531