1250c2277SThomas Gleixner/* 2250c2277SThomas Gleixner * linux/arch/x86_64/kernel/head.S -- start in 32bit and switch to 64bit 3250c2277SThomas Gleixner * 4250c2277SThomas Gleixner * Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE 5250c2277SThomas Gleixner * Copyright (C) 2000 Pavel Machek <pavel@suse.cz> 6250c2277SThomas Gleixner * Copyright (C) 2000 Karsten Keil <kkeil@suse.de> 7250c2277SThomas Gleixner * Copyright (C) 2001,2002 Andi Kleen <ak@suse.de> 8250c2277SThomas Gleixner * Copyright (C) 2005 Eric Biederman <ebiederm@xmission.com> 9250c2277SThomas Gleixner */ 10250c2277SThomas Gleixner 11250c2277SThomas Gleixner 12250c2277SThomas Gleixner#include <linux/linkage.h> 13250c2277SThomas Gleixner#include <linux/threads.h> 14250c2277SThomas Gleixner#include <linux/init.h> 15250c2277SThomas Gleixner#include <asm/desc.h> 16250c2277SThomas Gleixner#include <asm/segment.h> 17250c2277SThomas Gleixner#include <asm/pgtable.h> 18250c2277SThomas Gleixner#include <asm/page.h> 19250c2277SThomas Gleixner#include <asm/msr.h> 20250c2277SThomas Gleixner#include <asm/cache.h> 21369101daSCyrill Gorcunov#include <asm/processor-flags.h> 22250c2277SThomas Gleixner 2349a69787SGlauber de Oliveira Costa#ifdef CONFIG_PARAVIRT 2449a69787SGlauber de Oliveira Costa#include <asm/asm-offsets.h> 2549a69787SGlauber de Oliveira Costa#include <asm/paravirt.h> 2649a69787SGlauber de Oliveira Costa#else 2749a69787SGlauber de Oliveira Costa#define GET_CR2_INTO_RCX movq %cr2, %rcx 2849a69787SGlauber de Oliveira Costa#endif 2949a69787SGlauber de Oliveira Costa 30250c2277SThomas Gleixner/* we are not able to switch in one step to the final KERNEL ADRESS SPACE 31250c2277SThomas Gleixner * because we need identity-mapped pages. 32250c2277SThomas Gleixner * 33250c2277SThomas Gleixner */ 34250c2277SThomas Gleixner 35a6523748SEduardo Habkost#define pud_index(x) (((x) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) 36a6523748SEduardo Habkost 37a6523748SEduardo HabkostL4_PAGE_OFFSET = pgd_index(__PAGE_OFFSET) 38a6523748SEduardo HabkostL3_PAGE_OFFSET = pud_index(__PAGE_OFFSET) 39a6523748SEduardo HabkostL4_START_KERNEL = pgd_index(__START_KERNEL_map) 40a6523748SEduardo HabkostL3_START_KERNEL = pud_index(__START_KERNEL_map) 41a6523748SEduardo Habkost 42250c2277SThomas Gleixner .text 43250c2277SThomas Gleixner .section .text.head 44250c2277SThomas Gleixner .code64 45250c2277SThomas Gleixner .globl startup_64 46250c2277SThomas Gleixnerstartup_64: 47250c2277SThomas Gleixner 48250c2277SThomas Gleixner /* 49250c2277SThomas Gleixner * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 1, 50250c2277SThomas Gleixner * and someone has loaded an identity mapped page table 51250c2277SThomas Gleixner * for us. These identity mapped page tables map all of the 52250c2277SThomas Gleixner * kernel pages and possibly all of memory. 53250c2277SThomas Gleixner * 54250c2277SThomas Gleixner * %esi holds a physical pointer to real_mode_data. 55250c2277SThomas Gleixner * 56250c2277SThomas Gleixner * We come here either directly from a 64bit bootloader, or from 57250c2277SThomas Gleixner * arch/x86_64/boot/compressed/head.S. 58250c2277SThomas Gleixner * 59250c2277SThomas Gleixner * We only come here initially at boot nothing else comes here. 60250c2277SThomas Gleixner * 61250c2277SThomas Gleixner * Since we may be loaded at an address different from what we were 62250c2277SThomas Gleixner * compiled to run at we first fixup the physical addresses in our page 63250c2277SThomas Gleixner * tables and then reload them. 64250c2277SThomas Gleixner */ 65250c2277SThomas Gleixner 66250c2277SThomas Gleixner /* Compute the delta between the address I am compiled to run at and the 67250c2277SThomas Gleixner * address I am actually running at. 68250c2277SThomas Gleixner */ 69250c2277SThomas Gleixner leaq _text(%rip), %rbp 70250c2277SThomas Gleixner subq $_text - __START_KERNEL_map, %rbp 71250c2277SThomas Gleixner 72250c2277SThomas Gleixner /* Is the address not 2M aligned? */ 73250c2277SThomas Gleixner movq %rbp, %rax 7431422c51SAndi Kleen andl $~PMD_PAGE_MASK, %eax 75250c2277SThomas Gleixner testl %eax, %eax 76250c2277SThomas Gleixner jnz bad_address 77250c2277SThomas Gleixner 78250c2277SThomas Gleixner /* Is the address too large? */ 79250c2277SThomas Gleixner leaq _text(%rip), %rdx 80250c2277SThomas Gleixner movq $PGDIR_SIZE, %rax 81250c2277SThomas Gleixner cmpq %rax, %rdx 82250c2277SThomas Gleixner jae bad_address 83250c2277SThomas Gleixner 84250c2277SThomas Gleixner /* Fixup the physical addresses in the page table 85250c2277SThomas Gleixner */ 86250c2277SThomas Gleixner addq %rbp, init_level4_pgt + 0(%rip) 87a6523748SEduardo Habkost addq %rbp, init_level4_pgt + (L4_PAGE_OFFSET*8)(%rip) 88a6523748SEduardo Habkost addq %rbp, init_level4_pgt + (L4_START_KERNEL*8)(%rip) 89250c2277SThomas Gleixner 90250c2277SThomas Gleixner addq %rbp, level3_ident_pgt + 0(%rip) 91250c2277SThomas Gleixner 92250c2277SThomas Gleixner addq %rbp, level3_kernel_pgt + (510*8)(%rip) 93250c2277SThomas Gleixner addq %rbp, level3_kernel_pgt + (511*8)(%rip) 94250c2277SThomas Gleixner 95250c2277SThomas Gleixner addq %rbp, level2_fixmap_pgt + (506*8)(%rip) 96250c2277SThomas Gleixner 97250c2277SThomas Gleixner /* Add an Identity mapping if I am above 1G */ 98250c2277SThomas Gleixner leaq _text(%rip), %rdi 9931422c51SAndi Kleen andq $PMD_PAGE_MASK, %rdi 100250c2277SThomas Gleixner 101250c2277SThomas Gleixner movq %rdi, %rax 102250c2277SThomas Gleixner shrq $PUD_SHIFT, %rax 103250c2277SThomas Gleixner andq $(PTRS_PER_PUD - 1), %rax 104250c2277SThomas Gleixner jz ident_complete 105250c2277SThomas Gleixner 106250c2277SThomas Gleixner leaq (level2_spare_pgt - __START_KERNEL_map + _KERNPG_TABLE)(%rbp), %rdx 107250c2277SThomas Gleixner leaq level3_ident_pgt(%rip), %rbx 108250c2277SThomas Gleixner movq %rdx, 0(%rbx, %rax, 8) 109250c2277SThomas Gleixner 110250c2277SThomas Gleixner movq %rdi, %rax 111250c2277SThomas Gleixner shrq $PMD_SHIFT, %rax 112250c2277SThomas Gleixner andq $(PTRS_PER_PMD - 1), %rax 113250c2277SThomas Gleixner leaq __PAGE_KERNEL_LARGE_EXEC(%rdi), %rdx 114250c2277SThomas Gleixner leaq level2_spare_pgt(%rip), %rbx 115250c2277SThomas Gleixner movq %rdx, 0(%rbx, %rax, 8) 116250c2277SThomas Gleixnerident_complete: 117250c2277SThomas Gleixner 11831eedd82SThomas Gleixner /* 11931eedd82SThomas Gleixner * Fixup the kernel text+data virtual addresses. Note that 12031eedd82SThomas Gleixner * we might write invalid pmds, when the kernel is relocated 12131eedd82SThomas Gleixner * cleanup_highmap() fixes this up along with the mappings 12231eedd82SThomas Gleixner * beyond _end. 123250c2277SThomas Gleixner */ 12431eedd82SThomas Gleixner 125250c2277SThomas Gleixner leaq level2_kernel_pgt(%rip), %rdi 126250c2277SThomas Gleixner leaq 4096(%rdi), %r8 127250c2277SThomas Gleixner /* See if it is a valid page table entry */ 128250c2277SThomas Gleixner1: testq $1, 0(%rdi) 129250c2277SThomas Gleixner jz 2f 130250c2277SThomas Gleixner addq %rbp, 0(%rdi) 131250c2277SThomas Gleixner /* Go to the next page */ 132250c2277SThomas Gleixner2: addq $8, %rdi 133250c2277SThomas Gleixner cmp %r8, %rdi 134250c2277SThomas Gleixner jne 1b 135250c2277SThomas Gleixner 136250c2277SThomas Gleixner /* Fixup phys_base */ 137250c2277SThomas Gleixner addq %rbp, phys_base(%rip) 138250c2277SThomas Gleixner 13964e83b5aSRafael J. Wysocki#ifdef CONFIG_X86_TRAMPOLINE 140250c2277SThomas Gleixner addq %rbp, trampoline_level4_pgt + 0(%rip) 141250c2277SThomas Gleixner addq %rbp, trampoline_level4_pgt + (511*8)(%rip) 142250c2277SThomas Gleixner#endif 143250c2277SThomas Gleixner 144250c2277SThomas Gleixner /* Due to ENTRY(), sometimes the empty space gets filled with 145250c2277SThomas Gleixner * zeros. Better take a jmp than relying on empty space being 146250c2277SThomas Gleixner * filled with 0x90 (nop) 147250c2277SThomas Gleixner */ 148250c2277SThomas Gleixner jmp secondary_startup_64 149250c2277SThomas GleixnerENTRY(secondary_startup_64) 150250c2277SThomas Gleixner /* 151250c2277SThomas Gleixner * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 1, 152250c2277SThomas Gleixner * and someone has loaded a mapped page table. 153250c2277SThomas Gleixner * 154250c2277SThomas Gleixner * %esi holds a physical pointer to real_mode_data. 155250c2277SThomas Gleixner * 156250c2277SThomas Gleixner * We come here either from startup_64 (using physical addresses) 157250c2277SThomas Gleixner * or from trampoline.S (using virtual addresses). 158250c2277SThomas Gleixner * 159250c2277SThomas Gleixner * Using virtual addresses from trampoline.S removes the need 160250c2277SThomas Gleixner * to have any identity mapped pages in the kernel page table 161250c2277SThomas Gleixner * after the boot processor executes this code. 162250c2277SThomas Gleixner */ 163250c2277SThomas Gleixner 164250c2277SThomas Gleixner /* Enable PAE mode and PGE */ 16505139d8fSCyrill Gorcunov movl $(X86_CR4_PAE | X86_CR4_PGE), %eax 166250c2277SThomas Gleixner movq %rax, %cr4 167250c2277SThomas Gleixner 168250c2277SThomas Gleixner /* Setup early boot stage 4 level pagetables. */ 169250c2277SThomas Gleixner movq $(init_level4_pgt - __START_KERNEL_map), %rax 170250c2277SThomas Gleixner addq phys_base(%rip), %rax 171250c2277SThomas Gleixner movq %rax, %cr3 172250c2277SThomas Gleixner 173250c2277SThomas Gleixner /* Ensure I am executing from virtual addresses */ 174250c2277SThomas Gleixner movq $1f, %rax 175250c2277SThomas Gleixner jmp *%rax 176250c2277SThomas Gleixner1: 177250c2277SThomas Gleixner 178250c2277SThomas Gleixner /* Check if nx is implemented */ 179250c2277SThomas Gleixner movl $0x80000001, %eax 180250c2277SThomas Gleixner cpuid 181250c2277SThomas Gleixner movl %edx,%edi 182250c2277SThomas Gleixner 183250c2277SThomas Gleixner /* Setup EFER (Extended Feature Enable Register) */ 184250c2277SThomas Gleixner movl $MSR_EFER, %ecx 185250c2277SThomas Gleixner rdmsr 186250c2277SThomas Gleixner btsl $_EFER_SCE, %eax /* Enable System Call */ 187250c2277SThomas Gleixner btl $20,%edi /* No Execute supported? */ 188250c2277SThomas Gleixner jnc 1f 189250c2277SThomas Gleixner btsl $_EFER_NX, %eax 190250c2277SThomas Gleixner1: wrmsr /* Make changes effective */ 191250c2277SThomas Gleixner 192250c2277SThomas Gleixner /* Setup cr0 */ 193369101daSCyrill Gorcunov#define CR0_STATE (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | \ 194369101daSCyrill Gorcunov X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | \ 195369101daSCyrill Gorcunov X86_CR0_PG) 196369101daSCyrill Gorcunov movl $CR0_STATE, %eax 197250c2277SThomas Gleixner /* Make changes effective */ 198250c2277SThomas Gleixner movq %rax, %cr0 199250c2277SThomas Gleixner 200250c2277SThomas Gleixner /* Setup a boot time stack */ 2019cf4f298SGlauber Costa movq stack_start(%rip),%rsp 202250c2277SThomas Gleixner 203250c2277SThomas Gleixner /* zero EFLAGS after setting rsp */ 204250c2277SThomas Gleixner pushq $0 205250c2277SThomas Gleixner popfq 206250c2277SThomas Gleixner 207250c2277SThomas Gleixner /* 208250c2277SThomas Gleixner * We must switch to a new descriptor in kernel space for the GDT 209250c2277SThomas Gleixner * because soon the kernel won't have access anymore to the userspace 210250c2277SThomas Gleixner * addresses where we're currently running on. We have to do that here 211250c2277SThomas Gleixner * because in 32bit we couldn't load a 64bit linear address. 212250c2277SThomas Gleixner */ 213a939098aSGlauber Costa lgdt early_gdt_descr(%rip) 214250c2277SThomas Gleixner 215250c2277SThomas Gleixner /* set up data segments. actually 0 would do too */ 216250c2277SThomas Gleixner movl $__KERNEL_DS,%eax 217250c2277SThomas Gleixner movl %eax,%ds 218250c2277SThomas Gleixner movl %eax,%ss 219250c2277SThomas Gleixner movl %eax,%es 220250c2277SThomas Gleixner 221250c2277SThomas Gleixner /* 222250c2277SThomas Gleixner * We don't really need to load %fs or %gs, but load them anyway 223250c2277SThomas Gleixner * to kill any stale realmode selectors. This allows execution 224250c2277SThomas Gleixner * under VT hardware. 225250c2277SThomas Gleixner */ 226250c2277SThomas Gleixner movl %eax,%fs 227250c2277SThomas Gleixner movl %eax,%gs 228250c2277SThomas Gleixner 229250c2277SThomas Gleixner /* 230250c2277SThomas Gleixner * Setup up a dummy PDA. this is just for some early bootup code 231250c2277SThomas Gleixner * that does in_interrupt() 232250c2277SThomas Gleixner */ 233250c2277SThomas Gleixner movl $MSR_GS_BASE,%ecx 234250c2277SThomas Gleixner movq $empty_zero_page,%rax 235250c2277SThomas Gleixner movq %rax,%rdx 236250c2277SThomas Gleixner shrq $32,%rdx 237250c2277SThomas Gleixner wrmsr 238250c2277SThomas Gleixner 239250c2277SThomas Gleixner /* esi is pointer to real mode structure with interesting info. 240250c2277SThomas Gleixner pass it to C */ 241250c2277SThomas Gleixner movl %esi, %edi 242250c2277SThomas Gleixner 243250c2277SThomas Gleixner /* Finally jump to run C code and to be on real kernel address 244250c2277SThomas Gleixner * Since we are running on identity-mapped space we have to jump 245250c2277SThomas Gleixner * to the full 64bit address, this is only possible as indirect 246250c2277SThomas Gleixner * jump. In addition we need to ensure %cs is set so we make this 247250c2277SThomas Gleixner * a far return. 248250c2277SThomas Gleixner */ 249250c2277SThomas Gleixner movq initial_code(%rip),%rax 250250c2277SThomas Gleixner pushq $0 # fake return address to stop unwinder 251250c2277SThomas Gleixner pushq $__KERNEL_CS # set correct cs 252250c2277SThomas Gleixner pushq %rax # target address in negative space 253250c2277SThomas Gleixner lretq 254250c2277SThomas Gleixner 255250c2277SThomas Gleixner /* SMP bootup changes these two */ 256da5968aeSSam Ravnborg __REFDATA 257250c2277SThomas Gleixner .align 8 258f1fbabb3SSam Ravnborg ENTRY(initial_code) 259250c2277SThomas Gleixner .quad x86_64_start_kernel 260f1fbabb3SSam Ravnborg __FINITDATA 261f1fbabb3SSam Ravnborg 2629cf4f298SGlauber Costa ENTRY(stack_start) 263250c2277SThomas Gleixner .quad init_thread_union+THREAD_SIZE-8 2649cf4f298SGlauber Costa .word 0 265250c2277SThomas Gleixner 266250c2277SThomas Gleixnerbad_address: 267250c2277SThomas Gleixner jmp bad_address 268250c2277SThomas Gleixner 26941bd4eacSAndi Kleen .section ".init.text","ax" 270076f9776SIngo Molnar#ifdef CONFIG_EARLY_PRINTK 2718866cd9dSRoland McGrath .globl early_idt_handlers 2728866cd9dSRoland McGrathearly_idt_handlers: 273749c970aSAndi Kleen i = 0 274749c970aSAndi Kleen .rept NUM_EXCEPTION_VECTORS 275749c970aSAndi Kleen movl $i, %esi 276749c970aSAndi Kleen jmp early_idt_handler 277749c970aSAndi Kleen i = i + 1 278749c970aSAndi Kleen .endr 279076f9776SIngo Molnar#endif 2808866cd9dSRoland McGrath 281250c2277SThomas GleixnerENTRY(early_idt_handler) 282076f9776SIngo Molnar#ifdef CONFIG_EARLY_PRINTK 283250c2277SThomas Gleixner cmpl $2,early_recursion_flag(%rip) 284250c2277SThomas Gleixner jz 1f 285250c2277SThomas Gleixner incl early_recursion_flag(%rip) 28649a69787SGlauber de Oliveira Costa GET_CR2_INTO_RCX 2878866cd9dSRoland McGrath movq %rcx,%r9 2888866cd9dSRoland McGrath xorl %r8d,%r8d # zero for error code 2898866cd9dSRoland McGrath movl %esi,%ecx # get vector number 2908866cd9dSRoland McGrath # Test %ecx against mask of vectors that push error code. 2918866cd9dSRoland McGrath cmpl $31,%ecx 2928866cd9dSRoland McGrath ja 0f 2938866cd9dSRoland McGrath movl $1,%eax 2948866cd9dSRoland McGrath salq %cl,%rax 2958866cd9dSRoland McGrath testl $0x27d00,%eax 2968866cd9dSRoland McGrath je 0f 2978866cd9dSRoland McGrath popq %r8 # get error code 2988866cd9dSRoland McGrath0: movq 0(%rsp),%rcx # get ip 2998866cd9dSRoland McGrath movq 8(%rsp),%rdx # get cs 3008866cd9dSRoland McGrath xorl %eax,%eax 301250c2277SThomas Gleixner leaq early_idt_msg(%rip),%rdi 302250c2277SThomas Gleixner call early_printk 303250c2277SThomas Gleixner cmpl $2,early_recursion_flag(%rip) 304250c2277SThomas Gleixner jz 1f 305250c2277SThomas Gleixner call dump_stack 306250c2277SThomas Gleixner#ifdef CONFIG_KALLSYMS 307250c2277SThomas Gleixner leaq early_idt_ripmsg(%rip),%rdi 308250c2277SThomas Gleixner movq 8(%rsp),%rsi # get rip again 309250c2277SThomas Gleixner call __print_symbol 310250c2277SThomas Gleixner#endif 311076f9776SIngo Molnar#endif /* EARLY_PRINTK */ 312250c2277SThomas Gleixner1: hlt 313250c2277SThomas Gleixner jmp 1b 314076f9776SIngo Molnar 315076f9776SIngo Molnar#ifdef CONFIG_EARLY_PRINTK 316250c2277SThomas Gleixnerearly_recursion_flag: 317250c2277SThomas Gleixner .long 0 318250c2277SThomas Gleixner 319250c2277SThomas Gleixnerearly_idt_msg: 3208866cd9dSRoland McGrath .asciz "PANIC: early exception %02lx rip %lx:%lx error %lx cr2 %lx\n" 321250c2277SThomas Gleixnerearly_idt_ripmsg: 322250c2277SThomas Gleixner .asciz "RIP %s\n" 323076f9776SIngo Molnar#endif /* CONFIG_EARLY_PRINTK */ 32441bd4eacSAndi Kleen .previous 325250c2277SThomas Gleixner 326250c2277SThomas Gleixner.balign PAGE_SIZE 327250c2277SThomas Gleixner 328250c2277SThomas Gleixner#define NEXT_PAGE(name) \ 329250c2277SThomas Gleixner .balign PAGE_SIZE; \ 330250c2277SThomas GleixnerENTRY(name) 331250c2277SThomas Gleixner 332250c2277SThomas Gleixner/* Automate the creation of 1 to 1 mapping pmd entries */ 333250c2277SThomas Gleixner#define PMDS(START, PERM, COUNT) \ 334250c2277SThomas Gleixner i = 0 ; \ 335250c2277SThomas Gleixner .rept (COUNT) ; \ 3360e192b99SCyrill Gorcunov .quad (START) + (i << PMD_SHIFT) + (PERM) ; \ 337250c2277SThomas Gleixner i = i + 1 ; \ 338250c2277SThomas Gleixner .endr 339250c2277SThomas Gleixner 340250c2277SThomas Gleixner /* 341250c2277SThomas Gleixner * This default setting generates an ident mapping at address 0x100000 342250c2277SThomas Gleixner * and a mapping for the kernel that precisely maps virtual address 343250c2277SThomas Gleixner * 0xffffffff80000000 to physical address 0x000000. (always using 344250c2277SThomas Gleixner * 2Mbyte large pages provided by PAE mode) 345250c2277SThomas Gleixner */ 346250c2277SThomas GleixnerNEXT_PAGE(init_level4_pgt) 347250c2277SThomas Gleixner .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE 348a6523748SEduardo Habkost .org init_level4_pgt + L4_PAGE_OFFSET*8, 0 349250c2277SThomas Gleixner .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE 350a6523748SEduardo Habkost .org init_level4_pgt + L4_START_KERNEL*8, 0 351250c2277SThomas Gleixner /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */ 352250c2277SThomas Gleixner .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE 353250c2277SThomas Gleixner 354250c2277SThomas GleixnerNEXT_PAGE(level3_ident_pgt) 355250c2277SThomas Gleixner .quad level2_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE 356250c2277SThomas Gleixner .fill 511,8,0 357250c2277SThomas Gleixner 358250c2277SThomas GleixnerNEXT_PAGE(level3_kernel_pgt) 359a6523748SEduardo Habkost .fill L3_START_KERNEL,8,0 360250c2277SThomas Gleixner /* (2^48-(2*1024*1024*1024)-((2^39)*511))/(2^30) = 510 */ 361250c2277SThomas Gleixner .quad level2_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE 362250c2277SThomas Gleixner .quad level2_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE 363250c2277SThomas Gleixner 364250c2277SThomas GleixnerNEXT_PAGE(level2_fixmap_pgt) 365250c2277SThomas Gleixner .fill 512,8,0 366250c2277SThomas Gleixner 367250c2277SThomas GleixnerNEXT_PAGE(level2_ident_pgt) 368250c2277SThomas Gleixner /* Since I easily can, map the first 1G. 369250c2277SThomas Gleixner * Don't set NX because code runs from these pages. 370250c2277SThomas Gleixner */ 3718490638cSJeremy Fitzhardinge PMDS(0, __PAGE_KERNEL_LARGE_EXEC, PTRS_PER_PMD) 372250c2277SThomas Gleixner 373250c2277SThomas GleixnerNEXT_PAGE(level2_kernel_pgt) 37488f3aec7SIngo Molnar /* 37585eb69a1SIngo Molnar * 512 MB kernel mapping. We spend a full page on this pagetable 37688f3aec7SIngo Molnar * anyway. 37788f3aec7SIngo Molnar * 37888f3aec7SIngo Molnar * The kernel code+data+bss must not be bigger than that. 37988f3aec7SIngo Molnar * 38085eb69a1SIngo Molnar * (NOTE: at +512MB starts the module area, see MODULES_VADDR. 38188f3aec7SIngo Molnar * If you want to increase this then increase MODULES_VADDR 38288f3aec7SIngo Molnar * too.) 38388f3aec7SIngo Molnar */ 3848490638cSJeremy Fitzhardinge PMDS(0, __PAGE_KERNEL_LARGE_EXEC, 385d4afe414SIngo Molnar KERNEL_IMAGE_SIZE/PMD_SIZE) 386250c2277SThomas Gleixner 387250c2277SThomas GleixnerNEXT_PAGE(level2_spare_pgt) 388250c2277SThomas Gleixner .fill 512, 8, 0 389250c2277SThomas Gleixner 390250c2277SThomas Gleixner#undef PMDS 391250c2277SThomas Gleixner#undef NEXT_PAGE 392250c2277SThomas Gleixner 393250c2277SThomas Gleixner .data 394250c2277SThomas Gleixner .align 16 395a939098aSGlauber Costa .globl early_gdt_descr 396a939098aSGlauber Costaearly_gdt_descr: 397a939098aSGlauber Costa .word GDT_ENTRIES*8-1 398a939098aSGlauber Costa .quad per_cpu__gdt_page 399250c2277SThomas Gleixner 400250c2277SThomas GleixnerENTRY(phys_base) 401250c2277SThomas Gleixner /* This must match the first entry in level2_kernel_pgt */ 402250c2277SThomas Gleixner .quad 0x0000000000000000 403250c2277SThomas Gleixner 4048c5e5ac3SJeremy Fitzhardinge#include "../../x86/xen/xen-head.S" 405250c2277SThomas Gleixner 406250c2277SThomas Gleixner .section .bss, "aw", @nobits 407250c2277SThomas Gleixner .align L1_CACHE_BYTES 408250c2277SThomas GleixnerENTRY(idt_table) 409250c2277SThomas Gleixner .skip 256 * 16 410250c2277SThomas Gleixner 411250c2277SThomas Gleixner .section .bss.page_aligned, "aw", @nobits 412250c2277SThomas Gleixner .align PAGE_SIZE 413250c2277SThomas GleixnerENTRY(empty_zero_page) 414250c2277SThomas Gleixner .skip PAGE_SIZE 415