1250c2277SThomas Gleixner/* 25b171e82SAlexander Kuleshov * linux/arch/x86/kernel/head_64.S -- start in 32bit and switch to 64bit 3250c2277SThomas Gleixner * 4250c2277SThomas Gleixner * Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE 5250c2277SThomas Gleixner * Copyright (C) 2000 Pavel Machek <pavel@suse.cz> 6250c2277SThomas Gleixner * Copyright (C) 2000 Karsten Keil <kkeil@suse.de> 7250c2277SThomas Gleixner * Copyright (C) 2001,2002 Andi Kleen <ak@suse.de> 8250c2277SThomas Gleixner * Copyright (C) 2005 Eric Biederman <ebiederm@xmission.com> 9250c2277SThomas Gleixner */ 10250c2277SThomas Gleixner 11250c2277SThomas Gleixner 12250c2277SThomas Gleixner#include <linux/linkage.h> 13250c2277SThomas Gleixner#include <linux/threads.h> 14250c2277SThomas Gleixner#include <linux/init.h> 15250c2277SThomas Gleixner#include <asm/segment.h> 16250c2277SThomas Gleixner#include <asm/pgtable.h> 17250c2277SThomas Gleixner#include <asm/page.h> 18250c2277SThomas Gleixner#include <asm/msr.h> 19250c2277SThomas Gleixner#include <asm/cache.h> 20369101daSCyrill Gorcunov#include <asm/processor-flags.h> 21b12d8db8STejun Heo#include <asm/percpu.h> 229900aa2fSH. Peter Anvin#include <asm/nops.h> 237bbcdb1cSAndy Lutomirski#include "../entry/calling.h" 24784d5699SAl Viro#include <asm/export.h> 25250c2277SThomas Gleixner 2649a69787SGlauber de Oliveira Costa#ifdef CONFIG_PARAVIRT 2749a69787SGlauber de Oliveira Costa#include <asm/asm-offsets.h> 2849a69787SGlauber de Oliveira Costa#include <asm/paravirt.h> 29ffc4bc9cSH. Peter Anvin#define GET_CR2_INTO(reg) GET_CR2_INTO_RAX ; movq %rax, reg 3049a69787SGlauber de Oliveira Costa#else 31ffc4bc9cSH. Peter Anvin#define GET_CR2_INTO(reg) movq %cr2, reg 329900aa2fSH. Peter Anvin#define INTERRUPT_RETURN iretq 3349a69787SGlauber de Oliveira Costa#endif 3449a69787SGlauber de Oliveira Costa 353ad2f3fbSDaniel Mack/* we are not able to switch in one step to the final KERNEL ADDRESS SPACE 36250c2277SThomas Gleixner * because we need identity-mapped pages. 37250c2277SThomas Gleixner * 38250c2277SThomas Gleixner */ 39250c2277SThomas Gleixner 40032370b9SKirill A. Shutemov#define p4d_index(x) (((x) >> P4D_SHIFT) & (PTRS_PER_P4D-1)) 41a6523748SEduardo Habkost#define pud_index(x) (((x) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) 42a6523748SEduardo Habkost 43032370b9SKirill A. ShutemovPGD_PAGE_OFFSET = pgd_index(__PAGE_OFFSET_BASE) 44032370b9SKirill A. ShutemovPGD_START_KERNEL = pgd_index(__START_KERNEL_map) 45a6523748SEduardo HabkostL3_START_KERNEL = pud_index(__START_KERNEL_map) 46a6523748SEduardo Habkost 47250c2277SThomas Gleixner .text 484ae59b91STim Abbott __HEAD 49250c2277SThomas Gleixner .code64 50250c2277SThomas Gleixner .globl startup_64 51250c2277SThomas Gleixnerstartup_64: 522704fbb6SJosh Poimboeuf UNWIND_HINT_EMPTY 53250c2277SThomas Gleixner /* 541256276cSKonrad Rzeszutek Wilk * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0, 55250c2277SThomas Gleixner * and someone has loaded an identity mapped page table 56250c2277SThomas Gleixner * for us. These identity mapped page tables map all of the 57250c2277SThomas Gleixner * kernel pages and possibly all of memory. 58250c2277SThomas Gleixner * 598170e6beSH. Peter Anvin * %rsi holds a physical pointer to real_mode_data. 60250c2277SThomas Gleixner * 61250c2277SThomas Gleixner * We come here either directly from a 64bit bootloader, or from 625b171e82SAlexander Kuleshov * arch/x86/boot/compressed/head_64.S. 63250c2277SThomas Gleixner * 64250c2277SThomas Gleixner * We only come here initially at boot nothing else comes here. 65250c2277SThomas Gleixner * 66250c2277SThomas Gleixner * Since we may be loaded at an address different from what we were 67250c2277SThomas Gleixner * compiled to run at we first fixup the physical addresses in our page 68250c2277SThomas Gleixner * tables and then reload them. 69250c2277SThomas Gleixner */ 70250c2277SThomas Gleixner 7122dc3918SJosh Poimboeuf /* Set up the stack for verify_cpu(), similar to initial_stack below */ 7222dc3918SJosh Poimboeuf leaq (__end_init_task - SIZEOF_PTREGS)(%rip), %rsp 7391ed140dSBorislav Petkov 7404633df0SBorislav Petkov /* Sanitize CPU configuration */ 7504633df0SBorislav Petkov call verify_cpu 7604633df0SBorislav Petkov 775868f365STom Lendacky /* 785868f365STom Lendacky * Perform pagetable fixups. Additionally, if SME is active, encrypt 795868f365STom Lendacky * the kernel and retrieve the modifier (SME encryption mask if SME 805868f365STom Lendacky * is active) to be added to the initial pgdir entry that will be 815868f365STom Lendacky * programmed into CR3. 825868f365STom Lendacky */ 83250c2277SThomas Gleixner leaq _text(%rip), %rdi 84c88d7150SKirill A. Shutemov pushq %rsi 85c88d7150SKirill A. Shutemov call __startup_64 86c88d7150SKirill A. Shutemov popq %rsi 87250c2277SThomas Gleixner 885868f365STom Lendacky /* Form the CR3 value being sure to include the CR3 modifier */ 895868f365STom Lendacky addq $(early_top_pgt - __START_KERNEL_map), %rax 908170e6beSH. Peter Anvin jmp 1f 91250c2277SThomas GleixnerENTRY(secondary_startup_64) 922704fbb6SJosh Poimboeuf UNWIND_HINT_EMPTY 93250c2277SThomas Gleixner /* 941256276cSKonrad Rzeszutek Wilk * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0, 95250c2277SThomas Gleixner * and someone has loaded a mapped page table. 96250c2277SThomas Gleixner * 978170e6beSH. Peter Anvin * %rsi holds a physical pointer to real_mode_data. 98250c2277SThomas Gleixner * 99250c2277SThomas Gleixner * We come here either from startup_64 (using physical addresses) 100250c2277SThomas Gleixner * or from trampoline.S (using virtual addresses). 101250c2277SThomas Gleixner * 102250c2277SThomas Gleixner * Using virtual addresses from trampoline.S removes the need 103250c2277SThomas Gleixner * to have any identity mapped pages in the kernel page table 104250c2277SThomas Gleixner * after the boot processor executes this code. 105250c2277SThomas Gleixner */ 106250c2277SThomas Gleixner 10704633df0SBorislav Petkov /* Sanitize CPU configuration */ 10804633df0SBorislav Petkov call verify_cpu 10904633df0SBorislav Petkov 1105868f365STom Lendacky /* 1115868f365STom Lendacky * Retrieve the modifier (SME encryption mask if SME is active) to be 1125868f365STom Lendacky * added to the initial pgdir entry that will be programmed into CR3. 1135868f365STom Lendacky */ 1145868f365STom Lendacky pushq %rsi 1155868f365STom Lendacky call __startup_secondary_64 1165868f365STom Lendacky popq %rsi 1175868f365STom Lendacky 1185868f365STom Lendacky /* Form the CR3 value being sure to include the CR3 modifier */ 1195868f365STom Lendacky addq $(init_top_pgt - __START_KERNEL_map), %rax 1208170e6beSH. Peter Anvin1: 1218170e6beSH. Peter Anvin 122032370b9SKirill A. Shutemov /* Enable PAE mode, PGE and LA57 */ 1238170e6beSH. Peter Anvin movl $(X86_CR4_PAE | X86_CR4_PGE), %ecx 124032370b9SKirill A. Shutemov#ifdef CONFIG_X86_5LEVEL 125032370b9SKirill A. Shutemov orl $X86_CR4_LA57, %ecx 126032370b9SKirill A. Shutemov#endif 1278170e6beSH. Peter Anvin movq %rcx, %cr4 128250c2277SThomas Gleixner 129032370b9SKirill A. Shutemov /* Setup early boot stage 4-/5-level pagetables. */ 130250c2277SThomas Gleixner addq phys_base(%rip), %rax 131250c2277SThomas Gleixner movq %rax, %cr3 132250c2277SThomas Gleixner 133250c2277SThomas Gleixner /* Ensure I am executing from virtual addresses */ 134250c2277SThomas Gleixner movq $1f, %rax 135250c2277SThomas Gleixner jmp *%rax 136250c2277SThomas Gleixner1: 1372704fbb6SJosh Poimboeuf UNWIND_HINT_EMPTY 138250c2277SThomas Gleixner 139250c2277SThomas Gleixner /* Check if nx is implemented */ 140250c2277SThomas Gleixner movl $0x80000001, %eax 141250c2277SThomas Gleixner cpuid 142250c2277SThomas Gleixner movl %edx,%edi 143250c2277SThomas Gleixner 144250c2277SThomas Gleixner /* Setup EFER (Extended Feature Enable Register) */ 145250c2277SThomas Gleixner movl $MSR_EFER, %ecx 146250c2277SThomas Gleixner rdmsr 147250c2277SThomas Gleixner btsl $_EFER_SCE, %eax /* Enable System Call */ 148250c2277SThomas Gleixner btl $20,%edi /* No Execute supported? */ 149250c2277SThomas Gleixner jnc 1f 150250c2277SThomas Gleixner btsl $_EFER_NX, %eax 15178d77df7SH. Peter Anvin btsq $_PAGE_BIT_NX,early_pmd_flags(%rip) 152250c2277SThomas Gleixner1: wrmsr /* Make changes effective */ 153250c2277SThomas Gleixner 154250c2277SThomas Gleixner /* Setup cr0 */ 155369101daSCyrill Gorcunov#define CR0_STATE (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | \ 156369101daSCyrill Gorcunov X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | \ 157369101daSCyrill Gorcunov X86_CR0_PG) 158369101daSCyrill Gorcunov movl $CR0_STATE, %eax 159250c2277SThomas Gleixner /* Make changes effective */ 160250c2277SThomas Gleixner movq %rax, %cr0 161250c2277SThomas Gleixner 162250c2277SThomas Gleixner /* Setup a boot time stack */ 163b32f96c7SJosh Poimboeuf movq initial_stack(%rip), %rsp 164250c2277SThomas Gleixner 165250c2277SThomas Gleixner /* zero EFLAGS after setting rsp */ 166250c2277SThomas Gleixner pushq $0 167250c2277SThomas Gleixner popfq 168250c2277SThomas Gleixner 169250c2277SThomas Gleixner /* 170250c2277SThomas Gleixner * We must switch to a new descriptor in kernel space for the GDT 171250c2277SThomas Gleixner * because soon the kernel won't have access anymore to the userspace 172250c2277SThomas Gleixner * addresses where we're currently running on. We have to do that here 173250c2277SThomas Gleixner * because in 32bit we couldn't load a 64bit linear address. 174250c2277SThomas Gleixner */ 175a939098aSGlauber Costa lgdt early_gdt_descr(%rip) 176250c2277SThomas Gleixner 1778ec6993dSBrian Gerst /* set up data segments */ 1788ec6993dSBrian Gerst xorl %eax,%eax 179250c2277SThomas Gleixner movl %eax,%ds 180250c2277SThomas Gleixner movl %eax,%ss 181250c2277SThomas Gleixner movl %eax,%es 182250c2277SThomas Gleixner 183250c2277SThomas Gleixner /* 184250c2277SThomas Gleixner * We don't really need to load %fs or %gs, but load them anyway 185250c2277SThomas Gleixner * to kill any stale realmode selectors. This allows execution 186250c2277SThomas Gleixner * under VT hardware. 187250c2277SThomas Gleixner */ 188250c2277SThomas Gleixner movl %eax,%fs 189250c2277SThomas Gleixner movl %eax,%gs 190250c2277SThomas Gleixner 191f32ff538STejun Heo /* Set up %gs. 192f32ff538STejun Heo * 193947e76cdSBrian Gerst * The base of %gs always points to the bottom of the irqstack 194947e76cdSBrian Gerst * union. If the stack protector canary is enabled, it is 195947e76cdSBrian Gerst * located at %gs:40. Note that, on SMP, the boot cpu uses 196947e76cdSBrian Gerst * init data section till per cpu areas are set up. 197250c2277SThomas Gleixner */ 198250c2277SThomas Gleixner movl $MSR_GS_BASE,%ecx 199650fb439SBrian Gerst movl initial_gs(%rip),%eax 200650fb439SBrian Gerst movl initial_gs+4(%rip),%edx 201250c2277SThomas Gleixner wrmsr 202250c2277SThomas Gleixner 2038170e6beSH. Peter Anvin /* rsi is pointer to real mode structure with interesting info. 204250c2277SThomas Gleixner pass it to C */ 2058170e6beSH. Peter Anvin movq %rsi, %rdi 206250c2277SThomas Gleixner 20779d243a0SBorislav Petkov.Ljump_to_C_code: 208a9468df5SJosh Poimboeuf /* 209a9468df5SJosh Poimboeuf * Jump to run C code and to be on a real kernel address. 210250c2277SThomas Gleixner * Since we are running on identity-mapped space we have to jump 211250c2277SThomas Gleixner * to the full 64bit address, this is only possible as indirect 212250c2277SThomas Gleixner * jump. In addition we need to ensure %cs is set so we make this 213250c2277SThomas Gleixner * a far return. 2148170e6beSH. Peter Anvin * 2158170e6beSH. Peter Anvin * Note: do not change to far jump indirect with 64bit offset. 2168170e6beSH. Peter Anvin * 2178170e6beSH. Peter Anvin * AMD does not support far jump indirect with 64bit offset. 2188170e6beSH. Peter Anvin * AMD64 Architecture Programmer's Manual, Volume 3: states only 2198170e6beSH. Peter Anvin * JMP FAR mem16:16 FF /5 Far jump indirect, 2208170e6beSH. Peter Anvin * with the target specified by a far pointer in memory. 2218170e6beSH. Peter Anvin * JMP FAR mem16:32 FF /5 Far jump indirect, 2228170e6beSH. Peter Anvin * with the target specified by a far pointer in memory. 2238170e6beSH. Peter Anvin * 2248170e6beSH. Peter Anvin * Intel64 does support 64bit offset. 2258170e6beSH. Peter Anvin * Software Developer Manual Vol 2: states: 2268170e6beSH. Peter Anvin * FF /5 JMP m16:16 Jump far, absolute indirect, 2278170e6beSH. Peter Anvin * address given in m16:16 2288170e6beSH. Peter Anvin * FF /5 JMP m16:32 Jump far, absolute indirect, 2298170e6beSH. Peter Anvin * address given in m16:32. 2308170e6beSH. Peter Anvin * REX.W + FF /5 JMP m16:64 Jump far, absolute indirect, 2318170e6beSH. Peter Anvin * address given in m16:64. 232250c2277SThomas Gleixner */ 23331dcfec1SJosh Poimboeuf pushq $.Lafter_lret # put return address on stack for unwinder 23431dcfec1SJosh Poimboeuf xorq %rbp, %rbp # clear frame pointer 235250c2277SThomas Gleixner movq initial_code(%rip), %rax 236250c2277SThomas Gleixner pushq $__KERNEL_CS # set correct cs 237250c2277SThomas Gleixner pushq %rax # target address in negative space 238250c2277SThomas Gleixner lretq 23931dcfec1SJosh Poimboeuf.Lafter_lret: 240015a2ea5SJosh PoimboeufEND(secondary_startup_64) 241250c2277SThomas Gleixner 24204633df0SBorislav Petkov#include "verify_cpu.S" 24304633df0SBorislav Petkov 24442e78e97SFenghua Yu#ifdef CONFIG_HOTPLUG_CPU 24542e78e97SFenghua Yu/* 24642e78e97SFenghua Yu * Boot CPU0 entry point. It's called from play_dead(). Everything has been set 24742e78e97SFenghua Yu * up already except stack. We just set up stack here. Then call 24879d243a0SBorislav Petkov * start_secondary() via .Ljump_to_C_code. 24942e78e97SFenghua Yu */ 25042e78e97SFenghua YuENTRY(start_cpu0) 251b32f96c7SJosh Poimboeuf movq initial_stack(%rip), %rsp 2522704fbb6SJosh Poimboeuf UNWIND_HINT_EMPTY 25379d243a0SBorislav Petkov jmp .Ljump_to_C_code 25442e78e97SFenghua YuENDPROC(start_cpu0) 25542e78e97SFenghua Yu#endif 25642e78e97SFenghua Yu 257b32f96c7SJosh Poimboeuf /* Both SMP bootup and ACPI suspend change these variables */ 258da5968aeSSam Ravnborg __REFDATA 2598170e6beSH. Peter Anvin .balign 8 2608170e6beSH. Peter Anvin GLOBAL(initial_code) 261250c2277SThomas Gleixner .quad x86_64_start_kernel 2628170e6beSH. Peter Anvin GLOBAL(initial_gs) 2632add8e23SBrian Gerst .quad INIT_PER_CPU_VAR(irq_stack_union) 264b32f96c7SJosh Poimboeuf GLOBAL(initial_stack) 26522dc3918SJosh Poimboeuf /* 26622dc3918SJosh Poimboeuf * The SIZEOF_PTREGS gap is a convention which helps the in-kernel 26722dc3918SJosh Poimboeuf * unwinder reliably detect the end of the stack. 26822dc3918SJosh Poimboeuf */ 26922dc3918SJosh Poimboeuf .quad init_thread_union + THREAD_SIZE - SIZEOF_PTREGS 270b9af7c0dSSuresh Siddha __FINITDATA 271250c2277SThomas Gleixner 2728170e6beSH. Peter Anvin __INIT 273cdeb6048SAndy LutomirskiENTRY(early_idt_handler_array) 274749c970aSAndi Kleen i = 0 275749c970aSAndi Kleen .rept NUM_EXCEPTION_VECTORS 27682c62fa0SJosh Poimboeuf .if ((EXCEPTION_ERRCODE_MASK >> i) & 1) == 0 2772704fbb6SJosh Poimboeuf UNWIND_HINT_IRET_REGS 2789900aa2fSH. Peter Anvin pushq $0 # Dummy error code, to make stack frame uniform 2792704fbb6SJosh Poimboeuf .else 2802704fbb6SJosh Poimboeuf UNWIND_HINT_IRET_REGS offset=8 2819900aa2fSH. Peter Anvin .endif 2829900aa2fSH. Peter Anvin pushq $i # 72(%rsp) Vector number 283cdeb6048SAndy Lutomirski jmp early_idt_handler_common 2842704fbb6SJosh Poimboeuf UNWIND_HINT_IRET_REGS 285749c970aSAndi Kleen i = i + 1 286cdeb6048SAndy Lutomirski .fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc 287749c970aSAndi Kleen .endr 2882704fbb6SJosh Poimboeuf UNWIND_HINT_IRET_REGS offset=16 289015a2ea5SJosh PoimboeufEND(early_idt_handler_array) 2908866cd9dSRoland McGrath 291cdeb6048SAndy Lutomirskiearly_idt_handler_common: 292cdeb6048SAndy Lutomirski /* 293cdeb6048SAndy Lutomirski * The stack is the hardware frame, an error code or zero, and the 294cdeb6048SAndy Lutomirski * vector number. 295cdeb6048SAndy Lutomirski */ 2969900aa2fSH. Peter Anvin cld 2979900aa2fSH. Peter Anvin 298250c2277SThomas Gleixner incl early_recursion_flag(%rip) 2999900aa2fSH. Peter Anvin 3007bbcdb1cSAndy Lutomirski /* The vector number is currently in the pt_regs->di slot. */ 3017bbcdb1cSAndy Lutomirski pushq %rsi /* pt_regs->si */ 3027bbcdb1cSAndy Lutomirski movq 8(%rsp), %rsi /* RSI = vector number */ 3037bbcdb1cSAndy Lutomirski movq %rdi, 8(%rsp) /* pt_regs->di = RDI */ 3047bbcdb1cSAndy Lutomirski pushq %rdx /* pt_regs->dx */ 3057bbcdb1cSAndy Lutomirski pushq %rcx /* pt_regs->cx */ 3067bbcdb1cSAndy Lutomirski pushq %rax /* pt_regs->ax */ 3077bbcdb1cSAndy Lutomirski pushq %r8 /* pt_regs->r8 */ 3087bbcdb1cSAndy Lutomirski pushq %r9 /* pt_regs->r9 */ 3097bbcdb1cSAndy Lutomirski pushq %r10 /* pt_regs->r10 */ 3107bbcdb1cSAndy Lutomirski pushq %r11 /* pt_regs->r11 */ 3117bbcdb1cSAndy Lutomirski pushq %rbx /* pt_regs->bx */ 3127bbcdb1cSAndy Lutomirski pushq %rbp /* pt_regs->bp */ 3137bbcdb1cSAndy Lutomirski pushq %r12 /* pt_regs->r12 */ 3147bbcdb1cSAndy Lutomirski pushq %r13 /* pt_regs->r13 */ 3157bbcdb1cSAndy Lutomirski pushq %r14 /* pt_regs->r14 */ 3167bbcdb1cSAndy Lutomirski pushq %r15 /* pt_regs->r15 */ 3172704fbb6SJosh Poimboeuf UNWIND_HINT_REGS 3189900aa2fSH. Peter Anvin 3197bbcdb1cSAndy Lutomirski cmpq $14,%rsi /* Page fault? */ 3208170e6beSH. Peter Anvin jnz 10f 3217bbcdb1cSAndy Lutomirski GET_CR2_INTO(%rdi) /* Can clobber any volatile register if pv */ 3228170e6beSH. Peter Anvin call early_make_pgtable 3238170e6beSH. Peter Anvin andl %eax,%eax 3247bbcdb1cSAndy Lutomirski jz 20f /* All good */ 3258170e6beSH. Peter Anvin 3268170e6beSH. Peter Anvin10: 3277bbcdb1cSAndy Lutomirski movq %rsp,%rdi /* RDI = pt_regs; RSI is already trapnr */ 3289900aa2fSH. Peter Anvin call early_fixup_exception 3299900aa2fSH. Peter Anvin 3300e861fbbSAndy Lutomirski20: 3319900aa2fSH. Peter Anvin decl early_recursion_flag(%rip) 3327bbcdb1cSAndy Lutomirski jmp restore_regs_and_iret 333015a2ea5SJosh PoimboeufEND(early_idt_handler_common) 3349900aa2fSH. Peter Anvin 3358170e6beSH. Peter Anvin __INITDATA 3368170e6beSH. Peter Anvin 3379900aa2fSH. Peter Anvin .balign 4 3380e861fbbSAndy LutomirskiGLOBAL(early_recursion_flag) 339250c2277SThomas Gleixner .long 0 340250c2277SThomas Gleixner 341250c2277SThomas Gleixner#define NEXT_PAGE(name) \ 342250c2277SThomas Gleixner .balign PAGE_SIZE; \ 3438170e6beSH. Peter AnvinGLOBAL(name) 344250c2277SThomas Gleixner 345250c2277SThomas Gleixner/* Automate the creation of 1 to 1 mapping pmd entries */ 346250c2277SThomas Gleixner#define PMDS(START, PERM, COUNT) \ 347250c2277SThomas Gleixner i = 0 ; \ 348250c2277SThomas Gleixner .rept (COUNT) ; \ 3490e192b99SCyrill Gorcunov .quad (START) + (i << PMD_SHIFT) + (PERM) ; \ 350250c2277SThomas Gleixner i = i + 1 ; \ 351250c2277SThomas Gleixner .endr 352250c2277SThomas Gleixner 3538170e6beSH. Peter Anvin __INITDATA 35465ade2f8SKirill A. ShutemovNEXT_PAGE(early_top_pgt) 3558170e6beSH. Peter Anvin .fill 511,8,0 356032370b9SKirill A. Shutemov#ifdef CONFIG_X86_5LEVEL 35721729f81STom Lendacky .quad level4_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 358032370b9SKirill A. Shutemov#else 35921729f81STom Lendacky .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 360032370b9SKirill A. Shutemov#endif 3618170e6beSH. Peter Anvin 3628170e6beSH. Peter AnvinNEXT_PAGE(early_dynamic_pgts) 3638170e6beSH. Peter Anvin .fill 512*EARLY_DYNAMIC_PAGE_TABLES,8,0 3648170e6beSH. Peter Anvin 365b9af7c0dSSuresh Siddha .data 3668170e6beSH. Peter Anvin 3678170e6beSH. Peter Anvin#ifndef CONFIG_XEN 36865ade2f8SKirill A. ShutemovNEXT_PAGE(init_top_pgt) 3698170e6beSH. Peter Anvin .fill 512,8,0 3708170e6beSH. Peter Anvin#else 37165ade2f8SKirill A. ShutemovNEXT_PAGE(init_top_pgt) 37221729f81STom Lendacky .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 373032370b9SKirill A. Shutemov .org init_top_pgt + PGD_PAGE_OFFSET*8, 0 37421729f81STom Lendacky .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 375032370b9SKirill A. Shutemov .org init_top_pgt + PGD_START_KERNEL*8, 0 376250c2277SThomas Gleixner /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */ 37721729f81STom Lendacky .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 378250c2277SThomas Gleixner 379250c2277SThomas GleixnerNEXT_PAGE(level3_ident_pgt) 38021729f81STom Lendacky .quad level2_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 381250c2277SThomas Gleixner .fill 511, 8, 0 3828170e6beSH. Peter AnvinNEXT_PAGE(level2_ident_pgt) 3838170e6beSH. Peter Anvin /* Since I easily can, map the first 1G. 3848170e6beSH. Peter Anvin * Don't set NX because code runs from these pages. 3858170e6beSH. Peter Anvin */ 3868170e6beSH. Peter Anvin PMDS(0, __PAGE_KERNEL_IDENT_LARGE_EXEC, PTRS_PER_PMD) 3878170e6beSH. Peter Anvin#endif 388250c2277SThomas Gleixner 389032370b9SKirill A. Shutemov#ifdef CONFIG_X86_5LEVEL 390032370b9SKirill A. ShutemovNEXT_PAGE(level4_kernel_pgt) 391032370b9SKirill A. Shutemov .fill 511,8,0 39221729f81STom Lendacky .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 393032370b9SKirill A. Shutemov#endif 394032370b9SKirill A. Shutemov 395250c2277SThomas GleixnerNEXT_PAGE(level3_kernel_pgt) 396a6523748SEduardo Habkost .fill L3_START_KERNEL,8,0 397250c2277SThomas Gleixner /* (2^48-(2*1024*1024*1024)-((2^39)*511))/(2^30) = 510 */ 39821729f81STom Lendacky .quad level2_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 39921729f81STom Lendacky .quad level2_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 400250c2277SThomas Gleixner 401250c2277SThomas GleixnerNEXT_PAGE(level2_kernel_pgt) 40288f3aec7SIngo Molnar /* 40385eb69a1SIngo Molnar * 512 MB kernel mapping. We spend a full page on this pagetable 40488f3aec7SIngo Molnar * anyway. 40588f3aec7SIngo Molnar * 40688f3aec7SIngo Molnar * The kernel code+data+bss must not be bigger than that. 40788f3aec7SIngo Molnar * 40885eb69a1SIngo Molnar * (NOTE: at +512MB starts the module area, see MODULES_VADDR. 40988f3aec7SIngo Molnar * If you want to increase this then increase MODULES_VADDR 41088f3aec7SIngo Molnar * too.) 41188f3aec7SIngo Molnar */ 4128490638cSJeremy Fitzhardinge PMDS(0, __PAGE_KERNEL_LARGE_EXEC, 413d4afe414SIngo Molnar KERNEL_IMAGE_SIZE/PMD_SIZE) 414250c2277SThomas Gleixner 4158170e6beSH. Peter AnvinNEXT_PAGE(level2_fixmap_pgt) 4168170e6beSH. Peter Anvin .fill 506,8,0 41721729f81STom Lendacky .quad level1_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 4188170e6beSH. Peter Anvin /* 8MB reserved for vsyscalls + a 2MB hole = 4 + 1 entries */ 4198170e6beSH. Peter Anvin .fill 5,8,0 4208170e6beSH. Peter Anvin 4218170e6beSH. Peter AnvinNEXT_PAGE(level1_fixmap_pgt) 422250c2277SThomas Gleixner .fill 512,8,0 423250c2277SThomas Gleixner 424250c2277SThomas Gleixner#undef PMDS 425250c2277SThomas Gleixner 426250c2277SThomas Gleixner .data 427250c2277SThomas Gleixner .align 16 428a939098aSGlauber Costa .globl early_gdt_descr 429a939098aSGlauber Costaearly_gdt_descr: 430a939098aSGlauber Costa .word GDT_ENTRIES*8-1 4313e5d8f97STejun Heoearly_gdt_descr_base: 4322add8e23SBrian Gerst .quad INIT_PER_CPU_VAR(gdt_page) 433250c2277SThomas Gleixner 434250c2277SThomas GleixnerENTRY(phys_base) 435250c2277SThomas Gleixner /* This must match the first entry in level2_kernel_pgt */ 436250c2277SThomas Gleixner .quad 0x0000000000000000 437784d5699SAl ViroEXPORT_SYMBOL(phys_base) 438250c2277SThomas Gleixner 4398c5e5ac3SJeremy Fitzhardinge#include "../../x86/xen/xen-head.S" 440250c2277SThomas Gleixner 44102b7da37STim Abbott __PAGE_ALIGNED_BSS 4428170e6beSH. Peter AnvinNEXT_PAGE(empty_zero_page) 443250c2277SThomas Gleixner .skip PAGE_SIZE 444784d5699SAl ViroEXPORT_SYMBOL(empty_zero_page) 445ef7f0d6aSAndrey Ryabinin 446