1b2441318SGreg Kroah-Hartman/* SPDX-License-Identifier: GPL-2.0 */ 2250c2277SThomas Gleixner/* 35b171e82SAlexander Kuleshov * linux/arch/x86/kernel/head_64.S -- start in 32bit and switch to 64bit 4250c2277SThomas Gleixner * 5250c2277SThomas Gleixner * Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE 6250c2277SThomas Gleixner * Copyright (C) 2000 Pavel Machek <pavel@suse.cz> 7250c2277SThomas Gleixner * Copyright (C) 2000 Karsten Keil <kkeil@suse.de> 8250c2277SThomas Gleixner * Copyright (C) 2001,2002 Andi Kleen <ak@suse.de> 9250c2277SThomas Gleixner * Copyright (C) 2005 Eric Biederman <ebiederm@xmission.com> 10250c2277SThomas Gleixner */ 11250c2277SThomas Gleixner 12250c2277SThomas Gleixner 13250c2277SThomas Gleixner#include <linux/linkage.h> 14250c2277SThomas Gleixner#include <linux/threads.h> 15250c2277SThomas Gleixner#include <linux/init.h> 16ca5999fdSMike Rapoport#include <linux/pgtable.h> 1765fddcfcSMike Rapoport#include <asm/segment.h> 18250c2277SThomas Gleixner#include <asm/page.h> 19250c2277SThomas Gleixner#include <asm/msr.h> 20250c2277SThomas Gleixner#include <asm/cache.h> 21369101daSCyrill Gorcunov#include <asm/processor-flags.h> 22b12d8db8STejun Heo#include <asm/percpu.h> 239900aa2fSH. Peter Anvin#include <asm/nops.h> 247bbcdb1cSAndy Lutomirski#include "../entry/calling.h" 25784d5699SAl Viro#include <asm/export.h> 26bd89004fSPeter Zijlstra#include <asm/nospec-branch.h> 2705ab1d8aSFeng Tang#include <asm/fixmap.h> 28250c2277SThomas Gleixner 29fdc0269eSJuergen Gross#ifdef CONFIG_PARAVIRT_XXL 3049a69787SGlauber de Oliveira Costa#include <asm/asm-offsets.h> 3149a69787SGlauber de Oliveira Costa#include <asm/paravirt.h> 3275da04f7SThomas Gleixner#define GET_CR2_INTO(reg) GET_CR2_INTO_AX ; _ASM_MOV %_ASM_AX, reg 3349a69787SGlauber de Oliveira Costa#else 349900aa2fSH. Peter Anvin#define INTERRUPT_RETURN iretq 3575da04f7SThomas Gleixner#define GET_CR2_INTO(reg) _ASM_MOV %cr2, reg 3649a69787SGlauber de Oliveira Costa#endif 3749a69787SGlauber de Oliveira Costa 3875da04f7SThomas Gleixner/* 3975da04f7SThomas Gleixner * We are not able to switch in one step to the final KERNEL ADDRESS SPACE 40250c2277SThomas Gleixner * because we need identity-mapped pages. 41250c2277SThomas Gleixner */ 42b9952ec7SKirill A. Shutemov#define l4_index(x) (((x) >> 39) & 511) 43a6523748SEduardo Habkost#define pud_index(x) (((x) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) 44a6523748SEduardo Habkost 45b9952ec7SKirill A. ShutemovL4_PAGE_OFFSET = l4_index(__PAGE_OFFSET_BASE_L4) 46b9952ec7SKirill A. ShutemovL4_START_KERNEL = l4_index(__START_KERNEL_map) 47b9952ec7SKirill A. Shutemov 48a6523748SEduardo HabkostL3_START_KERNEL = pud_index(__START_KERNEL_map) 49a6523748SEduardo Habkost 50250c2277SThomas Gleixner .text 514ae59b91STim Abbott __HEAD 52250c2277SThomas Gleixner .code64 5337818afdSJiri SlabySYM_CODE_START_NOALIGN(startup_64) 542704fbb6SJosh Poimboeuf UNWIND_HINT_EMPTY 55250c2277SThomas Gleixner /* 561256276cSKonrad Rzeszutek Wilk * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0, 57250c2277SThomas Gleixner * and someone has loaded an identity mapped page table 58250c2277SThomas Gleixner * for us. These identity mapped page tables map all of the 59250c2277SThomas Gleixner * kernel pages and possibly all of memory. 60250c2277SThomas Gleixner * 618170e6beSH. Peter Anvin * %rsi holds a physical pointer to real_mode_data. 62250c2277SThomas Gleixner * 63250c2277SThomas Gleixner * We come here either directly from a 64bit bootloader, or from 645b171e82SAlexander Kuleshov * arch/x86/boot/compressed/head_64.S. 65250c2277SThomas Gleixner * 66250c2277SThomas Gleixner * We only come here initially at boot nothing else comes here. 67250c2277SThomas Gleixner * 68250c2277SThomas Gleixner * Since we may be loaded at an address different from what we were 69250c2277SThomas Gleixner * compiled to run at we first fixup the physical addresses in our page 70250c2277SThomas Gleixner * tables and then reload them. 71250c2277SThomas Gleixner */ 72250c2277SThomas Gleixner 7322dc3918SJosh Poimboeuf /* Set up the stack for verify_cpu(), similar to initial_stack below */ 7422dc3918SJosh Poimboeuf leaq (__end_init_task - SIZEOF_PTREGS)(%rip), %rsp 7591ed140dSBorislav Petkov 76866b556eSJoerg Roedel leaq _text(%rip), %rdi 77866b556eSJoerg Roedel pushq %rsi 78866b556eSJoerg Roedel call startup_64_setup_env 79866b556eSJoerg Roedel popq %rsi 80866b556eSJoerg Roedel 81866b556eSJoerg Roedel /* Now switch to __KERNEL_CS so IRET works reliably */ 82866b556eSJoerg Roedel pushq $__KERNEL_CS 83866b556eSJoerg Roedel leaq .Lon_kernel_cs(%rip), %rax 84866b556eSJoerg Roedel pushq %rax 85866b556eSJoerg Roedel lretq 86866b556eSJoerg Roedel 87866b556eSJoerg Roedel.Lon_kernel_cs: 88866b556eSJoerg Roedel UNWIND_HINT_EMPTY 89866b556eSJoerg Roedel 9004633df0SBorislav Petkov /* Sanitize CPU configuration */ 9104633df0SBorislav Petkov call verify_cpu 9204633df0SBorislav Petkov 935868f365STom Lendacky /* 945868f365STom Lendacky * Perform pagetable fixups. Additionally, if SME is active, encrypt 955868f365STom Lendacky * the kernel and retrieve the modifier (SME encryption mask if SME 965868f365STom Lendacky * is active) to be added to the initial pgdir entry that will be 975868f365STom Lendacky * programmed into CR3. 985868f365STom Lendacky */ 99250c2277SThomas Gleixner leaq _text(%rip), %rdi 100c88d7150SKirill A. Shutemov pushq %rsi 101c88d7150SKirill A. Shutemov call __startup_64 102c88d7150SKirill A. Shutemov popq %rsi 103250c2277SThomas Gleixner 1045868f365STom Lendacky /* Form the CR3 value being sure to include the CR3 modifier */ 1055868f365STom Lendacky addq $(early_top_pgt - __START_KERNEL_map), %rax 1068170e6beSH. Peter Anvin jmp 1f 10737818afdSJiri SlabySYM_CODE_END(startup_64) 10837818afdSJiri Slaby 109bc7b11c0SJiri SlabySYM_CODE_START(secondary_startup_64) 1102704fbb6SJosh Poimboeuf UNWIND_HINT_EMPTY 111250c2277SThomas Gleixner /* 1121256276cSKonrad Rzeszutek Wilk * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0, 113250c2277SThomas Gleixner * and someone has loaded a mapped page table. 114250c2277SThomas Gleixner * 1158170e6beSH. Peter Anvin * %rsi holds a physical pointer to real_mode_data. 116250c2277SThomas Gleixner * 117250c2277SThomas Gleixner * We come here either from startup_64 (using physical addresses) 118250c2277SThomas Gleixner * or from trampoline.S (using virtual addresses). 119250c2277SThomas Gleixner * 120250c2277SThomas Gleixner * Using virtual addresses from trampoline.S removes the need 121250c2277SThomas Gleixner * to have any identity mapped pages in the kernel page table 122250c2277SThomas Gleixner * after the boot processor executes this code. 123250c2277SThomas Gleixner */ 124250c2277SThomas Gleixner 12504633df0SBorislav Petkov /* Sanitize CPU configuration */ 12604633df0SBorislav Petkov call verify_cpu 12704633df0SBorislav Petkov 1285868f365STom Lendacky /* 1295868f365STom Lendacky * Retrieve the modifier (SME encryption mask if SME is active) to be 1305868f365STom Lendacky * added to the initial pgdir entry that will be programmed into CR3. 1315868f365STom Lendacky */ 1325868f365STom Lendacky pushq %rsi 1335868f365STom Lendacky call __startup_secondary_64 1345868f365STom Lendacky popq %rsi 1355868f365STom Lendacky 1365868f365STom Lendacky /* Form the CR3 value being sure to include the CR3 modifier */ 1375868f365STom Lendacky addq $(init_top_pgt - __START_KERNEL_map), %rax 1388170e6beSH. Peter Anvin1: 1398170e6beSH. Peter Anvin 140032370b9SKirill A. Shutemov /* Enable PAE mode, PGE and LA57 */ 1418170e6beSH. Peter Anvin movl $(X86_CR4_PAE | X86_CR4_PGE), %ecx 142032370b9SKirill A. Shutemov#ifdef CONFIG_X86_5LEVEL 14339b95522SKirill A. Shutemov testl $1, __pgtable_l5_enabled(%rip) 1446f9dd329SKirill A. Shutemov jz 1f 145032370b9SKirill A. Shutemov orl $X86_CR4_LA57, %ecx 1466f9dd329SKirill A. Shutemov1: 147032370b9SKirill A. Shutemov#endif 1488170e6beSH. Peter Anvin movq %rcx, %cr4 149250c2277SThomas Gleixner 150032370b9SKirill A. Shutemov /* Setup early boot stage 4-/5-level pagetables. */ 151250c2277SThomas Gleixner addq phys_base(%rip), %rax 152250c2277SThomas Gleixner movq %rax, %cr3 153250c2277SThomas Gleixner 154250c2277SThomas Gleixner /* Ensure I am executing from virtual addresses */ 155250c2277SThomas Gleixner movq $1f, %rax 156bd89004fSPeter Zijlstra ANNOTATE_RETPOLINE_SAFE 157250c2277SThomas Gleixner jmp *%rax 158250c2277SThomas Gleixner1: 1592704fbb6SJosh Poimboeuf UNWIND_HINT_EMPTY 160250c2277SThomas Gleixner 161e04b8833SJoerg Roedel /* 162e04b8833SJoerg Roedel * We must switch to a new descriptor in kernel space for the GDT 163e04b8833SJoerg Roedel * because soon the kernel won't have access anymore to the userspace 164e04b8833SJoerg Roedel * addresses where we're currently running on. We have to do that here 165e04b8833SJoerg Roedel * because in 32bit we couldn't load a 64bit linear address. 166e04b8833SJoerg Roedel */ 167e04b8833SJoerg Roedel lgdt early_gdt_descr(%rip) 168e04b8833SJoerg Roedel 1697b99819dSJoerg Roedel /* set up data segments */ 1707b99819dSJoerg Roedel xorl %eax,%eax 1717b99819dSJoerg Roedel movl %eax,%ds 1727b99819dSJoerg Roedel movl %eax,%ss 1737b99819dSJoerg Roedel movl %eax,%es 1747b99819dSJoerg Roedel 1757b99819dSJoerg Roedel /* 1767b99819dSJoerg Roedel * We don't really need to load %fs or %gs, but load them anyway 1777b99819dSJoerg Roedel * to kill any stale realmode selectors. This allows execution 1787b99819dSJoerg Roedel * under VT hardware. 1797b99819dSJoerg Roedel */ 1807b99819dSJoerg Roedel movl %eax,%fs 1817b99819dSJoerg Roedel movl %eax,%gs 1827b99819dSJoerg Roedel 1837b99819dSJoerg Roedel /* Set up %gs. 1847b99819dSJoerg Roedel * 1857b99819dSJoerg Roedel * The base of %gs always points to fixed_percpu_data. If the 1867b99819dSJoerg Roedel * stack protector canary is enabled, it is located at %gs:40. 1877b99819dSJoerg Roedel * Note that, on SMP, the boot cpu uses init data section until 1887b99819dSJoerg Roedel * the per cpu areas are set up. 1897b99819dSJoerg Roedel */ 1907b99819dSJoerg Roedel movl $MSR_GS_BASE,%ecx 1917b99819dSJoerg Roedel movl initial_gs(%rip),%eax 1927b99819dSJoerg Roedel movl initial_gs+4(%rip),%edx 1937b99819dSJoerg Roedel wrmsr 1947b99819dSJoerg Roedel 1953add38cbSJoerg Roedel /* 1963add38cbSJoerg Roedel * Setup a boot time stack - Any secondary CPU will have lost its stack 1973add38cbSJoerg Roedel * by now because the cr3-switch above unmaps the real-mode stack 1983add38cbSJoerg Roedel */ 1993add38cbSJoerg Roedel movq initial_stack(%rip), %rsp 2003add38cbSJoerg Roedel 201f5963ba7SJoerg Roedel /* Setup and Load IDT */ 202f5963ba7SJoerg Roedel pushq %rsi 203f5963ba7SJoerg Roedel call early_setup_idt 204f5963ba7SJoerg Roedel popq %rsi 205f5963ba7SJoerg Roedel 206250c2277SThomas Gleixner /* Check if nx is implemented */ 207250c2277SThomas Gleixner movl $0x80000001, %eax 208250c2277SThomas Gleixner cpuid 209250c2277SThomas Gleixner movl %edx,%edi 210250c2277SThomas Gleixner 211250c2277SThomas Gleixner /* Setup EFER (Extended Feature Enable Register) */ 212250c2277SThomas Gleixner movl $MSR_EFER, %ecx 213250c2277SThomas Gleixner rdmsr 214250c2277SThomas Gleixner btsl $_EFER_SCE, %eax /* Enable System Call */ 215250c2277SThomas Gleixner btl $20,%edi /* No Execute supported? */ 216250c2277SThomas Gleixner jnc 1f 217250c2277SThomas Gleixner btsl $_EFER_NX, %eax 21878d77df7SH. Peter Anvin btsq $_PAGE_BIT_NX,early_pmd_flags(%rip) 219250c2277SThomas Gleixner1: wrmsr /* Make changes effective */ 220250c2277SThomas Gleixner 221250c2277SThomas Gleixner /* Setup cr0 */ 222369101daSCyrill Gorcunov movl $CR0_STATE, %eax 223250c2277SThomas Gleixner /* Make changes effective */ 224250c2277SThomas Gleixner movq %rax, %cr0 225250c2277SThomas Gleixner 226250c2277SThomas Gleixner /* zero EFLAGS after setting rsp */ 227250c2277SThomas Gleixner pushq $0 228250c2277SThomas Gleixner popfq 229250c2277SThomas Gleixner 2308170e6beSH. Peter Anvin /* rsi is pointer to real mode structure with interesting info. 231250c2277SThomas Gleixner pass it to C */ 2328170e6beSH. Peter Anvin movq %rsi, %rdi 233250c2277SThomas Gleixner 23479d243a0SBorislav Petkov.Ljump_to_C_code: 235a9468df5SJosh Poimboeuf /* 236a9468df5SJosh Poimboeuf * Jump to run C code and to be on a real kernel address. 237250c2277SThomas Gleixner * Since we are running on identity-mapped space we have to jump 238250c2277SThomas Gleixner * to the full 64bit address, this is only possible as indirect 239250c2277SThomas Gleixner * jump. In addition we need to ensure %cs is set so we make this 240250c2277SThomas Gleixner * a far return. 2418170e6beSH. Peter Anvin * 2428170e6beSH. Peter Anvin * Note: do not change to far jump indirect with 64bit offset. 2438170e6beSH. Peter Anvin * 2448170e6beSH. Peter Anvin * AMD does not support far jump indirect with 64bit offset. 2458170e6beSH. Peter Anvin * AMD64 Architecture Programmer's Manual, Volume 3: states only 2468170e6beSH. Peter Anvin * JMP FAR mem16:16 FF /5 Far jump indirect, 2478170e6beSH. Peter Anvin * with the target specified by a far pointer in memory. 2488170e6beSH. Peter Anvin * JMP FAR mem16:32 FF /5 Far jump indirect, 2498170e6beSH. Peter Anvin * with the target specified by a far pointer in memory. 2508170e6beSH. Peter Anvin * 2518170e6beSH. Peter Anvin * Intel64 does support 64bit offset. 2528170e6beSH. Peter Anvin * Software Developer Manual Vol 2: states: 2538170e6beSH. Peter Anvin * FF /5 JMP m16:16 Jump far, absolute indirect, 2548170e6beSH. Peter Anvin * address given in m16:16 2558170e6beSH. Peter Anvin * FF /5 JMP m16:32 Jump far, absolute indirect, 2568170e6beSH. Peter Anvin * address given in m16:32. 2578170e6beSH. Peter Anvin * REX.W + FF /5 JMP m16:64 Jump far, absolute indirect, 2588170e6beSH. Peter Anvin * address given in m16:64. 259250c2277SThomas Gleixner */ 26031dcfec1SJosh Poimboeuf pushq $.Lafter_lret # put return address on stack for unwinder 261a7bea830SJan Beulich xorl %ebp, %ebp # clear frame pointer 262250c2277SThomas Gleixner movq initial_code(%rip), %rax 263250c2277SThomas Gleixner pushq $__KERNEL_CS # set correct cs 264250c2277SThomas Gleixner pushq %rax # target address in negative space 265250c2277SThomas Gleixner lretq 26631dcfec1SJosh Poimboeuf.Lafter_lret: 267bc7b11c0SJiri SlabySYM_CODE_END(secondary_startup_64) 268250c2277SThomas Gleixner 26904633df0SBorislav Petkov#include "verify_cpu.S" 27004633df0SBorislav Petkov 27142e78e97SFenghua Yu#ifdef CONFIG_HOTPLUG_CPU 27242e78e97SFenghua Yu/* 27342e78e97SFenghua Yu * Boot CPU0 entry point. It's called from play_dead(). Everything has been set 27442e78e97SFenghua Yu * up already except stack. We just set up stack here. Then call 27579d243a0SBorislav Petkov * start_secondary() via .Ljump_to_C_code. 27642e78e97SFenghua Yu */ 277bc7b11c0SJiri SlabySYM_CODE_START(start_cpu0) 2782704fbb6SJosh Poimboeuf UNWIND_HINT_EMPTY 27961a73f5cSJosh Poimboeuf movq initial_stack(%rip), %rsp 28079d243a0SBorislav Petkov jmp .Ljump_to_C_code 281bc7b11c0SJiri SlabySYM_CODE_END(start_cpu0) 28242e78e97SFenghua Yu#endif 28342e78e97SFenghua Yu 284b32f96c7SJosh Poimboeuf /* Both SMP bootup and ACPI suspend change these variables */ 285da5968aeSSam Ravnborg __REFDATA 2868170e6beSH. Peter Anvin .balign 8 287b1bd27b9SJiri SlabySYM_DATA(initial_code, .quad x86_64_start_kernel) 288b1bd27b9SJiri SlabySYM_DATA(initial_gs, .quad INIT_PER_CPU_VAR(fixed_percpu_data)) 289b1bd27b9SJiri Slaby 29022dc3918SJosh Poimboeuf/* 291b1bd27b9SJiri Slaby * The SIZEOF_PTREGS gap is a convention which helps the in-kernel unwinder 292b1bd27b9SJiri Slaby * reliably detect the end of the stack. 29322dc3918SJosh Poimboeuf */ 294b1bd27b9SJiri SlabySYM_DATA(initial_stack, .quad init_thread_union + THREAD_SIZE - SIZEOF_PTREGS) 295b9af7c0dSSuresh Siddha __FINITDATA 296250c2277SThomas Gleixner 2978170e6beSH. Peter Anvin __INIT 298bc7b11c0SJiri SlabySYM_CODE_START(early_idt_handler_array) 299749c970aSAndi Kleen i = 0 300749c970aSAndi Kleen .rept NUM_EXCEPTION_VECTORS 30182c62fa0SJosh Poimboeuf .if ((EXCEPTION_ERRCODE_MASK >> i) & 1) == 0 3022704fbb6SJosh Poimboeuf UNWIND_HINT_IRET_REGS 3039900aa2fSH. Peter Anvin pushq $0 # Dummy error code, to make stack frame uniform 3042704fbb6SJosh Poimboeuf .else 3052704fbb6SJosh Poimboeuf UNWIND_HINT_IRET_REGS offset=8 3069900aa2fSH. Peter Anvin .endif 3079900aa2fSH. Peter Anvin pushq $i # 72(%rsp) Vector number 308cdeb6048SAndy Lutomirski jmp early_idt_handler_common 3092704fbb6SJosh Poimboeuf UNWIND_HINT_IRET_REGS 310749c970aSAndi Kleen i = i + 1 311cdeb6048SAndy Lutomirski .fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc 312749c970aSAndi Kleen .endr 3132704fbb6SJosh Poimboeuf UNWIND_HINT_IRET_REGS offset=16 314bc7b11c0SJiri SlabySYM_CODE_END(early_idt_handler_array) 3158866cd9dSRoland McGrath 316ef77e688SJiri SlabySYM_CODE_START_LOCAL(early_idt_handler_common) 317cdeb6048SAndy Lutomirski /* 318cdeb6048SAndy Lutomirski * The stack is the hardware frame, an error code or zero, and the 319cdeb6048SAndy Lutomirski * vector number. 320cdeb6048SAndy Lutomirski */ 3219900aa2fSH. Peter Anvin cld 3229900aa2fSH. Peter Anvin 323250c2277SThomas Gleixner incl early_recursion_flag(%rip) 3249900aa2fSH. Peter Anvin 3257bbcdb1cSAndy Lutomirski /* The vector number is currently in the pt_regs->di slot. */ 3267bbcdb1cSAndy Lutomirski pushq %rsi /* pt_regs->si */ 3277bbcdb1cSAndy Lutomirski movq 8(%rsp), %rsi /* RSI = vector number */ 3287bbcdb1cSAndy Lutomirski movq %rdi, 8(%rsp) /* pt_regs->di = RDI */ 3297bbcdb1cSAndy Lutomirski pushq %rdx /* pt_regs->dx */ 3307bbcdb1cSAndy Lutomirski pushq %rcx /* pt_regs->cx */ 3317bbcdb1cSAndy Lutomirski pushq %rax /* pt_regs->ax */ 3327bbcdb1cSAndy Lutomirski pushq %r8 /* pt_regs->r8 */ 3337bbcdb1cSAndy Lutomirski pushq %r9 /* pt_regs->r9 */ 3347bbcdb1cSAndy Lutomirski pushq %r10 /* pt_regs->r10 */ 3357bbcdb1cSAndy Lutomirski pushq %r11 /* pt_regs->r11 */ 3367bbcdb1cSAndy Lutomirski pushq %rbx /* pt_regs->bx */ 3377bbcdb1cSAndy Lutomirski pushq %rbp /* pt_regs->bp */ 3387bbcdb1cSAndy Lutomirski pushq %r12 /* pt_regs->r12 */ 3397bbcdb1cSAndy Lutomirski pushq %r13 /* pt_regs->r13 */ 3407bbcdb1cSAndy Lutomirski pushq %r14 /* pt_regs->r14 */ 3417bbcdb1cSAndy Lutomirski pushq %r15 /* pt_regs->r15 */ 3422704fbb6SJosh Poimboeuf UNWIND_HINT_REGS 3439900aa2fSH. Peter Anvin 3447bbcdb1cSAndy Lutomirski movq %rsp,%rdi /* RDI = pt_regs; RSI is already trapnr */ 3454b47cdbdSJoerg Roedel call do_early_exception 3469900aa2fSH. Peter Anvin 3479900aa2fSH. Peter Anvin decl early_recursion_flag(%rip) 34826c4ef9cSAndy Lutomirski jmp restore_regs_and_return_to_kernel 349ef77e688SJiri SlabySYM_CODE_END(early_idt_handler_common) 3509900aa2fSH. Peter Anvin 35174d8d9d5SJoerg Roedel#ifdef CONFIG_AMD_MEM_ENCRYPT 35274d8d9d5SJoerg Roedel/* 35374d8d9d5SJoerg Roedel * VC Exception handler used during very early boot. The 35474d8d9d5SJoerg Roedel * early_idt_handler_array can't be used because it returns via the 35574d8d9d5SJoerg Roedel * paravirtualized INTERRUPT_RETURN and pv-ops don't work that early. 35674d8d9d5SJoerg Roedel * 35774d8d9d5SJoerg Roedel * This handler will end up in the .init.text section and not be 35874d8d9d5SJoerg Roedel * available to boot secondary CPUs. 35974d8d9d5SJoerg Roedel */ 36074d8d9d5SJoerg RoedelSYM_CODE_START_NOALIGN(vc_no_ghcb) 36174d8d9d5SJoerg Roedel UNWIND_HINT_IRET_REGS offset=8 36274d8d9d5SJoerg Roedel 36374d8d9d5SJoerg Roedel /* Build pt_regs */ 36474d8d9d5SJoerg Roedel PUSH_AND_CLEAR_REGS 36574d8d9d5SJoerg Roedel 36674d8d9d5SJoerg Roedel /* Call C handler */ 36774d8d9d5SJoerg Roedel movq %rsp, %rdi 36874d8d9d5SJoerg Roedel movq ORIG_RAX(%rsp), %rsi 36974d8d9d5SJoerg Roedel call do_vc_no_ghcb 37074d8d9d5SJoerg Roedel 37174d8d9d5SJoerg Roedel /* Unwind pt_regs */ 37274d8d9d5SJoerg Roedel POP_REGS 37374d8d9d5SJoerg Roedel 37474d8d9d5SJoerg Roedel /* Remove Error Code */ 37574d8d9d5SJoerg Roedel addq $8, %rsp 37674d8d9d5SJoerg Roedel 37774d8d9d5SJoerg Roedel /* Pure iret required here - don't use INTERRUPT_RETURN */ 37874d8d9d5SJoerg Roedel iretq 37974d8d9d5SJoerg RoedelSYM_CODE_END(vc_no_ghcb) 38074d8d9d5SJoerg Roedel#endif 381b1bd27b9SJiri Slaby 382b1bd27b9SJiri Slaby#define SYM_DATA_START_PAGE_ALIGNED(name) \ 383b1bd27b9SJiri Slaby SYM_START(name, SYM_L_GLOBAL, .balign PAGE_SIZE) 384250c2277SThomas Gleixner 385d9e9a641SDave Hansen#ifdef CONFIG_PAGE_TABLE_ISOLATION 386d9e9a641SDave Hansen/* 387d9e9a641SDave Hansen * Each PGD needs to be 8k long and 8k aligned. We do not 388d9e9a641SDave Hansen * ever go out to userspace with these, so we do not 389d9e9a641SDave Hansen * strictly *need* the second page, but this allows us to 390d9e9a641SDave Hansen * have a single set_pgd() implementation that does not 391d9e9a641SDave Hansen * need to worry about whether it has 4k or 8k to work 392d9e9a641SDave Hansen * with. 393d9e9a641SDave Hansen * 394d9e9a641SDave Hansen * This ensures PGDs are 8k long: 395d9e9a641SDave Hansen */ 396d9e9a641SDave Hansen#define PTI_USER_PGD_FILL 512 397d9e9a641SDave Hansen/* This ensures they are 8k-aligned: */ 398b1bd27b9SJiri Slaby#define SYM_DATA_START_PTI_ALIGNED(name) \ 399b1bd27b9SJiri Slaby SYM_START(name, SYM_L_GLOBAL, .balign 2 * PAGE_SIZE) 400d9e9a641SDave Hansen#else 401b1bd27b9SJiri Slaby#define SYM_DATA_START_PTI_ALIGNED(name) \ 402b1bd27b9SJiri Slaby SYM_DATA_START_PAGE_ALIGNED(name) 403d9e9a641SDave Hansen#define PTI_USER_PGD_FILL 0 404d9e9a641SDave Hansen#endif 405d9e9a641SDave Hansen 406250c2277SThomas Gleixner/* Automate the creation of 1 to 1 mapping pmd entries */ 407250c2277SThomas Gleixner#define PMDS(START, PERM, COUNT) \ 408250c2277SThomas Gleixner i = 0 ; \ 409250c2277SThomas Gleixner .rept (COUNT) ; \ 4100e192b99SCyrill Gorcunov .quad (START) + (i << PMD_SHIFT) + (PERM) ; \ 411250c2277SThomas Gleixner i = i + 1 ; \ 412250c2277SThomas Gleixner .endr 413250c2277SThomas Gleixner 4148170e6beSH. Peter Anvin __INITDATA 4151a8770b7SJiri Slaby .balign 4 4161a8770b7SJiri Slaby 417b1bd27b9SJiri SlabySYM_DATA_START_PTI_ALIGNED(early_top_pgt) 4186f9dd329SKirill A. Shutemov .fill 512,8,0 419d9e9a641SDave Hansen .fill PTI_USER_PGD_FILL,8,0 420b1bd27b9SJiri SlabySYM_DATA_END(early_top_pgt) 4218170e6beSH. Peter Anvin 422b1bd27b9SJiri SlabySYM_DATA_START_PAGE_ALIGNED(early_dynamic_pgts) 4238170e6beSH. Peter Anvin .fill 512*EARLY_DYNAMIC_PAGE_TABLES,8,0 424b1bd27b9SJiri SlabySYM_DATA_END(early_dynamic_pgts) 4258170e6beSH. Peter Anvin 426b1bd27b9SJiri SlabySYM_DATA(early_recursion_flag, .long 0) 4271a8770b7SJiri Slaby 428b9af7c0dSSuresh Siddha .data 4298170e6beSH. Peter Anvin 4307733607fSMaran Wilson#if defined(CONFIG_XEN_PV) || defined(CONFIG_PVH) 431b1bd27b9SJiri SlabySYM_DATA_START_PTI_ALIGNED(init_top_pgt) 43221729f81STom Lendacky .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 433b9952ec7SKirill A. Shutemov .org init_top_pgt + L4_PAGE_OFFSET*8, 0 43421729f81STom Lendacky .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 435b9952ec7SKirill A. Shutemov .org init_top_pgt + L4_START_KERNEL*8, 0 436250c2277SThomas Gleixner /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */ 43721729f81STom Lendacky .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 438d9e9a641SDave Hansen .fill PTI_USER_PGD_FILL,8,0 439b1bd27b9SJiri SlabySYM_DATA_END(init_top_pgt) 440250c2277SThomas Gleixner 441b1bd27b9SJiri SlabySYM_DATA_START_PAGE_ALIGNED(level3_ident_pgt) 44221729f81STom Lendacky .quad level2_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 443250c2277SThomas Gleixner .fill 511, 8, 0 444b1bd27b9SJiri SlabySYM_DATA_END(level3_ident_pgt) 445b1bd27b9SJiri SlabySYM_DATA_START_PAGE_ALIGNED(level2_ident_pgt) 446430d4005SDave Hansen /* 447430d4005SDave Hansen * Since I easily can, map the first 1G. 4488170e6beSH. Peter Anvin * Don't set NX because code runs from these pages. 449430d4005SDave Hansen * 450430d4005SDave Hansen * Note: This sets _PAGE_GLOBAL despite whether 451430d4005SDave Hansen * the CPU supports it or it is enabled. But, 452430d4005SDave Hansen * the CPU should ignore the bit. 4538170e6beSH. Peter Anvin */ 4548170e6beSH. Peter Anvin PMDS(0, __PAGE_KERNEL_IDENT_LARGE_EXEC, PTRS_PER_PMD) 455b1bd27b9SJiri SlabySYM_DATA_END(level2_ident_pgt) 4564375c299SKirill A. Shutemov#else 457b1bd27b9SJiri SlabySYM_DATA_START_PTI_ALIGNED(init_top_pgt) 4584375c299SKirill A. Shutemov .fill 512,8,0 459d9e9a641SDave Hansen .fill PTI_USER_PGD_FILL,8,0 460b1bd27b9SJiri SlabySYM_DATA_END(init_top_pgt) 4618170e6beSH. Peter Anvin#endif 462250c2277SThomas Gleixner 463032370b9SKirill A. Shutemov#ifdef CONFIG_X86_5LEVEL 464b1bd27b9SJiri SlabySYM_DATA_START_PAGE_ALIGNED(level4_kernel_pgt) 465032370b9SKirill A. Shutemov .fill 511,8,0 46621729f81STom Lendacky .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 467b1bd27b9SJiri SlabySYM_DATA_END(level4_kernel_pgt) 468032370b9SKirill A. Shutemov#endif 469032370b9SKirill A. Shutemov 470b1bd27b9SJiri SlabySYM_DATA_START_PAGE_ALIGNED(level3_kernel_pgt) 471a6523748SEduardo Habkost .fill L3_START_KERNEL,8,0 472250c2277SThomas Gleixner /* (2^48-(2*1024*1024*1024)-((2^39)*511))/(2^30) = 510 */ 47321729f81STom Lendacky .quad level2_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 47421729f81STom Lendacky .quad level2_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 475b1bd27b9SJiri SlabySYM_DATA_END(level3_kernel_pgt) 476250c2277SThomas Gleixner 477b1bd27b9SJiri SlabySYM_DATA_START_PAGE_ALIGNED(level2_kernel_pgt) 47888f3aec7SIngo Molnar /* 47985eb69a1SIngo Molnar * 512 MB kernel mapping. We spend a full page on this pagetable 48088f3aec7SIngo Molnar * anyway. 48188f3aec7SIngo Molnar * 48288f3aec7SIngo Molnar * The kernel code+data+bss must not be bigger than that. 48388f3aec7SIngo Molnar * 48485eb69a1SIngo Molnar * (NOTE: at +512MB starts the module area, see MODULES_VADDR. 48588f3aec7SIngo Molnar * If you want to increase this then increase MODULES_VADDR 48688f3aec7SIngo Molnar * too.) 487430d4005SDave Hansen * 488430d4005SDave Hansen * This table is eventually used by the kernel during normal 489430d4005SDave Hansen * runtime. Care must be taken to clear out undesired bits 490430d4005SDave Hansen * later, like _PAGE_RW or _PAGE_GLOBAL in some cases. 49188f3aec7SIngo Molnar */ 4928490638cSJeremy Fitzhardinge PMDS(0, __PAGE_KERNEL_LARGE_EXEC, 493d4afe414SIngo Molnar KERNEL_IMAGE_SIZE/PMD_SIZE) 494b1bd27b9SJiri SlabySYM_DATA_END(level2_kernel_pgt) 495250c2277SThomas Gleixner 496b1bd27b9SJiri SlabySYM_DATA_START_PAGE_ALIGNED(level2_fixmap_pgt) 49705ab1d8aSFeng Tang .fill (512 - 4 - FIXMAP_PMD_NUM),8,0 49805ab1d8aSFeng Tang pgtno = 0 49905ab1d8aSFeng Tang .rept (FIXMAP_PMD_NUM) 50005ab1d8aSFeng Tang .quad level1_fixmap_pgt + (pgtno << PAGE_SHIFT) - __START_KERNEL_map \ 50105ab1d8aSFeng Tang + _PAGE_TABLE_NOENC; 50205ab1d8aSFeng Tang pgtno = pgtno + 1 50305ab1d8aSFeng Tang .endr 50405ab1d8aSFeng Tang /* 6 MB reserved space + a 2MB hole */ 50505ab1d8aSFeng Tang .fill 4,8,0 506b1bd27b9SJiri SlabySYM_DATA_END(level2_fixmap_pgt) 5078170e6beSH. Peter Anvin 508b1bd27b9SJiri SlabySYM_DATA_START_PAGE_ALIGNED(level1_fixmap_pgt) 50905ab1d8aSFeng Tang .rept (FIXMAP_PMD_NUM) 510250c2277SThomas Gleixner .fill 512,8,0 51105ab1d8aSFeng Tang .endr 512b1bd27b9SJiri SlabySYM_DATA_END(level1_fixmap_pgt) 513250c2277SThomas Gleixner 514250c2277SThomas Gleixner#undef PMDS 515250c2277SThomas Gleixner 516250c2277SThomas Gleixner .data 517250c2277SThomas Gleixner .align 16 518250c2277SThomas Gleixner 519b1bd27b9SJiri SlabySYM_DATA(early_gdt_descr, .word GDT_ENTRIES*8-1) 520b1bd27b9SJiri SlabySYM_DATA_LOCAL(early_gdt_descr_base, .quad INIT_PER_CPU_VAR(gdt_page)) 521b1bd27b9SJiri Slaby 522b1bd27b9SJiri Slaby .align 16 523250c2277SThomas Gleixner/* This must match the first entry in level2_kernel_pgt */ 524b1bd27b9SJiri SlabySYM_DATA(phys_base, .quad 0x0) 525784d5699SAl ViroEXPORT_SYMBOL(phys_base) 526250c2277SThomas Gleixner 5278c5e5ac3SJeremy Fitzhardinge#include "../../x86/xen/xen-head.S" 528250c2277SThomas Gleixner 52902b7da37STim Abbott __PAGE_ALIGNED_BSS 530b1bd27b9SJiri SlabySYM_DATA_START_PAGE_ALIGNED(empty_zero_page) 531250c2277SThomas Gleixner .skip PAGE_SIZE 532b1bd27b9SJiri SlabySYM_DATA_END(empty_zero_page) 533784d5699SAl ViroEXPORT_SYMBOL(empty_zero_page) 534ef7f0d6aSAndrey Ryabinin 535