1250c2277SThomas Gleixner/* 2250c2277SThomas Gleixner * linux/arch/x86_64/kernel/head.S -- start in 32bit and switch to 64bit 3250c2277SThomas Gleixner * 4250c2277SThomas Gleixner * Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE 5250c2277SThomas Gleixner * Copyright (C) 2000 Pavel Machek <pavel@suse.cz> 6250c2277SThomas Gleixner * Copyright (C) 2000 Karsten Keil <kkeil@suse.de> 7250c2277SThomas Gleixner * Copyright (C) 2001,2002 Andi Kleen <ak@suse.de> 8250c2277SThomas Gleixner * Copyright (C) 2005 Eric Biederman <ebiederm@xmission.com> 9250c2277SThomas Gleixner */ 10250c2277SThomas Gleixner 11250c2277SThomas Gleixner 12250c2277SThomas Gleixner#include <linux/linkage.h> 13250c2277SThomas Gleixner#include <linux/threads.h> 14250c2277SThomas Gleixner#include <linux/init.h> 15250c2277SThomas Gleixner#include <asm/segment.h> 16250c2277SThomas Gleixner#include <asm/pgtable.h> 17250c2277SThomas Gleixner#include <asm/page.h> 18250c2277SThomas Gleixner#include <asm/msr.h> 19250c2277SThomas Gleixner#include <asm/cache.h> 20369101daSCyrill Gorcunov#include <asm/processor-flags.h> 21b12d8db8STejun Heo#include <asm/percpu.h> 229900aa2fSH. Peter Anvin#include <asm/nops.h> 23250c2277SThomas Gleixner 2449a69787SGlauber de Oliveira Costa#ifdef CONFIG_PARAVIRT 2549a69787SGlauber de Oliveira Costa#include <asm/asm-offsets.h> 2649a69787SGlauber de Oliveira Costa#include <asm/paravirt.h> 27ffc4bc9cSH. Peter Anvin#define GET_CR2_INTO(reg) GET_CR2_INTO_RAX ; movq %rax, reg 2849a69787SGlauber de Oliveira Costa#else 29ffc4bc9cSH. Peter Anvin#define GET_CR2_INTO(reg) movq %cr2, reg 309900aa2fSH. Peter Anvin#define INTERRUPT_RETURN iretq 3149a69787SGlauber de Oliveira Costa#endif 3249a69787SGlauber de Oliveira Costa 333ad2f3fbSDaniel Mack/* we are not able to switch in one step to the final KERNEL ADDRESS SPACE 34250c2277SThomas Gleixner * because we need identity-mapped pages. 35250c2277SThomas Gleixner * 36250c2277SThomas Gleixner */ 37250c2277SThomas Gleixner 38a6523748SEduardo Habkost#define pud_index(x) (((x) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) 39a6523748SEduardo Habkost 40a6523748SEduardo HabkostL4_PAGE_OFFSET = pgd_index(__PAGE_OFFSET) 41a6523748SEduardo HabkostL3_PAGE_OFFSET = pud_index(__PAGE_OFFSET) 42a6523748SEduardo HabkostL4_START_KERNEL = pgd_index(__START_KERNEL_map) 43a6523748SEduardo HabkostL3_START_KERNEL = pud_index(__START_KERNEL_map) 44a6523748SEduardo Habkost 45250c2277SThomas Gleixner .text 464ae59b91STim Abbott __HEAD 47250c2277SThomas Gleixner .code64 48250c2277SThomas Gleixner .globl startup_64 49250c2277SThomas Gleixnerstartup_64: 50250c2277SThomas Gleixner 51250c2277SThomas Gleixner /* 52250c2277SThomas Gleixner * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 1, 53250c2277SThomas Gleixner * and someone has loaded an identity mapped page table 54250c2277SThomas Gleixner * for us. These identity mapped page tables map all of the 55250c2277SThomas Gleixner * kernel pages and possibly all of memory. 56250c2277SThomas Gleixner * 57250c2277SThomas Gleixner * %esi holds a physical pointer to real_mode_data. 58250c2277SThomas Gleixner * 59250c2277SThomas Gleixner * We come here either directly from a 64bit bootloader, or from 60250c2277SThomas Gleixner * arch/x86_64/boot/compressed/head.S. 61250c2277SThomas Gleixner * 62250c2277SThomas Gleixner * We only come here initially at boot nothing else comes here. 63250c2277SThomas Gleixner * 64250c2277SThomas Gleixner * Since we may be loaded at an address different from what we were 65250c2277SThomas Gleixner * compiled to run at we first fixup the physical addresses in our page 66250c2277SThomas Gleixner * tables and then reload them. 67250c2277SThomas Gleixner */ 68250c2277SThomas Gleixner 69250c2277SThomas Gleixner /* Compute the delta between the address I am compiled to run at and the 70250c2277SThomas Gleixner * address I am actually running at. 71250c2277SThomas Gleixner */ 72250c2277SThomas Gleixner leaq _text(%rip), %rbp 73250c2277SThomas Gleixner subq $_text - __START_KERNEL_map, %rbp 74250c2277SThomas Gleixner 75250c2277SThomas Gleixner /* Is the address not 2M aligned? */ 76250c2277SThomas Gleixner movq %rbp, %rax 7731422c51SAndi Kleen andl $~PMD_PAGE_MASK, %eax 78250c2277SThomas Gleixner testl %eax, %eax 79250c2277SThomas Gleixner jnz bad_address 80250c2277SThomas Gleixner 81250c2277SThomas Gleixner /* Is the address too large? */ 82250c2277SThomas Gleixner leaq _text(%rip), %rdx 83250c2277SThomas Gleixner movq $PGDIR_SIZE, %rax 84250c2277SThomas Gleixner cmpq %rax, %rdx 85250c2277SThomas Gleixner jae bad_address 86250c2277SThomas Gleixner 87250c2277SThomas Gleixner /* Fixup the physical addresses in the page table 88250c2277SThomas Gleixner */ 89250c2277SThomas Gleixner addq %rbp, init_level4_pgt + 0(%rip) 90a6523748SEduardo Habkost addq %rbp, init_level4_pgt + (L4_PAGE_OFFSET*8)(%rip) 91a6523748SEduardo Habkost addq %rbp, init_level4_pgt + (L4_START_KERNEL*8)(%rip) 92250c2277SThomas Gleixner 93250c2277SThomas Gleixner addq %rbp, level3_ident_pgt + 0(%rip) 94250c2277SThomas Gleixner 95250c2277SThomas Gleixner addq %rbp, level3_kernel_pgt + (510*8)(%rip) 96250c2277SThomas Gleixner addq %rbp, level3_kernel_pgt + (511*8)(%rip) 97250c2277SThomas Gleixner 98250c2277SThomas Gleixner addq %rbp, level2_fixmap_pgt + (506*8)(%rip) 99250c2277SThomas Gleixner 100250c2277SThomas Gleixner /* Add an Identity mapping if I am above 1G */ 101250c2277SThomas Gleixner leaq _text(%rip), %rdi 10231422c51SAndi Kleen andq $PMD_PAGE_MASK, %rdi 103250c2277SThomas Gleixner 104250c2277SThomas Gleixner movq %rdi, %rax 105250c2277SThomas Gleixner shrq $PUD_SHIFT, %rax 106250c2277SThomas Gleixner andq $(PTRS_PER_PUD - 1), %rax 107250c2277SThomas Gleixner jz ident_complete 108250c2277SThomas Gleixner 109250c2277SThomas Gleixner leaq (level2_spare_pgt - __START_KERNEL_map + _KERNPG_TABLE)(%rbp), %rdx 110250c2277SThomas Gleixner leaq level3_ident_pgt(%rip), %rbx 111250c2277SThomas Gleixner movq %rdx, 0(%rbx, %rax, 8) 112250c2277SThomas Gleixner 113250c2277SThomas Gleixner movq %rdi, %rax 114250c2277SThomas Gleixner shrq $PMD_SHIFT, %rax 115250c2277SThomas Gleixner andq $(PTRS_PER_PMD - 1), %rax 116b2bc2731SSuresh Siddha leaq __PAGE_KERNEL_IDENT_LARGE_EXEC(%rdi), %rdx 117250c2277SThomas Gleixner leaq level2_spare_pgt(%rip), %rbx 118250c2277SThomas Gleixner movq %rdx, 0(%rbx, %rax, 8) 119250c2277SThomas Gleixnerident_complete: 120250c2277SThomas Gleixner 12131eedd82SThomas Gleixner /* 12231eedd82SThomas Gleixner * Fixup the kernel text+data virtual addresses. Note that 12331eedd82SThomas Gleixner * we might write invalid pmds, when the kernel is relocated 12431eedd82SThomas Gleixner * cleanup_highmap() fixes this up along with the mappings 12531eedd82SThomas Gleixner * beyond _end. 126250c2277SThomas Gleixner */ 12731eedd82SThomas Gleixner 128250c2277SThomas Gleixner leaq level2_kernel_pgt(%rip), %rdi 129250c2277SThomas Gleixner leaq 4096(%rdi), %r8 130250c2277SThomas Gleixner /* See if it is a valid page table entry */ 131250c2277SThomas Gleixner1: testq $1, 0(%rdi) 132250c2277SThomas Gleixner jz 2f 133250c2277SThomas Gleixner addq %rbp, 0(%rdi) 134250c2277SThomas Gleixner /* Go to the next page */ 135250c2277SThomas Gleixner2: addq $8, %rdi 136250c2277SThomas Gleixner cmp %r8, %rdi 137250c2277SThomas Gleixner jne 1b 138250c2277SThomas Gleixner 139250c2277SThomas Gleixner /* Fixup phys_base */ 140250c2277SThomas Gleixner addq %rbp, phys_base(%rip) 141250c2277SThomas Gleixner 142250c2277SThomas Gleixner /* Due to ENTRY(), sometimes the empty space gets filled with 143250c2277SThomas Gleixner * zeros. Better take a jmp than relying on empty space being 144250c2277SThomas Gleixner * filled with 0x90 (nop) 145250c2277SThomas Gleixner */ 146250c2277SThomas Gleixner jmp secondary_startup_64 147250c2277SThomas GleixnerENTRY(secondary_startup_64) 148250c2277SThomas Gleixner /* 149250c2277SThomas Gleixner * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 1, 150250c2277SThomas Gleixner * and someone has loaded a mapped page table. 151250c2277SThomas Gleixner * 152250c2277SThomas Gleixner * %esi holds a physical pointer to real_mode_data. 153250c2277SThomas Gleixner * 154250c2277SThomas Gleixner * We come here either from startup_64 (using physical addresses) 155250c2277SThomas Gleixner * or from trampoline.S (using virtual addresses). 156250c2277SThomas Gleixner * 157250c2277SThomas Gleixner * Using virtual addresses from trampoline.S removes the need 158250c2277SThomas Gleixner * to have any identity mapped pages in the kernel page table 159250c2277SThomas Gleixner * after the boot processor executes this code. 160250c2277SThomas Gleixner */ 161250c2277SThomas Gleixner 162250c2277SThomas Gleixner /* Enable PAE mode and PGE */ 16305139d8fSCyrill Gorcunov movl $(X86_CR4_PAE | X86_CR4_PGE), %eax 164250c2277SThomas Gleixner movq %rax, %cr4 165250c2277SThomas Gleixner 166250c2277SThomas Gleixner /* Setup early boot stage 4 level pagetables. */ 167250c2277SThomas Gleixner movq $(init_level4_pgt - __START_KERNEL_map), %rax 168250c2277SThomas Gleixner addq phys_base(%rip), %rax 169250c2277SThomas Gleixner movq %rax, %cr3 170250c2277SThomas Gleixner 171250c2277SThomas Gleixner /* Ensure I am executing from virtual addresses */ 172250c2277SThomas Gleixner movq $1f, %rax 173250c2277SThomas Gleixner jmp *%rax 174250c2277SThomas Gleixner1: 175250c2277SThomas Gleixner 176250c2277SThomas Gleixner /* Check if nx is implemented */ 177250c2277SThomas Gleixner movl $0x80000001, %eax 178250c2277SThomas Gleixner cpuid 179250c2277SThomas Gleixner movl %edx,%edi 180250c2277SThomas Gleixner 181250c2277SThomas Gleixner /* Setup EFER (Extended Feature Enable Register) */ 182250c2277SThomas Gleixner movl $MSR_EFER, %ecx 183250c2277SThomas Gleixner rdmsr 184250c2277SThomas Gleixner btsl $_EFER_SCE, %eax /* Enable System Call */ 185250c2277SThomas Gleixner btl $20,%edi /* No Execute supported? */ 186250c2277SThomas Gleixner jnc 1f 187250c2277SThomas Gleixner btsl $_EFER_NX, %eax 188250c2277SThomas Gleixner1: wrmsr /* Make changes effective */ 189250c2277SThomas Gleixner 190250c2277SThomas Gleixner /* Setup cr0 */ 191369101daSCyrill Gorcunov#define CR0_STATE (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | \ 192369101daSCyrill Gorcunov X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | \ 193369101daSCyrill Gorcunov X86_CR0_PG) 194369101daSCyrill Gorcunov movl $CR0_STATE, %eax 195250c2277SThomas Gleixner /* Make changes effective */ 196250c2277SThomas Gleixner movq %rax, %cr0 197250c2277SThomas Gleixner 198250c2277SThomas Gleixner /* Setup a boot time stack */ 1999cf4f298SGlauber Costa movq stack_start(%rip),%rsp 200250c2277SThomas Gleixner 201250c2277SThomas Gleixner /* zero EFLAGS after setting rsp */ 202250c2277SThomas Gleixner pushq $0 203250c2277SThomas Gleixner popfq 204250c2277SThomas Gleixner 205250c2277SThomas Gleixner /* 206250c2277SThomas Gleixner * We must switch to a new descriptor in kernel space for the GDT 207250c2277SThomas Gleixner * because soon the kernel won't have access anymore to the userspace 208250c2277SThomas Gleixner * addresses where we're currently running on. We have to do that here 209250c2277SThomas Gleixner * because in 32bit we couldn't load a 64bit linear address. 210250c2277SThomas Gleixner */ 211a939098aSGlauber Costa lgdt early_gdt_descr(%rip) 212250c2277SThomas Gleixner 2138ec6993dSBrian Gerst /* set up data segments */ 2148ec6993dSBrian Gerst xorl %eax,%eax 215250c2277SThomas Gleixner movl %eax,%ds 216250c2277SThomas Gleixner movl %eax,%ss 217250c2277SThomas Gleixner movl %eax,%es 218250c2277SThomas Gleixner 219250c2277SThomas Gleixner /* 220250c2277SThomas Gleixner * We don't really need to load %fs or %gs, but load them anyway 221250c2277SThomas Gleixner * to kill any stale realmode selectors. This allows execution 222250c2277SThomas Gleixner * under VT hardware. 223250c2277SThomas Gleixner */ 224250c2277SThomas Gleixner movl %eax,%fs 225250c2277SThomas Gleixner movl %eax,%gs 226250c2277SThomas Gleixner 227f32ff538STejun Heo /* Set up %gs. 228f32ff538STejun Heo * 229947e76cdSBrian Gerst * The base of %gs always points to the bottom of the irqstack 230947e76cdSBrian Gerst * union. If the stack protector canary is enabled, it is 231947e76cdSBrian Gerst * located at %gs:40. Note that, on SMP, the boot cpu uses 232947e76cdSBrian Gerst * init data section till per cpu areas are set up. 233250c2277SThomas Gleixner */ 234250c2277SThomas Gleixner movl $MSR_GS_BASE,%ecx 235650fb439SBrian Gerst movl initial_gs(%rip),%eax 236650fb439SBrian Gerst movl initial_gs+4(%rip),%edx 237250c2277SThomas Gleixner wrmsr 238250c2277SThomas Gleixner 239250c2277SThomas Gleixner /* esi is pointer to real mode structure with interesting info. 240250c2277SThomas Gleixner pass it to C */ 241250c2277SThomas Gleixner movl %esi, %edi 242250c2277SThomas Gleixner 243250c2277SThomas Gleixner /* Finally jump to run C code and to be on real kernel address 244250c2277SThomas Gleixner * Since we are running on identity-mapped space we have to jump 245250c2277SThomas Gleixner * to the full 64bit address, this is only possible as indirect 246250c2277SThomas Gleixner * jump. In addition we need to ensure %cs is set so we make this 247250c2277SThomas Gleixner * a far return. 248250c2277SThomas Gleixner */ 249250c2277SThomas Gleixner movq initial_code(%rip),%rax 250250c2277SThomas Gleixner pushq $0 # fake return address to stop unwinder 251250c2277SThomas Gleixner pushq $__KERNEL_CS # set correct cs 252250c2277SThomas Gleixner pushq %rax # target address in negative space 253250c2277SThomas Gleixner lretq 254250c2277SThomas Gleixner 25542e78e97SFenghua Yu#ifdef CONFIG_HOTPLUG_CPU 25642e78e97SFenghua Yu/* 25742e78e97SFenghua Yu * Boot CPU0 entry point. It's called from play_dead(). Everything has been set 25842e78e97SFenghua Yu * up already except stack. We just set up stack here. Then call 25942e78e97SFenghua Yu * start_secondary(). 26042e78e97SFenghua Yu */ 26142e78e97SFenghua YuENTRY(start_cpu0) 26242e78e97SFenghua Yu movq stack_start(%rip),%rsp 26342e78e97SFenghua Yu movq initial_code(%rip),%rax 26442e78e97SFenghua Yu pushq $0 # fake return address to stop unwinder 26542e78e97SFenghua Yu pushq $__KERNEL_CS # set correct cs 26642e78e97SFenghua Yu pushq %rax # target address in negative space 26742e78e97SFenghua Yu lretq 26842e78e97SFenghua YuENDPROC(start_cpu0) 26942e78e97SFenghua Yu#endif 27042e78e97SFenghua Yu 271250c2277SThomas Gleixner /* SMP bootup changes these two */ 272da5968aeSSam Ravnborg __REFDATA 273250c2277SThomas Gleixner .align 8 274f1fbabb3SSam Ravnborg ENTRY(initial_code) 275250c2277SThomas Gleixner .quad x86_64_start_kernel 276f32ff538STejun Heo ENTRY(initial_gs) 2772add8e23SBrian Gerst .quad INIT_PER_CPU_VAR(irq_stack_union) 278f1fbabb3SSam Ravnborg 2799cf4f298SGlauber Costa ENTRY(stack_start) 280250c2277SThomas Gleixner .quad init_thread_union+THREAD_SIZE-8 2819cf4f298SGlauber Costa .word 0 282b9af7c0dSSuresh Siddha __FINITDATA 283250c2277SThomas Gleixner 284250c2277SThomas Gleixnerbad_address: 285250c2277SThomas Gleixner jmp bad_address 286250c2277SThomas Gleixner 28741bd4eacSAndi Kleen .section ".init.text","ax" 2888866cd9dSRoland McGrath .globl early_idt_handlers 2898866cd9dSRoland McGrathearly_idt_handlers: 2909900aa2fSH. Peter Anvin # 104(%rsp) %rflags 2919900aa2fSH. Peter Anvin # 96(%rsp) %cs 2929900aa2fSH. Peter Anvin # 88(%rsp) %rip 2939900aa2fSH. Peter Anvin # 80(%rsp) error code 294749c970aSAndi Kleen i = 0 295749c970aSAndi Kleen .rept NUM_EXCEPTION_VECTORS 2969900aa2fSH. Peter Anvin .if (EXCEPTION_ERRCODE_MASK >> i) & 1 2979900aa2fSH. Peter Anvin ASM_NOP2 2989900aa2fSH. Peter Anvin .else 2999900aa2fSH. Peter Anvin pushq $0 # Dummy error code, to make stack frame uniform 3009900aa2fSH. Peter Anvin .endif 3019900aa2fSH. Peter Anvin pushq $i # 72(%rsp) Vector number 302749c970aSAndi Kleen jmp early_idt_handler 303749c970aSAndi Kleen i = i + 1 304749c970aSAndi Kleen .endr 3058866cd9dSRoland McGrath 306250c2277SThomas GleixnerENTRY(early_idt_handler) 3079900aa2fSH. Peter Anvin cld 3089900aa2fSH. Peter Anvin 309250c2277SThomas Gleixner cmpl $2,early_recursion_flag(%rip) 310250c2277SThomas Gleixner jz 1f 311250c2277SThomas Gleixner incl early_recursion_flag(%rip) 3129900aa2fSH. Peter Anvin 3139900aa2fSH. Peter Anvin pushq %rax # 64(%rsp) 3149900aa2fSH. Peter Anvin pushq %rcx # 56(%rsp) 3159900aa2fSH. Peter Anvin pushq %rdx # 48(%rsp) 3169900aa2fSH. Peter Anvin pushq %rsi # 40(%rsp) 3179900aa2fSH. Peter Anvin pushq %rdi # 32(%rsp) 3189900aa2fSH. Peter Anvin pushq %r8 # 24(%rsp) 3199900aa2fSH. Peter Anvin pushq %r9 # 16(%rsp) 3209900aa2fSH. Peter Anvin pushq %r10 # 8(%rsp) 3219900aa2fSH. Peter Anvin pushq %r11 # 0(%rsp) 3229900aa2fSH. Peter Anvin 3239900aa2fSH. Peter Anvin cmpl $__KERNEL_CS,96(%rsp) 3249900aa2fSH. Peter Anvin jne 10f 3259900aa2fSH. Peter Anvin 3269900aa2fSH. Peter Anvin leaq 88(%rsp),%rdi # Pointer to %rip 3279900aa2fSH. Peter Anvin call early_fixup_exception 3289900aa2fSH. Peter Anvin andl %eax,%eax 3299900aa2fSH. Peter Anvin jnz 20f # Found an exception entry 3309900aa2fSH. Peter Anvin 3319900aa2fSH. Peter Anvin10: 3329900aa2fSH. Peter Anvin#ifdef CONFIG_EARLY_PRINTK 3339900aa2fSH. Peter Anvin GET_CR2_INTO(%r9) # can clobber any volatile register if pv 3349900aa2fSH. Peter Anvin movl 80(%rsp),%r8d # error code 3359900aa2fSH. Peter Anvin movl 72(%rsp),%esi # vector number 3369900aa2fSH. Peter Anvin movl 96(%rsp),%edx # %cs 3379900aa2fSH. Peter Anvin movq 88(%rsp),%rcx # %rip 3388866cd9dSRoland McGrath xorl %eax,%eax 339250c2277SThomas Gleixner leaq early_idt_msg(%rip),%rdi 340250c2277SThomas Gleixner call early_printk 341250c2277SThomas Gleixner cmpl $2,early_recursion_flag(%rip) 342250c2277SThomas Gleixner jz 1f 343250c2277SThomas Gleixner call dump_stack 344250c2277SThomas Gleixner#ifdef CONFIG_KALLSYMS 345250c2277SThomas Gleixner leaq early_idt_ripmsg(%rip),%rdi 3469900aa2fSH. Peter Anvin movq 40(%rsp),%rsi # %rip again 347250c2277SThomas Gleixner call __print_symbol 348250c2277SThomas Gleixner#endif 349076f9776SIngo Molnar#endif /* EARLY_PRINTK */ 350250c2277SThomas Gleixner1: hlt 351250c2277SThomas Gleixner jmp 1b 352076f9776SIngo Molnar 3539900aa2fSH. Peter Anvin20: # Exception table entry found 3549900aa2fSH. Peter Anvin popq %r11 3559900aa2fSH. Peter Anvin popq %r10 3569900aa2fSH. Peter Anvin popq %r9 3579900aa2fSH. Peter Anvin popq %r8 3589900aa2fSH. Peter Anvin popq %rdi 3599900aa2fSH. Peter Anvin popq %rsi 3609900aa2fSH. Peter Anvin popq %rdx 3619900aa2fSH. Peter Anvin popq %rcx 3629900aa2fSH. Peter Anvin popq %rax 3639900aa2fSH. Peter Anvin addq $16,%rsp # drop vector number and error code 3649900aa2fSH. Peter Anvin decl early_recursion_flag(%rip) 3659900aa2fSH. Peter Anvin INTERRUPT_RETURN 3669900aa2fSH. Peter Anvin 3679900aa2fSH. Peter Anvin .balign 4 368250c2277SThomas Gleixnerearly_recursion_flag: 369250c2277SThomas Gleixner .long 0 370250c2277SThomas Gleixner 3719900aa2fSH. Peter Anvin#ifdef CONFIG_EARLY_PRINTK 372250c2277SThomas Gleixnerearly_idt_msg: 3738866cd9dSRoland McGrath .asciz "PANIC: early exception %02lx rip %lx:%lx error %lx cr2 %lx\n" 374250c2277SThomas Gleixnerearly_idt_ripmsg: 375250c2277SThomas Gleixner .asciz "RIP %s\n" 376076f9776SIngo Molnar#endif /* CONFIG_EARLY_PRINTK */ 37741bd4eacSAndi Kleen .previous 378250c2277SThomas Gleixner 379250c2277SThomas Gleixner#define NEXT_PAGE(name) \ 380250c2277SThomas Gleixner .balign PAGE_SIZE; \ 381250c2277SThomas GleixnerENTRY(name) 382250c2277SThomas Gleixner 383250c2277SThomas Gleixner/* Automate the creation of 1 to 1 mapping pmd entries */ 384250c2277SThomas Gleixner#define PMDS(START, PERM, COUNT) \ 385250c2277SThomas Gleixner i = 0 ; \ 386250c2277SThomas Gleixner .rept (COUNT) ; \ 3870e192b99SCyrill Gorcunov .quad (START) + (i << PMD_SHIFT) + (PERM) ; \ 388250c2277SThomas Gleixner i = i + 1 ; \ 389250c2277SThomas Gleixner .endr 390250c2277SThomas Gleixner 391b9af7c0dSSuresh Siddha .data 392250c2277SThomas Gleixner /* 393250c2277SThomas Gleixner * This default setting generates an ident mapping at address 0x100000 394250c2277SThomas Gleixner * and a mapping for the kernel that precisely maps virtual address 395250c2277SThomas Gleixner * 0xffffffff80000000 to physical address 0x000000. (always using 396250c2277SThomas Gleixner * 2Mbyte large pages provided by PAE mode) 397250c2277SThomas Gleixner */ 398250c2277SThomas GleixnerNEXT_PAGE(init_level4_pgt) 399250c2277SThomas Gleixner .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE 400a6523748SEduardo Habkost .org init_level4_pgt + L4_PAGE_OFFSET*8, 0 401250c2277SThomas Gleixner .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE 402a6523748SEduardo Habkost .org init_level4_pgt + L4_START_KERNEL*8, 0 403250c2277SThomas Gleixner /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */ 404250c2277SThomas Gleixner .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE 405250c2277SThomas Gleixner 406250c2277SThomas GleixnerNEXT_PAGE(level3_ident_pgt) 407250c2277SThomas Gleixner .quad level2_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE 408250c2277SThomas Gleixner .fill 511,8,0 409250c2277SThomas Gleixner 410250c2277SThomas GleixnerNEXT_PAGE(level3_kernel_pgt) 411a6523748SEduardo Habkost .fill L3_START_KERNEL,8,0 412250c2277SThomas Gleixner /* (2^48-(2*1024*1024*1024)-((2^39)*511))/(2^30) = 510 */ 413250c2277SThomas Gleixner .quad level2_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE 414250c2277SThomas Gleixner .quad level2_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE 415250c2277SThomas Gleixner 416250c2277SThomas GleixnerNEXT_PAGE(level2_fixmap_pgt) 4176596f242SIngo Molnar .fill 506,8,0 4186596f242SIngo Molnar .quad level1_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE 4196596f242SIngo Molnar /* 8MB reserved for vsyscalls + a 2MB hole = 4 + 1 entries */ 4206596f242SIngo Molnar .fill 5,8,0 4216596f242SIngo Molnar 4226596f242SIngo MolnarNEXT_PAGE(level1_fixmap_pgt) 423250c2277SThomas Gleixner .fill 512,8,0 424250c2277SThomas Gleixner 425250c2277SThomas GleixnerNEXT_PAGE(level2_ident_pgt) 426250c2277SThomas Gleixner /* Since I easily can, map the first 1G. 427250c2277SThomas Gleixner * Don't set NX because code runs from these pages. 428250c2277SThomas Gleixner */ 429b2bc2731SSuresh Siddha PMDS(0, __PAGE_KERNEL_IDENT_LARGE_EXEC, PTRS_PER_PMD) 430250c2277SThomas Gleixner 431250c2277SThomas GleixnerNEXT_PAGE(level2_kernel_pgt) 43288f3aec7SIngo Molnar /* 43385eb69a1SIngo Molnar * 512 MB kernel mapping. We spend a full page on this pagetable 43488f3aec7SIngo Molnar * anyway. 43588f3aec7SIngo Molnar * 43688f3aec7SIngo Molnar * The kernel code+data+bss must not be bigger than that. 43788f3aec7SIngo Molnar * 43885eb69a1SIngo Molnar * (NOTE: at +512MB starts the module area, see MODULES_VADDR. 43988f3aec7SIngo Molnar * If you want to increase this then increase MODULES_VADDR 44088f3aec7SIngo Molnar * too.) 44188f3aec7SIngo Molnar */ 4428490638cSJeremy Fitzhardinge PMDS(0, __PAGE_KERNEL_LARGE_EXEC, 443d4afe414SIngo Molnar KERNEL_IMAGE_SIZE/PMD_SIZE) 444250c2277SThomas Gleixner 445250c2277SThomas GleixnerNEXT_PAGE(level2_spare_pgt) 446250c2277SThomas Gleixner .fill 512, 8, 0 447250c2277SThomas Gleixner 448250c2277SThomas Gleixner#undef PMDS 449250c2277SThomas Gleixner#undef NEXT_PAGE 450250c2277SThomas Gleixner 451250c2277SThomas Gleixner .data 452250c2277SThomas Gleixner .align 16 453a939098aSGlauber Costa .globl early_gdt_descr 454a939098aSGlauber Costaearly_gdt_descr: 455a939098aSGlauber Costa .word GDT_ENTRIES*8-1 4563e5d8f97STejun Heoearly_gdt_descr_base: 4572add8e23SBrian Gerst .quad INIT_PER_CPU_VAR(gdt_page) 458250c2277SThomas Gleixner 459250c2277SThomas GleixnerENTRY(phys_base) 460250c2277SThomas Gleixner /* This must match the first entry in level2_kernel_pgt */ 461250c2277SThomas Gleixner .quad 0x0000000000000000 462250c2277SThomas Gleixner 4638c5e5ac3SJeremy Fitzhardinge#include "../../x86/xen/xen-head.S" 464250c2277SThomas Gleixner 465250c2277SThomas Gleixner .section .bss, "aw", @nobits 466250c2277SThomas Gleixner .align L1_CACHE_BYTES 467250c2277SThomas GleixnerENTRY(idt_table) 4685e112ae2SCyrill Gorcunov .skip IDT_ENTRIES * 16 469250c2277SThomas Gleixner 470228bdaa9SSteven Rostedt .align L1_CACHE_BYTES 471228bdaa9SSteven RostedtENTRY(nmi_idt_table) 472228bdaa9SSteven Rostedt .skip IDT_ENTRIES * 16 473228bdaa9SSteven Rostedt 47402b7da37STim Abbott __PAGE_ALIGNED_BSS 475250c2277SThomas Gleixner .align PAGE_SIZE 476250c2277SThomas GleixnerENTRY(empty_zero_page) 477250c2277SThomas Gleixner .skip PAGE_SIZE 478