1b2441318SGreg Kroah-Hartman/* SPDX-License-Identifier: GPL-2.0 */ 2250c2277SThomas Gleixner/* 35b171e82SAlexander Kuleshov * linux/arch/x86/kernel/head_64.S -- start in 32bit and switch to 64bit 4250c2277SThomas Gleixner * 5250c2277SThomas Gleixner * Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE 6250c2277SThomas Gleixner * Copyright (C) 2000 Pavel Machek <pavel@suse.cz> 7250c2277SThomas Gleixner * Copyright (C) 2000 Karsten Keil <kkeil@suse.de> 8250c2277SThomas Gleixner * Copyright (C) 2001,2002 Andi Kleen <ak@suse.de> 9250c2277SThomas Gleixner * Copyright (C) 2005 Eric Biederman <ebiederm@xmission.com> 10250c2277SThomas Gleixner */ 11250c2277SThomas Gleixner 12250c2277SThomas Gleixner 13250c2277SThomas Gleixner#include <linux/linkage.h> 14250c2277SThomas Gleixner#include <linux/threads.h> 15250c2277SThomas Gleixner#include <linux/init.h> 16ca5999fdSMike Rapoport#include <linux/pgtable.h> 1765fddcfcSMike Rapoport#include <asm/segment.h> 18250c2277SThomas Gleixner#include <asm/page.h> 19250c2277SThomas Gleixner#include <asm/msr.h> 20250c2277SThomas Gleixner#include <asm/cache.h> 21369101daSCyrill Gorcunov#include <asm/processor-flags.h> 22b12d8db8STejun Heo#include <asm/percpu.h> 239900aa2fSH. Peter Anvin#include <asm/nops.h> 247bbcdb1cSAndy Lutomirski#include "../entry/calling.h" 25784d5699SAl Viro#include <asm/export.h> 26bd89004fSPeter Zijlstra#include <asm/nospec-branch.h> 2705ab1d8aSFeng Tang#include <asm/fixmap.h> 28250c2277SThomas Gleixner 29fdc0269eSJuergen Gross#ifdef CONFIG_PARAVIRT_XXL 3049a69787SGlauber de Oliveira Costa#include <asm/asm-offsets.h> 3149a69787SGlauber de Oliveira Costa#include <asm/paravirt.h> 3275da04f7SThomas Gleixner#define GET_CR2_INTO(reg) GET_CR2_INTO_AX ; _ASM_MOV %_ASM_AX, reg 3349a69787SGlauber de Oliveira Costa#else 349900aa2fSH. Peter Anvin#define INTERRUPT_RETURN iretq 3575da04f7SThomas Gleixner#define GET_CR2_INTO(reg) _ASM_MOV %cr2, reg 3649a69787SGlauber de Oliveira Costa#endif 3749a69787SGlauber de Oliveira Costa 3875da04f7SThomas Gleixner/* 3975da04f7SThomas Gleixner * We are not able to switch in one step to the final KERNEL ADDRESS SPACE 40250c2277SThomas Gleixner * because we need identity-mapped pages. 41250c2277SThomas Gleixner */ 42b9952ec7SKirill A. Shutemov#define l4_index(x) (((x) >> 39) & 511) 43a6523748SEduardo Habkost#define pud_index(x) (((x) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) 44a6523748SEduardo Habkost 45b9952ec7SKirill A. ShutemovL4_PAGE_OFFSET = l4_index(__PAGE_OFFSET_BASE_L4) 46b9952ec7SKirill A. ShutemovL4_START_KERNEL = l4_index(__START_KERNEL_map) 47b9952ec7SKirill A. Shutemov 48a6523748SEduardo HabkostL3_START_KERNEL = pud_index(__START_KERNEL_map) 49a6523748SEduardo Habkost 50250c2277SThomas Gleixner .text 514ae59b91STim Abbott __HEAD 52250c2277SThomas Gleixner .code64 5337818afdSJiri SlabySYM_CODE_START_NOALIGN(startup_64) 542704fbb6SJosh Poimboeuf UNWIND_HINT_EMPTY 55250c2277SThomas Gleixner /* 561256276cSKonrad Rzeszutek Wilk * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0, 57250c2277SThomas Gleixner * and someone has loaded an identity mapped page table 58250c2277SThomas Gleixner * for us. These identity mapped page tables map all of the 59250c2277SThomas Gleixner * kernel pages and possibly all of memory. 60250c2277SThomas Gleixner * 618170e6beSH. Peter Anvin * %rsi holds a physical pointer to real_mode_data. 62250c2277SThomas Gleixner * 63250c2277SThomas Gleixner * We come here either directly from a 64bit bootloader, or from 645b171e82SAlexander Kuleshov * arch/x86/boot/compressed/head_64.S. 65250c2277SThomas Gleixner * 66250c2277SThomas Gleixner * We only come here initially at boot nothing else comes here. 67250c2277SThomas Gleixner * 68250c2277SThomas Gleixner * Since we may be loaded at an address different from what we were 69250c2277SThomas Gleixner * compiled to run at we first fixup the physical addresses in our page 70250c2277SThomas Gleixner * tables and then reload them. 71250c2277SThomas Gleixner */ 72250c2277SThomas Gleixner 7322dc3918SJosh Poimboeuf /* Set up the stack for verify_cpu(), similar to initial_stack below */ 7422dc3918SJosh Poimboeuf leaq (__end_init_task - SIZEOF_PTREGS)(%rip), %rsp 7591ed140dSBorislav Petkov 76866b556eSJoerg Roedel leaq _text(%rip), %rdi 77866b556eSJoerg Roedel pushq %rsi 78866b556eSJoerg Roedel call startup_64_setup_env 79866b556eSJoerg Roedel popq %rsi 80866b556eSJoerg Roedel 81866b556eSJoerg Roedel /* Now switch to __KERNEL_CS so IRET works reliably */ 82866b556eSJoerg Roedel pushq $__KERNEL_CS 83866b556eSJoerg Roedel leaq .Lon_kernel_cs(%rip), %rax 84866b556eSJoerg Roedel pushq %rax 85866b556eSJoerg Roedel lretq 86866b556eSJoerg Roedel 87866b556eSJoerg Roedel.Lon_kernel_cs: 88866b556eSJoerg Roedel UNWIND_HINT_EMPTY 89866b556eSJoerg Roedel 9004633df0SBorislav Petkov /* Sanitize CPU configuration */ 9104633df0SBorislav Petkov call verify_cpu 9204633df0SBorislav Petkov 935868f365STom Lendacky /* 945868f365STom Lendacky * Perform pagetable fixups. Additionally, if SME is active, encrypt 955868f365STom Lendacky * the kernel and retrieve the modifier (SME encryption mask if SME 965868f365STom Lendacky * is active) to be added to the initial pgdir entry that will be 975868f365STom Lendacky * programmed into CR3. 985868f365STom Lendacky */ 99250c2277SThomas Gleixner leaq _text(%rip), %rdi 100c88d7150SKirill A. Shutemov pushq %rsi 101c88d7150SKirill A. Shutemov call __startup_64 102c88d7150SKirill A. Shutemov popq %rsi 103250c2277SThomas Gleixner 1045868f365STom Lendacky /* Form the CR3 value being sure to include the CR3 modifier */ 1055868f365STom Lendacky addq $(early_top_pgt - __START_KERNEL_map), %rax 1068170e6beSH. Peter Anvin jmp 1f 10737818afdSJiri SlabySYM_CODE_END(startup_64) 10837818afdSJiri Slaby 109bc7b11c0SJiri SlabySYM_CODE_START(secondary_startup_64) 1102704fbb6SJosh Poimboeuf UNWIND_HINT_EMPTY 111250c2277SThomas Gleixner /* 1121256276cSKonrad Rzeszutek Wilk * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0, 113250c2277SThomas Gleixner * and someone has loaded a mapped page table. 114250c2277SThomas Gleixner * 1158170e6beSH. Peter Anvin * %rsi holds a physical pointer to real_mode_data. 116250c2277SThomas Gleixner * 117250c2277SThomas Gleixner * We come here either from startup_64 (using physical addresses) 118250c2277SThomas Gleixner * or from trampoline.S (using virtual addresses). 119250c2277SThomas Gleixner * 120250c2277SThomas Gleixner * Using virtual addresses from trampoline.S removes the need 121250c2277SThomas Gleixner * to have any identity mapped pages in the kernel page table 122250c2277SThomas Gleixner * after the boot processor executes this code. 123250c2277SThomas Gleixner */ 124250c2277SThomas Gleixner 12504633df0SBorislav Petkov /* Sanitize CPU configuration */ 12604633df0SBorislav Petkov call verify_cpu 12704633df0SBorislav Petkov 1285868f365STom Lendacky /* 1293ecacdbdSJoerg Roedel * The secondary_startup_64_no_verify entry point is only used by 1303ecacdbdSJoerg Roedel * SEV-ES guests. In those guests the call to verify_cpu() would cause 1313ecacdbdSJoerg Roedel * #VC exceptions which can not be handled at this stage of secondary 1323ecacdbdSJoerg Roedel * CPU bringup. 1333ecacdbdSJoerg Roedel * 1343ecacdbdSJoerg Roedel * All non SEV-ES systems, especially Intel systems, need to execute 1353ecacdbdSJoerg Roedel * verify_cpu() above to make sure NX is enabled. 1363ecacdbdSJoerg Roedel */ 1373ecacdbdSJoerg RoedelSYM_INNER_LABEL(secondary_startup_64_no_verify, SYM_L_GLOBAL) 1383ecacdbdSJoerg Roedel UNWIND_HINT_EMPTY 1393ecacdbdSJoerg Roedel 1403ecacdbdSJoerg Roedel /* 1415868f365STom Lendacky * Retrieve the modifier (SME encryption mask if SME is active) to be 1425868f365STom Lendacky * added to the initial pgdir entry that will be programmed into CR3. 1435868f365STom Lendacky */ 1445868f365STom Lendacky pushq %rsi 1455868f365STom Lendacky call __startup_secondary_64 1465868f365STom Lendacky popq %rsi 1475868f365STom Lendacky 1485868f365STom Lendacky /* Form the CR3 value being sure to include the CR3 modifier */ 1495868f365STom Lendacky addq $(init_top_pgt - __START_KERNEL_map), %rax 1508170e6beSH. Peter Anvin1: 1518170e6beSH. Peter Anvin 152032370b9SKirill A. Shutemov /* Enable PAE mode, PGE and LA57 */ 1538170e6beSH. Peter Anvin movl $(X86_CR4_PAE | X86_CR4_PGE), %ecx 154032370b9SKirill A. Shutemov#ifdef CONFIG_X86_5LEVEL 15539b95522SKirill A. Shutemov testl $1, __pgtable_l5_enabled(%rip) 1566f9dd329SKirill A. Shutemov jz 1f 157032370b9SKirill A. Shutemov orl $X86_CR4_LA57, %ecx 1586f9dd329SKirill A. Shutemov1: 159032370b9SKirill A. Shutemov#endif 1608170e6beSH. Peter Anvin movq %rcx, %cr4 161250c2277SThomas Gleixner 162032370b9SKirill A. Shutemov /* Setup early boot stage 4-/5-level pagetables. */ 163250c2277SThomas Gleixner addq phys_base(%rip), %rax 164250c2277SThomas Gleixner movq %rax, %cr3 165250c2277SThomas Gleixner 166250c2277SThomas Gleixner /* Ensure I am executing from virtual addresses */ 167250c2277SThomas Gleixner movq $1f, %rax 168bd89004fSPeter Zijlstra ANNOTATE_RETPOLINE_SAFE 169250c2277SThomas Gleixner jmp *%rax 170250c2277SThomas Gleixner1: 1712704fbb6SJosh Poimboeuf UNWIND_HINT_EMPTY 172250c2277SThomas Gleixner 173e04b8833SJoerg Roedel /* 174e04b8833SJoerg Roedel * We must switch to a new descriptor in kernel space for the GDT 175e04b8833SJoerg Roedel * because soon the kernel won't have access anymore to the userspace 176e04b8833SJoerg Roedel * addresses where we're currently running on. We have to do that here 177e04b8833SJoerg Roedel * because in 32bit we couldn't load a 64bit linear address. 178e04b8833SJoerg Roedel */ 179e04b8833SJoerg Roedel lgdt early_gdt_descr(%rip) 180e04b8833SJoerg Roedel 1817b99819dSJoerg Roedel /* set up data segments */ 1827b99819dSJoerg Roedel xorl %eax,%eax 1837b99819dSJoerg Roedel movl %eax,%ds 1847b99819dSJoerg Roedel movl %eax,%ss 1857b99819dSJoerg Roedel movl %eax,%es 1867b99819dSJoerg Roedel 1877b99819dSJoerg Roedel /* 1887b99819dSJoerg Roedel * We don't really need to load %fs or %gs, but load them anyway 1897b99819dSJoerg Roedel * to kill any stale realmode selectors. This allows execution 1907b99819dSJoerg Roedel * under VT hardware. 1917b99819dSJoerg Roedel */ 1927b99819dSJoerg Roedel movl %eax,%fs 1937b99819dSJoerg Roedel movl %eax,%gs 1947b99819dSJoerg Roedel 1957b99819dSJoerg Roedel /* Set up %gs. 1967b99819dSJoerg Roedel * 1977b99819dSJoerg Roedel * The base of %gs always points to fixed_percpu_data. If the 1987b99819dSJoerg Roedel * stack protector canary is enabled, it is located at %gs:40. 1997b99819dSJoerg Roedel * Note that, on SMP, the boot cpu uses init data section until 2007b99819dSJoerg Roedel * the per cpu areas are set up. 2017b99819dSJoerg Roedel */ 2027b99819dSJoerg Roedel movl $MSR_GS_BASE,%ecx 2037b99819dSJoerg Roedel movl initial_gs(%rip),%eax 2047b99819dSJoerg Roedel movl initial_gs+4(%rip),%edx 2057b99819dSJoerg Roedel wrmsr 2067b99819dSJoerg Roedel 2073add38cbSJoerg Roedel /* 2083add38cbSJoerg Roedel * Setup a boot time stack - Any secondary CPU will have lost its stack 2093add38cbSJoerg Roedel * by now because the cr3-switch above unmaps the real-mode stack 2103add38cbSJoerg Roedel */ 2113add38cbSJoerg Roedel movq initial_stack(%rip), %rsp 2123add38cbSJoerg Roedel 213f5963ba7SJoerg Roedel /* Setup and Load IDT */ 214f5963ba7SJoerg Roedel pushq %rsi 215f5963ba7SJoerg Roedel call early_setup_idt 216f5963ba7SJoerg Roedel popq %rsi 217f5963ba7SJoerg Roedel 218250c2277SThomas Gleixner /* Check if nx is implemented */ 219250c2277SThomas Gleixner movl $0x80000001, %eax 220250c2277SThomas Gleixner cpuid 221250c2277SThomas Gleixner movl %edx,%edi 222250c2277SThomas Gleixner 223250c2277SThomas Gleixner /* Setup EFER (Extended Feature Enable Register) */ 224250c2277SThomas Gleixner movl $MSR_EFER, %ecx 225250c2277SThomas Gleixner rdmsr 226250c2277SThomas Gleixner btsl $_EFER_SCE, %eax /* Enable System Call */ 227250c2277SThomas Gleixner btl $20,%edi /* No Execute supported? */ 228250c2277SThomas Gleixner jnc 1f 229250c2277SThomas Gleixner btsl $_EFER_NX, %eax 23078d77df7SH. Peter Anvin btsq $_PAGE_BIT_NX,early_pmd_flags(%rip) 231250c2277SThomas Gleixner1: wrmsr /* Make changes effective */ 232250c2277SThomas Gleixner 233250c2277SThomas Gleixner /* Setup cr0 */ 234369101daSCyrill Gorcunov movl $CR0_STATE, %eax 235250c2277SThomas Gleixner /* Make changes effective */ 236250c2277SThomas Gleixner movq %rax, %cr0 237250c2277SThomas Gleixner 238250c2277SThomas Gleixner /* zero EFLAGS after setting rsp */ 239250c2277SThomas Gleixner pushq $0 240250c2277SThomas Gleixner popfq 241250c2277SThomas Gleixner 2428170e6beSH. Peter Anvin /* rsi is pointer to real mode structure with interesting info. 243250c2277SThomas Gleixner pass it to C */ 2448170e6beSH. Peter Anvin movq %rsi, %rdi 245250c2277SThomas Gleixner 24679d243a0SBorislav Petkov.Ljump_to_C_code: 247a9468df5SJosh Poimboeuf /* 248a9468df5SJosh Poimboeuf * Jump to run C code and to be on a real kernel address. 249250c2277SThomas Gleixner * Since we are running on identity-mapped space we have to jump 250250c2277SThomas Gleixner * to the full 64bit address, this is only possible as indirect 251250c2277SThomas Gleixner * jump. In addition we need to ensure %cs is set so we make this 252250c2277SThomas Gleixner * a far return. 2538170e6beSH. Peter Anvin * 2548170e6beSH. Peter Anvin * Note: do not change to far jump indirect with 64bit offset. 2558170e6beSH. Peter Anvin * 2568170e6beSH. Peter Anvin * AMD does not support far jump indirect with 64bit offset. 2578170e6beSH. Peter Anvin * AMD64 Architecture Programmer's Manual, Volume 3: states only 2588170e6beSH. Peter Anvin * JMP FAR mem16:16 FF /5 Far jump indirect, 2598170e6beSH. Peter Anvin * with the target specified by a far pointer in memory. 2608170e6beSH. Peter Anvin * JMP FAR mem16:32 FF /5 Far jump indirect, 2618170e6beSH. Peter Anvin * with the target specified by a far pointer in memory. 2628170e6beSH. Peter Anvin * 2638170e6beSH. Peter Anvin * Intel64 does support 64bit offset. 2648170e6beSH. Peter Anvin * Software Developer Manual Vol 2: states: 2658170e6beSH. Peter Anvin * FF /5 JMP m16:16 Jump far, absolute indirect, 2668170e6beSH. Peter Anvin * address given in m16:16 2678170e6beSH. Peter Anvin * FF /5 JMP m16:32 Jump far, absolute indirect, 2688170e6beSH. Peter Anvin * address given in m16:32. 2698170e6beSH. Peter Anvin * REX.W + FF /5 JMP m16:64 Jump far, absolute indirect, 2708170e6beSH. Peter Anvin * address given in m16:64. 271250c2277SThomas Gleixner */ 27231dcfec1SJosh Poimboeuf pushq $.Lafter_lret # put return address on stack for unwinder 273a7bea830SJan Beulich xorl %ebp, %ebp # clear frame pointer 274250c2277SThomas Gleixner movq initial_code(%rip), %rax 275250c2277SThomas Gleixner pushq $__KERNEL_CS # set correct cs 276250c2277SThomas Gleixner pushq %rax # target address in negative space 277250c2277SThomas Gleixner lretq 27831dcfec1SJosh Poimboeuf.Lafter_lret: 279bc7b11c0SJiri SlabySYM_CODE_END(secondary_startup_64) 280250c2277SThomas Gleixner 28104633df0SBorislav Petkov#include "verify_cpu.S" 28204633df0SBorislav Petkov 28342e78e97SFenghua Yu#ifdef CONFIG_HOTPLUG_CPU 28442e78e97SFenghua Yu/* 28542e78e97SFenghua Yu * Boot CPU0 entry point. It's called from play_dead(). Everything has been set 28642e78e97SFenghua Yu * up already except stack. We just set up stack here. Then call 28779d243a0SBorislav Petkov * start_secondary() via .Ljump_to_C_code. 28842e78e97SFenghua Yu */ 289bc7b11c0SJiri SlabySYM_CODE_START(start_cpu0) 2902704fbb6SJosh Poimboeuf UNWIND_HINT_EMPTY 29161a73f5cSJosh Poimboeuf movq initial_stack(%rip), %rsp 29279d243a0SBorislav Petkov jmp .Ljump_to_C_code 293bc7b11c0SJiri SlabySYM_CODE_END(start_cpu0) 29442e78e97SFenghua Yu#endif 29542e78e97SFenghua Yu 2961aa9aa8eSJoerg Roedel#ifdef CONFIG_AMD_MEM_ENCRYPT 2971aa9aa8eSJoerg Roedel/* 2981aa9aa8eSJoerg Roedel * VC Exception handler used during early boot when running on kernel 2991aa9aa8eSJoerg Roedel * addresses, but before the switch to the idt_table can be made. 3001aa9aa8eSJoerg Roedel * The early_idt_handler_array can't be used here because it calls into a lot 3011aa9aa8eSJoerg Roedel * of __init code and this handler is also used during CPU offlining/onlining. 3021aa9aa8eSJoerg Roedel * Therefore this handler ends up in the .text section so that it stays around 3031aa9aa8eSJoerg Roedel * when .init.text is freed. 3041aa9aa8eSJoerg Roedel */ 3051aa9aa8eSJoerg RoedelSYM_CODE_START_NOALIGN(vc_boot_ghcb) 3061aa9aa8eSJoerg Roedel UNWIND_HINT_IRET_REGS offset=8 3071aa9aa8eSJoerg Roedel 3081aa9aa8eSJoerg Roedel /* Build pt_regs */ 3091aa9aa8eSJoerg Roedel PUSH_AND_CLEAR_REGS 3101aa9aa8eSJoerg Roedel 3111aa9aa8eSJoerg Roedel /* Call C handler */ 3121aa9aa8eSJoerg Roedel movq %rsp, %rdi 3131aa9aa8eSJoerg Roedel movq ORIG_RAX(%rsp), %rsi 3141aa9aa8eSJoerg Roedel movq initial_vc_handler(%rip), %rax 3151aa9aa8eSJoerg Roedel ANNOTATE_RETPOLINE_SAFE 3161aa9aa8eSJoerg Roedel call *%rax 3171aa9aa8eSJoerg Roedel 3181aa9aa8eSJoerg Roedel /* Unwind pt_regs */ 3191aa9aa8eSJoerg Roedel POP_REGS 3201aa9aa8eSJoerg Roedel 3211aa9aa8eSJoerg Roedel /* Remove Error Code */ 3221aa9aa8eSJoerg Roedel addq $8, %rsp 3231aa9aa8eSJoerg Roedel 3241aa9aa8eSJoerg Roedel /* Pure iret required here - don't use INTERRUPT_RETURN */ 3251aa9aa8eSJoerg Roedel iretq 3261aa9aa8eSJoerg RoedelSYM_CODE_END(vc_boot_ghcb) 3271aa9aa8eSJoerg Roedel#endif 3281aa9aa8eSJoerg Roedel 329b32f96c7SJosh Poimboeuf /* Both SMP bootup and ACPI suspend change these variables */ 330da5968aeSSam Ravnborg __REFDATA 3318170e6beSH. Peter Anvin .balign 8 332b1bd27b9SJiri SlabySYM_DATA(initial_code, .quad x86_64_start_kernel) 333b1bd27b9SJiri SlabySYM_DATA(initial_gs, .quad INIT_PER_CPU_VAR(fixed_percpu_data)) 3341aa9aa8eSJoerg Roedel#ifdef CONFIG_AMD_MEM_ENCRYPT 3351aa9aa8eSJoerg RoedelSYM_DATA(initial_vc_handler, .quad handle_vc_boot_ghcb) 3361aa9aa8eSJoerg Roedel#endif 337b1bd27b9SJiri Slaby 33822dc3918SJosh Poimboeuf/* 339b1bd27b9SJiri Slaby * The SIZEOF_PTREGS gap is a convention which helps the in-kernel unwinder 340b1bd27b9SJiri Slaby * reliably detect the end of the stack. 34122dc3918SJosh Poimboeuf */ 342b1bd27b9SJiri SlabySYM_DATA(initial_stack, .quad init_thread_union + THREAD_SIZE - SIZEOF_PTREGS) 343b9af7c0dSSuresh Siddha __FINITDATA 344250c2277SThomas Gleixner 3458170e6beSH. Peter Anvin __INIT 346bc7b11c0SJiri SlabySYM_CODE_START(early_idt_handler_array) 347749c970aSAndi Kleen i = 0 348749c970aSAndi Kleen .rept NUM_EXCEPTION_VECTORS 34982c62fa0SJosh Poimboeuf .if ((EXCEPTION_ERRCODE_MASK >> i) & 1) == 0 3502704fbb6SJosh Poimboeuf UNWIND_HINT_IRET_REGS 3519900aa2fSH. Peter Anvin pushq $0 # Dummy error code, to make stack frame uniform 3522704fbb6SJosh Poimboeuf .else 3532704fbb6SJosh Poimboeuf UNWIND_HINT_IRET_REGS offset=8 3549900aa2fSH. Peter Anvin .endif 3559900aa2fSH. Peter Anvin pushq $i # 72(%rsp) Vector number 356cdeb6048SAndy Lutomirski jmp early_idt_handler_common 3572704fbb6SJosh Poimboeuf UNWIND_HINT_IRET_REGS 358749c970aSAndi Kleen i = i + 1 359cdeb6048SAndy Lutomirski .fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc 360749c970aSAndi Kleen .endr 3612704fbb6SJosh Poimboeuf UNWIND_HINT_IRET_REGS offset=16 362bc7b11c0SJiri SlabySYM_CODE_END(early_idt_handler_array) 3638866cd9dSRoland McGrath 364ef77e688SJiri SlabySYM_CODE_START_LOCAL(early_idt_handler_common) 365cdeb6048SAndy Lutomirski /* 366cdeb6048SAndy Lutomirski * The stack is the hardware frame, an error code or zero, and the 367cdeb6048SAndy Lutomirski * vector number. 368cdeb6048SAndy Lutomirski */ 3699900aa2fSH. Peter Anvin cld 3709900aa2fSH. Peter Anvin 371250c2277SThomas Gleixner incl early_recursion_flag(%rip) 3729900aa2fSH. Peter Anvin 3737bbcdb1cSAndy Lutomirski /* The vector number is currently in the pt_regs->di slot. */ 3747bbcdb1cSAndy Lutomirski pushq %rsi /* pt_regs->si */ 3757bbcdb1cSAndy Lutomirski movq 8(%rsp), %rsi /* RSI = vector number */ 3767bbcdb1cSAndy Lutomirski movq %rdi, 8(%rsp) /* pt_regs->di = RDI */ 3777bbcdb1cSAndy Lutomirski pushq %rdx /* pt_regs->dx */ 3787bbcdb1cSAndy Lutomirski pushq %rcx /* pt_regs->cx */ 3797bbcdb1cSAndy Lutomirski pushq %rax /* pt_regs->ax */ 3807bbcdb1cSAndy Lutomirski pushq %r8 /* pt_regs->r8 */ 3817bbcdb1cSAndy Lutomirski pushq %r9 /* pt_regs->r9 */ 3827bbcdb1cSAndy Lutomirski pushq %r10 /* pt_regs->r10 */ 3837bbcdb1cSAndy Lutomirski pushq %r11 /* pt_regs->r11 */ 3847bbcdb1cSAndy Lutomirski pushq %rbx /* pt_regs->bx */ 3857bbcdb1cSAndy Lutomirski pushq %rbp /* pt_regs->bp */ 3867bbcdb1cSAndy Lutomirski pushq %r12 /* pt_regs->r12 */ 3877bbcdb1cSAndy Lutomirski pushq %r13 /* pt_regs->r13 */ 3887bbcdb1cSAndy Lutomirski pushq %r14 /* pt_regs->r14 */ 3897bbcdb1cSAndy Lutomirski pushq %r15 /* pt_regs->r15 */ 3902704fbb6SJosh Poimboeuf UNWIND_HINT_REGS 3919900aa2fSH. Peter Anvin 3927bbcdb1cSAndy Lutomirski movq %rsp,%rdi /* RDI = pt_regs; RSI is already trapnr */ 3934b47cdbdSJoerg Roedel call do_early_exception 3949900aa2fSH. Peter Anvin 3959900aa2fSH. Peter Anvin decl early_recursion_flag(%rip) 39626c4ef9cSAndy Lutomirski jmp restore_regs_and_return_to_kernel 397ef77e688SJiri SlabySYM_CODE_END(early_idt_handler_common) 3989900aa2fSH. Peter Anvin 39974d8d9d5SJoerg Roedel#ifdef CONFIG_AMD_MEM_ENCRYPT 40074d8d9d5SJoerg Roedel/* 40174d8d9d5SJoerg Roedel * VC Exception handler used during very early boot. The 40274d8d9d5SJoerg Roedel * early_idt_handler_array can't be used because it returns via the 40374d8d9d5SJoerg Roedel * paravirtualized INTERRUPT_RETURN and pv-ops don't work that early. 40474d8d9d5SJoerg Roedel * 40574d8d9d5SJoerg Roedel * This handler will end up in the .init.text section and not be 40674d8d9d5SJoerg Roedel * available to boot secondary CPUs. 40774d8d9d5SJoerg Roedel */ 40874d8d9d5SJoerg RoedelSYM_CODE_START_NOALIGN(vc_no_ghcb) 40974d8d9d5SJoerg Roedel UNWIND_HINT_IRET_REGS offset=8 41074d8d9d5SJoerg Roedel 41174d8d9d5SJoerg Roedel /* Build pt_regs */ 41274d8d9d5SJoerg Roedel PUSH_AND_CLEAR_REGS 41374d8d9d5SJoerg Roedel 41474d8d9d5SJoerg Roedel /* Call C handler */ 41574d8d9d5SJoerg Roedel movq %rsp, %rdi 41674d8d9d5SJoerg Roedel movq ORIG_RAX(%rsp), %rsi 41774d8d9d5SJoerg Roedel call do_vc_no_ghcb 41874d8d9d5SJoerg Roedel 41974d8d9d5SJoerg Roedel /* Unwind pt_regs */ 42074d8d9d5SJoerg Roedel POP_REGS 42174d8d9d5SJoerg Roedel 42274d8d9d5SJoerg Roedel /* Remove Error Code */ 42374d8d9d5SJoerg Roedel addq $8, %rsp 42474d8d9d5SJoerg Roedel 42574d8d9d5SJoerg Roedel /* Pure iret required here - don't use INTERRUPT_RETURN */ 42674d8d9d5SJoerg Roedel iretq 42774d8d9d5SJoerg RoedelSYM_CODE_END(vc_no_ghcb) 42874d8d9d5SJoerg Roedel#endif 429b1bd27b9SJiri Slaby 430b1bd27b9SJiri Slaby#define SYM_DATA_START_PAGE_ALIGNED(name) \ 431b1bd27b9SJiri Slaby SYM_START(name, SYM_L_GLOBAL, .balign PAGE_SIZE) 432250c2277SThomas Gleixner 433d9e9a641SDave Hansen#ifdef CONFIG_PAGE_TABLE_ISOLATION 434d9e9a641SDave Hansen/* 435d9e9a641SDave Hansen * Each PGD needs to be 8k long and 8k aligned. We do not 436d9e9a641SDave Hansen * ever go out to userspace with these, so we do not 437d9e9a641SDave Hansen * strictly *need* the second page, but this allows us to 438d9e9a641SDave Hansen * have a single set_pgd() implementation that does not 439d9e9a641SDave Hansen * need to worry about whether it has 4k or 8k to work 440d9e9a641SDave Hansen * with. 441d9e9a641SDave Hansen * 442d9e9a641SDave Hansen * This ensures PGDs are 8k long: 443d9e9a641SDave Hansen */ 444d9e9a641SDave Hansen#define PTI_USER_PGD_FILL 512 445d9e9a641SDave Hansen/* This ensures they are 8k-aligned: */ 446b1bd27b9SJiri Slaby#define SYM_DATA_START_PTI_ALIGNED(name) \ 447b1bd27b9SJiri Slaby SYM_START(name, SYM_L_GLOBAL, .balign 2 * PAGE_SIZE) 448d9e9a641SDave Hansen#else 449b1bd27b9SJiri Slaby#define SYM_DATA_START_PTI_ALIGNED(name) \ 450b1bd27b9SJiri Slaby SYM_DATA_START_PAGE_ALIGNED(name) 451d9e9a641SDave Hansen#define PTI_USER_PGD_FILL 0 452d9e9a641SDave Hansen#endif 453d9e9a641SDave Hansen 454250c2277SThomas Gleixner/* Automate the creation of 1 to 1 mapping pmd entries */ 455250c2277SThomas Gleixner#define PMDS(START, PERM, COUNT) \ 456250c2277SThomas Gleixner i = 0 ; \ 457250c2277SThomas Gleixner .rept (COUNT) ; \ 4580e192b99SCyrill Gorcunov .quad (START) + (i << PMD_SHIFT) + (PERM) ; \ 459250c2277SThomas Gleixner i = i + 1 ; \ 460250c2277SThomas Gleixner .endr 461250c2277SThomas Gleixner 4628170e6beSH. Peter Anvin __INITDATA 4631a8770b7SJiri Slaby .balign 4 4641a8770b7SJiri Slaby 465b1bd27b9SJiri SlabySYM_DATA_START_PTI_ALIGNED(early_top_pgt) 4666f9dd329SKirill A. Shutemov .fill 512,8,0 467d9e9a641SDave Hansen .fill PTI_USER_PGD_FILL,8,0 468b1bd27b9SJiri SlabySYM_DATA_END(early_top_pgt) 4698170e6beSH. Peter Anvin 470b1bd27b9SJiri SlabySYM_DATA_START_PAGE_ALIGNED(early_dynamic_pgts) 4718170e6beSH. Peter Anvin .fill 512*EARLY_DYNAMIC_PAGE_TABLES,8,0 472b1bd27b9SJiri SlabySYM_DATA_END(early_dynamic_pgts) 4738170e6beSH. Peter Anvin 474b1bd27b9SJiri SlabySYM_DATA(early_recursion_flag, .long 0) 4751a8770b7SJiri Slaby 476b9af7c0dSSuresh Siddha .data 4778170e6beSH. Peter Anvin 4787733607fSMaran Wilson#if defined(CONFIG_XEN_PV) || defined(CONFIG_PVH) 479b1bd27b9SJiri SlabySYM_DATA_START_PTI_ALIGNED(init_top_pgt) 48021729f81STom Lendacky .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 481b9952ec7SKirill A. Shutemov .org init_top_pgt + L4_PAGE_OFFSET*8, 0 48221729f81STom Lendacky .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 483b9952ec7SKirill A. Shutemov .org init_top_pgt + L4_START_KERNEL*8, 0 484250c2277SThomas Gleixner /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */ 48521729f81STom Lendacky .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 486d9e9a641SDave Hansen .fill PTI_USER_PGD_FILL,8,0 487b1bd27b9SJiri SlabySYM_DATA_END(init_top_pgt) 488250c2277SThomas Gleixner 489b1bd27b9SJiri SlabySYM_DATA_START_PAGE_ALIGNED(level3_ident_pgt) 49021729f81STom Lendacky .quad level2_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 491250c2277SThomas Gleixner .fill 511, 8, 0 492b1bd27b9SJiri SlabySYM_DATA_END(level3_ident_pgt) 493b1bd27b9SJiri SlabySYM_DATA_START_PAGE_ALIGNED(level2_ident_pgt) 494430d4005SDave Hansen /* 495430d4005SDave Hansen * Since I easily can, map the first 1G. 4968170e6beSH. Peter Anvin * Don't set NX because code runs from these pages. 497430d4005SDave Hansen * 498430d4005SDave Hansen * Note: This sets _PAGE_GLOBAL despite whether 499430d4005SDave Hansen * the CPU supports it or it is enabled. But, 500430d4005SDave Hansen * the CPU should ignore the bit. 5018170e6beSH. Peter Anvin */ 5028170e6beSH. Peter Anvin PMDS(0, __PAGE_KERNEL_IDENT_LARGE_EXEC, PTRS_PER_PMD) 503b1bd27b9SJiri SlabySYM_DATA_END(level2_ident_pgt) 5044375c299SKirill A. Shutemov#else 505b1bd27b9SJiri SlabySYM_DATA_START_PTI_ALIGNED(init_top_pgt) 5064375c299SKirill A. Shutemov .fill 512,8,0 507d9e9a641SDave Hansen .fill PTI_USER_PGD_FILL,8,0 508b1bd27b9SJiri SlabySYM_DATA_END(init_top_pgt) 5098170e6beSH. Peter Anvin#endif 510250c2277SThomas Gleixner 511032370b9SKirill A. Shutemov#ifdef CONFIG_X86_5LEVEL 512b1bd27b9SJiri SlabySYM_DATA_START_PAGE_ALIGNED(level4_kernel_pgt) 513032370b9SKirill A. Shutemov .fill 511,8,0 51421729f81STom Lendacky .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 515b1bd27b9SJiri SlabySYM_DATA_END(level4_kernel_pgt) 516032370b9SKirill A. Shutemov#endif 517032370b9SKirill A. Shutemov 518b1bd27b9SJiri SlabySYM_DATA_START_PAGE_ALIGNED(level3_kernel_pgt) 519a6523748SEduardo Habkost .fill L3_START_KERNEL,8,0 520250c2277SThomas Gleixner /* (2^48-(2*1024*1024*1024)-((2^39)*511))/(2^30) = 510 */ 52121729f81STom Lendacky .quad level2_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 52221729f81STom Lendacky .quad level2_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 523b1bd27b9SJiri SlabySYM_DATA_END(level3_kernel_pgt) 524250c2277SThomas Gleixner 525b1bd27b9SJiri SlabySYM_DATA_START_PAGE_ALIGNED(level2_kernel_pgt) 52688f3aec7SIngo Molnar /* 52785eb69a1SIngo Molnar * 512 MB kernel mapping. We spend a full page on this pagetable 52888f3aec7SIngo Molnar * anyway. 52988f3aec7SIngo Molnar * 53088f3aec7SIngo Molnar * The kernel code+data+bss must not be bigger than that. 53188f3aec7SIngo Molnar * 53285eb69a1SIngo Molnar * (NOTE: at +512MB starts the module area, see MODULES_VADDR. 53388f3aec7SIngo Molnar * If you want to increase this then increase MODULES_VADDR 53488f3aec7SIngo Molnar * too.) 535430d4005SDave Hansen * 536430d4005SDave Hansen * This table is eventually used by the kernel during normal 537430d4005SDave Hansen * runtime. Care must be taken to clear out undesired bits 538430d4005SDave Hansen * later, like _PAGE_RW or _PAGE_GLOBAL in some cases. 53988f3aec7SIngo Molnar */ 5408490638cSJeremy Fitzhardinge PMDS(0, __PAGE_KERNEL_LARGE_EXEC, 541d4afe414SIngo Molnar KERNEL_IMAGE_SIZE/PMD_SIZE) 542b1bd27b9SJiri SlabySYM_DATA_END(level2_kernel_pgt) 543250c2277SThomas Gleixner 544b1bd27b9SJiri SlabySYM_DATA_START_PAGE_ALIGNED(level2_fixmap_pgt) 54505ab1d8aSFeng Tang .fill (512 - 4 - FIXMAP_PMD_NUM),8,0 54605ab1d8aSFeng Tang pgtno = 0 54705ab1d8aSFeng Tang .rept (FIXMAP_PMD_NUM) 54805ab1d8aSFeng Tang .quad level1_fixmap_pgt + (pgtno << PAGE_SHIFT) - __START_KERNEL_map \ 54905ab1d8aSFeng Tang + _PAGE_TABLE_NOENC; 55005ab1d8aSFeng Tang pgtno = pgtno + 1 55105ab1d8aSFeng Tang .endr 55205ab1d8aSFeng Tang /* 6 MB reserved space + a 2MB hole */ 55305ab1d8aSFeng Tang .fill 4,8,0 554b1bd27b9SJiri SlabySYM_DATA_END(level2_fixmap_pgt) 5558170e6beSH. Peter Anvin 556b1bd27b9SJiri SlabySYM_DATA_START_PAGE_ALIGNED(level1_fixmap_pgt) 55705ab1d8aSFeng Tang .rept (FIXMAP_PMD_NUM) 558250c2277SThomas Gleixner .fill 512,8,0 55905ab1d8aSFeng Tang .endr 560b1bd27b9SJiri SlabySYM_DATA_END(level1_fixmap_pgt) 561250c2277SThomas Gleixner 562250c2277SThomas Gleixner#undef PMDS 563250c2277SThomas Gleixner 564250c2277SThomas Gleixner .data 565250c2277SThomas Gleixner .align 16 566250c2277SThomas Gleixner 567b1bd27b9SJiri SlabySYM_DATA(early_gdt_descr, .word GDT_ENTRIES*8-1) 568b1bd27b9SJiri SlabySYM_DATA_LOCAL(early_gdt_descr_base, .quad INIT_PER_CPU_VAR(gdt_page)) 569b1bd27b9SJiri Slaby 570b1bd27b9SJiri Slaby .align 16 571250c2277SThomas Gleixner/* This must match the first entry in level2_kernel_pgt */ 572b1bd27b9SJiri SlabySYM_DATA(phys_base, .quad 0x0) 573784d5699SAl ViroEXPORT_SYMBOL(phys_base) 574250c2277SThomas Gleixner 5758c5e5ac3SJeremy Fitzhardinge#include "../../x86/xen/xen-head.S" 576250c2277SThomas Gleixner 57702b7da37STim Abbott __PAGE_ALIGNED_BSS 578b1bd27b9SJiri SlabySYM_DATA_START_PAGE_ALIGNED(empty_zero_page) 579250c2277SThomas Gleixner .skip PAGE_SIZE 580b1bd27b9SJiri SlabySYM_DATA_END(empty_zero_page) 581784d5699SAl ViroEXPORT_SYMBOL(empty_zero_page) 582ef7f0d6aSAndrey Ryabinin 583