1250c2277SThomas Gleixner/* 2250c2277SThomas Gleixner * linux/arch/x86_64/kernel/head.S -- start in 32bit and switch to 64bit 3250c2277SThomas Gleixner * 4250c2277SThomas Gleixner * Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE 5250c2277SThomas Gleixner * Copyright (C) 2000 Pavel Machek <pavel@suse.cz> 6250c2277SThomas Gleixner * Copyright (C) 2000 Karsten Keil <kkeil@suse.de> 7250c2277SThomas Gleixner * Copyright (C) 2001,2002 Andi Kleen <ak@suse.de> 8250c2277SThomas Gleixner * Copyright (C) 2005 Eric Biederman <ebiederm@xmission.com> 9250c2277SThomas Gleixner */ 10250c2277SThomas Gleixner 11250c2277SThomas Gleixner 12250c2277SThomas Gleixner#include <linux/linkage.h> 13250c2277SThomas Gleixner#include <linux/threads.h> 14250c2277SThomas Gleixner#include <linux/init.h> 15250c2277SThomas Gleixner#include <asm/desc.h> 16250c2277SThomas Gleixner#include <asm/segment.h> 17250c2277SThomas Gleixner#include <asm/pgtable.h> 18250c2277SThomas Gleixner#include <asm/page.h> 19250c2277SThomas Gleixner#include <asm/msr.h> 20250c2277SThomas Gleixner#include <asm/cache.h> 21369101daSCyrill Gorcunov#include <asm/processor-flags.h> 22250c2277SThomas Gleixner 2349a69787SGlauber de Oliveira Costa#ifdef CONFIG_PARAVIRT 2449a69787SGlauber de Oliveira Costa#include <asm/asm-offsets.h> 2549a69787SGlauber de Oliveira Costa#include <asm/paravirt.h> 2649a69787SGlauber de Oliveira Costa#else 2749a69787SGlauber de Oliveira Costa#define GET_CR2_INTO_RCX movq %cr2, %rcx 2849a69787SGlauber de Oliveira Costa#endif 2949a69787SGlauber de Oliveira Costa 30250c2277SThomas Gleixner/* we are not able to switch in one step to the final KERNEL ADRESS SPACE 31250c2277SThomas Gleixner * because we need identity-mapped pages. 32250c2277SThomas Gleixner * 33250c2277SThomas Gleixner */ 34250c2277SThomas Gleixner 35250c2277SThomas Gleixner .text 36250c2277SThomas Gleixner .section .text.head 37250c2277SThomas Gleixner .code64 38250c2277SThomas Gleixner .globl startup_64 39250c2277SThomas Gleixnerstartup_64: 40250c2277SThomas Gleixner 41250c2277SThomas Gleixner /* 42250c2277SThomas Gleixner * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 1, 43250c2277SThomas Gleixner * and someone has loaded an identity mapped page table 44250c2277SThomas Gleixner * for us. These identity mapped page tables map all of the 45250c2277SThomas Gleixner * kernel pages and possibly all of memory. 46250c2277SThomas Gleixner * 47250c2277SThomas Gleixner * %esi holds a physical pointer to real_mode_data. 48250c2277SThomas Gleixner * 49250c2277SThomas Gleixner * We come here either directly from a 64bit bootloader, or from 50250c2277SThomas Gleixner * arch/x86_64/boot/compressed/head.S. 51250c2277SThomas Gleixner * 52250c2277SThomas Gleixner * We only come here initially at boot nothing else comes here. 53250c2277SThomas Gleixner * 54250c2277SThomas Gleixner * Since we may be loaded at an address different from what we were 55250c2277SThomas Gleixner * compiled to run at we first fixup the physical addresses in our page 56250c2277SThomas Gleixner * tables and then reload them. 57250c2277SThomas Gleixner */ 58250c2277SThomas Gleixner 59250c2277SThomas Gleixner /* Compute the delta between the address I am compiled to run at and the 60250c2277SThomas Gleixner * address I am actually running at. 61250c2277SThomas Gleixner */ 62250c2277SThomas Gleixner leaq _text(%rip), %rbp 63250c2277SThomas Gleixner subq $_text - __START_KERNEL_map, %rbp 64250c2277SThomas Gleixner 65250c2277SThomas Gleixner /* Is the address not 2M aligned? */ 66250c2277SThomas Gleixner movq %rbp, %rax 6731422c51SAndi Kleen andl $~PMD_PAGE_MASK, %eax 68250c2277SThomas Gleixner testl %eax, %eax 69250c2277SThomas Gleixner jnz bad_address 70250c2277SThomas Gleixner 71250c2277SThomas Gleixner /* Is the address too large? */ 72250c2277SThomas Gleixner leaq _text(%rip), %rdx 73250c2277SThomas Gleixner movq $PGDIR_SIZE, %rax 74250c2277SThomas Gleixner cmpq %rax, %rdx 75250c2277SThomas Gleixner jae bad_address 76250c2277SThomas Gleixner 77250c2277SThomas Gleixner /* Fixup the physical addresses in the page table 78250c2277SThomas Gleixner */ 79250c2277SThomas Gleixner addq %rbp, init_level4_pgt + 0(%rip) 80250c2277SThomas Gleixner addq %rbp, init_level4_pgt + (258*8)(%rip) 81250c2277SThomas Gleixner addq %rbp, init_level4_pgt + (511*8)(%rip) 82250c2277SThomas Gleixner 83250c2277SThomas Gleixner addq %rbp, level3_ident_pgt + 0(%rip) 84250c2277SThomas Gleixner 85250c2277SThomas Gleixner addq %rbp, level3_kernel_pgt + (510*8)(%rip) 86250c2277SThomas Gleixner addq %rbp, level3_kernel_pgt + (511*8)(%rip) 87250c2277SThomas Gleixner 88250c2277SThomas Gleixner addq %rbp, level2_fixmap_pgt + (506*8)(%rip) 89250c2277SThomas Gleixner 90250c2277SThomas Gleixner /* Add an Identity mapping if I am above 1G */ 91250c2277SThomas Gleixner leaq _text(%rip), %rdi 9231422c51SAndi Kleen andq $PMD_PAGE_MASK, %rdi 93250c2277SThomas Gleixner 94250c2277SThomas Gleixner movq %rdi, %rax 95250c2277SThomas Gleixner shrq $PUD_SHIFT, %rax 96250c2277SThomas Gleixner andq $(PTRS_PER_PUD - 1), %rax 97250c2277SThomas Gleixner jz ident_complete 98250c2277SThomas Gleixner 99250c2277SThomas Gleixner leaq (level2_spare_pgt - __START_KERNEL_map + _KERNPG_TABLE)(%rbp), %rdx 100250c2277SThomas Gleixner leaq level3_ident_pgt(%rip), %rbx 101250c2277SThomas Gleixner movq %rdx, 0(%rbx, %rax, 8) 102250c2277SThomas Gleixner 103250c2277SThomas Gleixner movq %rdi, %rax 104250c2277SThomas Gleixner shrq $PMD_SHIFT, %rax 105250c2277SThomas Gleixner andq $(PTRS_PER_PMD - 1), %rax 106250c2277SThomas Gleixner leaq __PAGE_KERNEL_LARGE_EXEC(%rdi), %rdx 107250c2277SThomas Gleixner leaq level2_spare_pgt(%rip), %rbx 108250c2277SThomas Gleixner movq %rdx, 0(%rbx, %rax, 8) 109250c2277SThomas Gleixnerident_complete: 110250c2277SThomas Gleixner 11131eedd82SThomas Gleixner /* 11231eedd82SThomas Gleixner * Fixup the kernel text+data virtual addresses. Note that 11331eedd82SThomas Gleixner * we might write invalid pmds, when the kernel is relocated 11431eedd82SThomas Gleixner * cleanup_highmap() fixes this up along with the mappings 11531eedd82SThomas Gleixner * beyond _end. 116250c2277SThomas Gleixner */ 11731eedd82SThomas Gleixner 118250c2277SThomas Gleixner leaq level2_kernel_pgt(%rip), %rdi 119250c2277SThomas Gleixner leaq 4096(%rdi), %r8 120250c2277SThomas Gleixner /* See if it is a valid page table entry */ 121250c2277SThomas Gleixner1: testq $1, 0(%rdi) 122250c2277SThomas Gleixner jz 2f 123250c2277SThomas Gleixner addq %rbp, 0(%rdi) 124250c2277SThomas Gleixner /* Go to the next page */ 125250c2277SThomas Gleixner2: addq $8, %rdi 126250c2277SThomas Gleixner cmp %r8, %rdi 127250c2277SThomas Gleixner jne 1b 128250c2277SThomas Gleixner 129250c2277SThomas Gleixner /* Fixup phys_base */ 130250c2277SThomas Gleixner addq %rbp, phys_base(%rip) 131250c2277SThomas Gleixner 132250c2277SThomas Gleixner#ifdef CONFIG_SMP 133250c2277SThomas Gleixner addq %rbp, trampoline_level4_pgt + 0(%rip) 134250c2277SThomas Gleixner addq %rbp, trampoline_level4_pgt + (511*8)(%rip) 135250c2277SThomas Gleixner#endif 136250c2277SThomas Gleixner 137250c2277SThomas Gleixner /* Due to ENTRY(), sometimes the empty space gets filled with 138250c2277SThomas Gleixner * zeros. Better take a jmp than relying on empty space being 139250c2277SThomas Gleixner * filled with 0x90 (nop) 140250c2277SThomas Gleixner */ 141250c2277SThomas Gleixner jmp secondary_startup_64 142250c2277SThomas GleixnerENTRY(secondary_startup_64) 143250c2277SThomas Gleixner /* 144250c2277SThomas Gleixner * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 1, 145250c2277SThomas Gleixner * and someone has loaded a mapped page table. 146250c2277SThomas Gleixner * 147250c2277SThomas Gleixner * %esi holds a physical pointer to real_mode_data. 148250c2277SThomas Gleixner * 149250c2277SThomas Gleixner * We come here either from startup_64 (using physical addresses) 150250c2277SThomas Gleixner * or from trampoline.S (using virtual addresses). 151250c2277SThomas Gleixner * 152250c2277SThomas Gleixner * Using virtual addresses from trampoline.S removes the need 153250c2277SThomas Gleixner * to have any identity mapped pages in the kernel page table 154250c2277SThomas Gleixner * after the boot processor executes this code. 155250c2277SThomas Gleixner */ 156250c2277SThomas Gleixner 157250c2277SThomas Gleixner /* Enable PAE mode and PGE */ 15805139d8fSCyrill Gorcunov movl $(X86_CR4_PAE | X86_CR4_PGE), %eax 159250c2277SThomas Gleixner movq %rax, %cr4 160250c2277SThomas Gleixner 161250c2277SThomas Gleixner /* Setup early boot stage 4 level pagetables. */ 162250c2277SThomas Gleixner movq $(init_level4_pgt - __START_KERNEL_map), %rax 163250c2277SThomas Gleixner addq phys_base(%rip), %rax 164250c2277SThomas Gleixner movq %rax, %cr3 165250c2277SThomas Gleixner 166250c2277SThomas Gleixner /* Ensure I am executing from virtual addresses */ 167250c2277SThomas Gleixner movq $1f, %rax 168250c2277SThomas Gleixner jmp *%rax 169250c2277SThomas Gleixner1: 170250c2277SThomas Gleixner 171250c2277SThomas Gleixner /* Check if nx is implemented */ 172250c2277SThomas Gleixner movl $0x80000001, %eax 173250c2277SThomas Gleixner cpuid 174250c2277SThomas Gleixner movl %edx,%edi 175250c2277SThomas Gleixner 176250c2277SThomas Gleixner /* Setup EFER (Extended Feature Enable Register) */ 177250c2277SThomas Gleixner movl $MSR_EFER, %ecx 178250c2277SThomas Gleixner rdmsr 179250c2277SThomas Gleixner btsl $_EFER_SCE, %eax /* Enable System Call */ 180250c2277SThomas Gleixner btl $20,%edi /* No Execute supported? */ 181250c2277SThomas Gleixner jnc 1f 182250c2277SThomas Gleixner btsl $_EFER_NX, %eax 183250c2277SThomas Gleixner1: wrmsr /* Make changes effective */ 184250c2277SThomas Gleixner 185250c2277SThomas Gleixner /* Setup cr0 */ 186369101daSCyrill Gorcunov#define CR0_STATE (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | \ 187369101daSCyrill Gorcunov X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | \ 188369101daSCyrill Gorcunov X86_CR0_PG) 189369101daSCyrill Gorcunov movl $CR0_STATE, %eax 190250c2277SThomas Gleixner /* Make changes effective */ 191250c2277SThomas Gleixner movq %rax, %cr0 192250c2277SThomas Gleixner 193250c2277SThomas Gleixner /* Setup a boot time stack */ 194250c2277SThomas Gleixner movq init_rsp(%rip),%rsp 195250c2277SThomas Gleixner 196250c2277SThomas Gleixner /* zero EFLAGS after setting rsp */ 197250c2277SThomas Gleixner pushq $0 198250c2277SThomas Gleixner popfq 199250c2277SThomas Gleixner 200250c2277SThomas Gleixner /* 201250c2277SThomas Gleixner * We must switch to a new descriptor in kernel space for the GDT 202250c2277SThomas Gleixner * because soon the kernel won't have access anymore to the userspace 203250c2277SThomas Gleixner * addresses where we're currently running on. We have to do that here 204250c2277SThomas Gleixner * because in 32bit we couldn't load a 64bit linear address. 205250c2277SThomas Gleixner */ 206250c2277SThomas Gleixner lgdt cpu_gdt_descr(%rip) 207250c2277SThomas Gleixner 208250c2277SThomas Gleixner /* set up data segments. actually 0 would do too */ 209250c2277SThomas Gleixner movl $__KERNEL_DS,%eax 210250c2277SThomas Gleixner movl %eax,%ds 211250c2277SThomas Gleixner movl %eax,%ss 212250c2277SThomas Gleixner movl %eax,%es 213250c2277SThomas Gleixner 214250c2277SThomas Gleixner /* 215250c2277SThomas Gleixner * We don't really need to load %fs or %gs, but load them anyway 216250c2277SThomas Gleixner * to kill any stale realmode selectors. This allows execution 217250c2277SThomas Gleixner * under VT hardware. 218250c2277SThomas Gleixner */ 219250c2277SThomas Gleixner movl %eax,%fs 220250c2277SThomas Gleixner movl %eax,%gs 221250c2277SThomas Gleixner 222250c2277SThomas Gleixner /* 223250c2277SThomas Gleixner * Setup up a dummy PDA. this is just for some early bootup code 224250c2277SThomas Gleixner * that does in_interrupt() 225250c2277SThomas Gleixner */ 226250c2277SThomas Gleixner movl $MSR_GS_BASE,%ecx 227250c2277SThomas Gleixner movq $empty_zero_page,%rax 228250c2277SThomas Gleixner movq %rax,%rdx 229250c2277SThomas Gleixner shrq $32,%rdx 230250c2277SThomas Gleixner wrmsr 231250c2277SThomas Gleixner 232250c2277SThomas Gleixner /* esi is pointer to real mode structure with interesting info. 233250c2277SThomas Gleixner pass it to C */ 234250c2277SThomas Gleixner movl %esi, %edi 235250c2277SThomas Gleixner 236250c2277SThomas Gleixner /* Finally jump to run C code and to be on real kernel address 237250c2277SThomas Gleixner * Since we are running on identity-mapped space we have to jump 238250c2277SThomas Gleixner * to the full 64bit address, this is only possible as indirect 239250c2277SThomas Gleixner * jump. In addition we need to ensure %cs is set so we make this 240250c2277SThomas Gleixner * a far return. 241250c2277SThomas Gleixner */ 242250c2277SThomas Gleixner movq initial_code(%rip),%rax 243250c2277SThomas Gleixner pushq $0 # fake return address to stop unwinder 244250c2277SThomas Gleixner pushq $__KERNEL_CS # set correct cs 245250c2277SThomas Gleixner pushq %rax # target address in negative space 246250c2277SThomas Gleixner lretq 247250c2277SThomas Gleixner 248250c2277SThomas Gleixner /* SMP bootup changes these two */ 249da5968aeSSam Ravnborg __REFDATA 250250c2277SThomas Gleixner .align 8 251f1fbabb3SSam Ravnborg ENTRY(initial_code) 252250c2277SThomas Gleixner .quad x86_64_start_kernel 253f1fbabb3SSam Ravnborg __FINITDATA 254f1fbabb3SSam Ravnborg 255f1fbabb3SSam Ravnborg ENTRY(init_rsp) 256250c2277SThomas Gleixner .quad init_thread_union+THREAD_SIZE-8 257250c2277SThomas Gleixner 258250c2277SThomas Gleixnerbad_address: 259250c2277SThomas Gleixner jmp bad_address 260250c2277SThomas Gleixner 26141bd4eacSAndi Kleen .section ".init.text","ax" 262076f9776SIngo Molnar#ifdef CONFIG_EARLY_PRINTK 2638866cd9dSRoland McGrath .globl early_idt_handlers 2648866cd9dSRoland McGrathearly_idt_handlers: 265749c970aSAndi Kleen i = 0 266749c970aSAndi Kleen .rept NUM_EXCEPTION_VECTORS 267749c970aSAndi Kleen movl $i, %esi 268749c970aSAndi Kleen jmp early_idt_handler 269749c970aSAndi Kleen i = i + 1 270749c970aSAndi Kleen .endr 271076f9776SIngo Molnar#endif 2728866cd9dSRoland McGrath 273250c2277SThomas GleixnerENTRY(early_idt_handler) 274076f9776SIngo Molnar#ifdef CONFIG_EARLY_PRINTK 275250c2277SThomas Gleixner cmpl $2,early_recursion_flag(%rip) 276250c2277SThomas Gleixner jz 1f 277250c2277SThomas Gleixner incl early_recursion_flag(%rip) 27849a69787SGlauber de Oliveira Costa GET_CR2_INTO_RCX 2798866cd9dSRoland McGrath movq %rcx,%r9 2808866cd9dSRoland McGrath xorl %r8d,%r8d # zero for error code 2818866cd9dSRoland McGrath movl %esi,%ecx # get vector number 2828866cd9dSRoland McGrath # Test %ecx against mask of vectors that push error code. 2838866cd9dSRoland McGrath cmpl $31,%ecx 2848866cd9dSRoland McGrath ja 0f 2858866cd9dSRoland McGrath movl $1,%eax 2868866cd9dSRoland McGrath salq %cl,%rax 2878866cd9dSRoland McGrath testl $0x27d00,%eax 2888866cd9dSRoland McGrath je 0f 2898866cd9dSRoland McGrath popq %r8 # get error code 2908866cd9dSRoland McGrath0: movq 0(%rsp),%rcx # get ip 2918866cd9dSRoland McGrath movq 8(%rsp),%rdx # get cs 2928866cd9dSRoland McGrath xorl %eax,%eax 293250c2277SThomas Gleixner leaq early_idt_msg(%rip),%rdi 294250c2277SThomas Gleixner call early_printk 295250c2277SThomas Gleixner cmpl $2,early_recursion_flag(%rip) 296250c2277SThomas Gleixner jz 1f 297250c2277SThomas Gleixner call dump_stack 298250c2277SThomas Gleixner#ifdef CONFIG_KALLSYMS 299250c2277SThomas Gleixner leaq early_idt_ripmsg(%rip),%rdi 300250c2277SThomas Gleixner movq 8(%rsp),%rsi # get rip again 301250c2277SThomas Gleixner call __print_symbol 302250c2277SThomas Gleixner#endif 303076f9776SIngo Molnar#endif /* EARLY_PRINTK */ 304250c2277SThomas Gleixner1: hlt 305250c2277SThomas Gleixner jmp 1b 306076f9776SIngo Molnar 307076f9776SIngo Molnar#ifdef CONFIG_EARLY_PRINTK 308250c2277SThomas Gleixnerearly_recursion_flag: 309250c2277SThomas Gleixner .long 0 310250c2277SThomas Gleixner 311250c2277SThomas Gleixnerearly_idt_msg: 3128866cd9dSRoland McGrath .asciz "PANIC: early exception %02lx rip %lx:%lx error %lx cr2 %lx\n" 313250c2277SThomas Gleixnerearly_idt_ripmsg: 314250c2277SThomas Gleixner .asciz "RIP %s\n" 315076f9776SIngo Molnar#endif /* CONFIG_EARLY_PRINTK */ 31641bd4eacSAndi Kleen .previous 317250c2277SThomas Gleixner 318250c2277SThomas Gleixner.balign PAGE_SIZE 319250c2277SThomas Gleixner 320250c2277SThomas Gleixner#define NEXT_PAGE(name) \ 321250c2277SThomas Gleixner .balign PAGE_SIZE; \ 322250c2277SThomas GleixnerENTRY(name) 323250c2277SThomas Gleixner 324250c2277SThomas Gleixner/* Automate the creation of 1 to 1 mapping pmd entries */ 325250c2277SThomas Gleixner#define PMDS(START, PERM, COUNT) \ 326250c2277SThomas Gleixner i = 0 ; \ 327250c2277SThomas Gleixner .rept (COUNT) ; \ 3280e192b99SCyrill Gorcunov .quad (START) + (i << PMD_SHIFT) + (PERM) ; \ 329250c2277SThomas Gleixner i = i + 1 ; \ 330250c2277SThomas Gleixner .endr 331250c2277SThomas Gleixner 332250c2277SThomas Gleixner /* 333250c2277SThomas Gleixner * This default setting generates an ident mapping at address 0x100000 334250c2277SThomas Gleixner * and a mapping for the kernel that precisely maps virtual address 335250c2277SThomas Gleixner * 0xffffffff80000000 to physical address 0x000000. (always using 336250c2277SThomas Gleixner * 2Mbyte large pages provided by PAE mode) 337250c2277SThomas Gleixner */ 338250c2277SThomas GleixnerNEXT_PAGE(init_level4_pgt) 339250c2277SThomas Gleixner .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE 340250c2277SThomas Gleixner .fill 257,8,0 341250c2277SThomas Gleixner .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE 342250c2277SThomas Gleixner .fill 252,8,0 343250c2277SThomas Gleixner /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */ 344250c2277SThomas Gleixner .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE 345250c2277SThomas Gleixner 346250c2277SThomas GleixnerNEXT_PAGE(level3_ident_pgt) 347250c2277SThomas Gleixner .quad level2_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE 348250c2277SThomas Gleixner .fill 511,8,0 349250c2277SThomas Gleixner 350250c2277SThomas GleixnerNEXT_PAGE(level3_kernel_pgt) 351250c2277SThomas Gleixner .fill 510,8,0 352250c2277SThomas Gleixner /* (2^48-(2*1024*1024*1024)-((2^39)*511))/(2^30) = 510 */ 353250c2277SThomas Gleixner .quad level2_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE 354250c2277SThomas Gleixner .quad level2_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE 355250c2277SThomas Gleixner 356250c2277SThomas GleixnerNEXT_PAGE(level2_fixmap_pgt) 357250c2277SThomas Gleixner .fill 506,8,0 358250c2277SThomas Gleixner .quad level1_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE 359250c2277SThomas Gleixner /* 8MB reserved for vsyscalls + a 2MB hole = 4 + 1 entries */ 360250c2277SThomas Gleixner .fill 5,8,0 361250c2277SThomas Gleixner 362250c2277SThomas GleixnerNEXT_PAGE(level1_fixmap_pgt) 363250c2277SThomas Gleixner .fill 512,8,0 364250c2277SThomas Gleixner 365250c2277SThomas GleixnerNEXT_PAGE(level2_ident_pgt) 366250c2277SThomas Gleixner /* Since I easily can, map the first 1G. 367250c2277SThomas Gleixner * Don't set NX because code runs from these pages. 368250c2277SThomas Gleixner */ 36988f3aec7SIngo Molnar PMDS(0, __PAGE_KERNEL_LARGE_EXEC, PTRS_PER_PMD) 370250c2277SThomas Gleixner 371250c2277SThomas GleixnerNEXT_PAGE(level2_kernel_pgt) 37288f3aec7SIngo Molnar /* 37385eb69a1SIngo Molnar * 512 MB kernel mapping. We spend a full page on this pagetable 37488f3aec7SIngo Molnar * anyway. 37588f3aec7SIngo Molnar * 37688f3aec7SIngo Molnar * The kernel code+data+bss must not be bigger than that. 37788f3aec7SIngo Molnar * 37885eb69a1SIngo Molnar * (NOTE: at +512MB starts the module area, see MODULES_VADDR. 37988f3aec7SIngo Molnar * If you want to increase this then increase MODULES_VADDR 38088f3aec7SIngo Molnar * too.) 38188f3aec7SIngo Molnar */ 38288f3aec7SIngo Molnar PMDS(0, __PAGE_KERNEL_LARGE_EXEC|_PAGE_GLOBAL, 383d4afe414SIngo Molnar KERNEL_IMAGE_SIZE/PMD_SIZE) 384250c2277SThomas Gleixner 385250c2277SThomas GleixnerNEXT_PAGE(level2_spare_pgt) 386250c2277SThomas Gleixner .fill 512, 8, 0 387250c2277SThomas Gleixner 388250c2277SThomas Gleixner#undef PMDS 389250c2277SThomas Gleixner#undef NEXT_PAGE 390250c2277SThomas Gleixner 391250c2277SThomas Gleixner .data 392250c2277SThomas Gleixner .align 16 393250c2277SThomas Gleixner .globl cpu_gdt_descr 394250c2277SThomas Gleixnercpu_gdt_descr: 395250c2277SThomas Gleixner .word gdt_end-cpu_gdt_table-1 396250c2277SThomas Gleixnergdt: 397250c2277SThomas Gleixner .quad cpu_gdt_table 398250c2277SThomas Gleixner#ifdef CONFIG_SMP 399250c2277SThomas Gleixner .rept NR_CPUS-1 400250c2277SThomas Gleixner .word 0 401250c2277SThomas Gleixner .quad 0 402250c2277SThomas Gleixner .endr 403250c2277SThomas Gleixner#endif 404250c2277SThomas Gleixner 405250c2277SThomas GleixnerENTRY(phys_base) 406250c2277SThomas Gleixner /* This must match the first entry in level2_kernel_pgt */ 407250c2277SThomas Gleixner .quad 0x0000000000000000 408250c2277SThomas Gleixner 409250c2277SThomas Gleixner/* We need valid kernel segments for data and code in long mode too 410250c2277SThomas Gleixner * IRET will check the segment types kkeil 2000/10/28 411250c2277SThomas Gleixner * Also sysret mandates a special GDT layout 412250c2277SThomas Gleixner */ 413250c2277SThomas Gleixner 414250c2277SThomas Gleixner .section .data.page_aligned, "aw" 415250c2277SThomas Gleixner .align PAGE_SIZE 416250c2277SThomas Gleixner 417250c2277SThomas Gleixner/* The TLS descriptors are currently at a different place compared to i386. 418250c2277SThomas Gleixner Hopefully nobody expects them at a fixed place (Wine?) */ 419250c2277SThomas Gleixner 420250c2277SThomas GleixnerENTRY(cpu_gdt_table) 421250c2277SThomas Gleixner .quad 0x0000000000000000 /* NULL descriptor */ 422250c2277SThomas Gleixner .quad 0x00cf9b000000ffff /* __KERNEL32_CS */ 423250c2277SThomas Gleixner .quad 0x00af9b000000ffff /* __KERNEL_CS */ 424250c2277SThomas Gleixner .quad 0x00cf93000000ffff /* __KERNEL_DS */ 425250c2277SThomas Gleixner .quad 0x00cffb000000ffff /* __USER32_CS */ 426250c2277SThomas Gleixner .quad 0x00cff3000000ffff /* __USER_DS, __USER32_DS */ 427250c2277SThomas Gleixner .quad 0x00affb000000ffff /* __USER_CS */ 428250c2277SThomas Gleixner .quad 0x0 /* unused */ 429250c2277SThomas Gleixner .quad 0,0 /* TSS */ 430250c2277SThomas Gleixner .quad 0,0 /* LDT */ 431250c2277SThomas Gleixner .quad 0,0,0 /* three TLS descriptors */ 432250c2277SThomas Gleixner .quad 0x0000f40000000000 /* node/CPU stored in limit */ 433250c2277SThomas Gleixnergdt_end: 434250c2277SThomas Gleixner /* asm/segment.h:GDT_ENTRIES must match this */ 435250c2277SThomas Gleixner /* This should be a multiple of the cache line size */ 436250c2277SThomas Gleixner /* GDTs of other CPUs are now dynamically allocated */ 437250c2277SThomas Gleixner 438250c2277SThomas Gleixner /* zero the remaining page */ 439250c2277SThomas Gleixner .fill PAGE_SIZE / 8 - GDT_ENTRIES,8,0 440250c2277SThomas Gleixner 441250c2277SThomas Gleixner .section .bss, "aw", @nobits 442250c2277SThomas Gleixner .align L1_CACHE_BYTES 443250c2277SThomas GleixnerENTRY(idt_table) 444250c2277SThomas Gleixner .skip 256 * 16 445250c2277SThomas Gleixner 446250c2277SThomas Gleixner .section .bss.page_aligned, "aw", @nobits 447250c2277SThomas Gleixner .align PAGE_SIZE 448250c2277SThomas GleixnerENTRY(empty_zero_page) 449250c2277SThomas Gleixner .skip PAGE_SIZE 450