1 /* 2 * SMP support for PowerNV machines. 3 * 4 * Copyright 2011 IBM Corp. 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 9 * 2 of the License, or (at your option) any later version. 10 */ 11 12 #include <linux/kernel.h> 13 #include <linux/module.h> 14 #include <linux/sched.h> 15 #include <linux/sched/hotplug.h> 16 #include <linux/smp.h> 17 #include <linux/interrupt.h> 18 #include <linux/delay.h> 19 #include <linux/init.h> 20 #include <linux/spinlock.h> 21 #include <linux/cpu.h> 22 23 #include <asm/irq.h> 24 #include <asm/smp.h> 25 #include <asm/paca.h> 26 #include <asm/machdep.h> 27 #include <asm/cputable.h> 28 #include <asm/firmware.h> 29 #include <asm/vdso_datapage.h> 30 #include <asm/cputhreads.h> 31 #include <asm/xics.h> 32 #include <asm/xive.h> 33 #include <asm/opal.h> 34 #include <asm/runlatch.h> 35 #include <asm/code-patching.h> 36 #include <asm/dbell.h> 37 #include <asm/kvm_ppc.h> 38 #include <asm/ppc-opcode.h> 39 #include <asm/cpuidle.h> 40 #include <asm/kexec.h> 41 #include <asm/reg.h> 42 #include <asm/powernv.h> 43 44 #include "powernv.h" 45 46 #ifdef DEBUG 47 #include <asm/udbg.h> 48 #define DBG(fmt...) udbg_printf(fmt) 49 #else 50 #define DBG(fmt...) 51 #endif 52 53 static void pnv_smp_setup_cpu(int cpu) 54 { 55 /* 56 * P9 workaround for CI vector load (see traps.c), 57 * enable the corresponding HMI interrupt 58 */ 59 if (pvr_version_is(PVR_POWER9)) 60 mtspr(SPRN_HMEER, mfspr(SPRN_HMEER) | PPC_BIT(17)); 61 62 if (xive_enabled()) 63 xive_smp_setup_cpu(); 64 else if (cpu != boot_cpuid) 65 xics_setup_cpu(); 66 } 67 68 static int pnv_smp_kick_cpu(int nr) 69 { 70 unsigned int pcpu; 71 unsigned long start_here = 72 __pa(ppc_function_entry(generic_secondary_smp_init)); 73 long rc; 74 uint8_t status; 75 76 if (nr < 0 || nr >= nr_cpu_ids) 77 return -EINVAL; 78 79 pcpu = get_hard_smp_processor_id(nr); 80 /* 81 * If we already started or OPAL is not supported, we just 82 * kick the CPU via the PACA 83 */ 84 if (paca_ptrs[nr]->cpu_start || !firmware_has_feature(FW_FEATURE_OPAL)) 85 goto kick; 86 87 /* 88 * At this point, the CPU can either be spinning on the way in 89 * from kexec or be inside OPAL waiting to be started for the 90 * first time. OPAL v3 allows us to query OPAL to know if it 91 * has the CPUs, so we do that 92 */ 93 rc = opal_query_cpu_status(pcpu, &status); 94 if (rc != OPAL_SUCCESS) { 95 pr_warn("OPAL Error %ld querying CPU %d state\n", rc, nr); 96 return -ENODEV; 97 } 98 99 /* 100 * Already started, just kick it, probably coming from 101 * kexec and spinning 102 */ 103 if (status == OPAL_THREAD_STARTED) 104 goto kick; 105 106 /* 107 * Available/inactive, let's kick it 108 */ 109 if (status == OPAL_THREAD_INACTIVE) { 110 pr_devel("OPAL: Starting CPU %d (HW 0x%x)...\n", nr, pcpu); 111 rc = opal_start_cpu(pcpu, start_here); 112 if (rc != OPAL_SUCCESS) { 113 pr_warn("OPAL Error %ld starting CPU %d\n", rc, nr); 114 return -ENODEV; 115 } 116 } else { 117 /* 118 * An unavailable CPU (or any other unknown status) 119 * shouldn't be started. It should also 120 * not be in the possible map but currently it can 121 * happen 122 */ 123 pr_devel("OPAL: CPU %d (HW 0x%x) is unavailable" 124 " (status %d)...\n", nr, pcpu, status); 125 return -ENODEV; 126 } 127 128 kick: 129 return smp_generic_kick_cpu(nr); 130 } 131 132 #ifdef CONFIG_HOTPLUG_CPU 133 134 static int pnv_smp_cpu_disable(void) 135 { 136 int cpu = smp_processor_id(); 137 138 /* This is identical to pSeries... might consolidate by 139 * moving migrate_irqs_away to a ppc_md with default to 140 * the generic fixup_irqs. --BenH. 141 */ 142 set_cpu_online(cpu, false); 143 vdso_data->processorCount--; 144 if (cpu == boot_cpuid) 145 boot_cpuid = cpumask_any(cpu_online_mask); 146 if (xive_enabled()) 147 xive_smp_disable_cpu(); 148 else 149 xics_migrate_irqs_away(); 150 return 0; 151 } 152 153 static void pnv_smp_cpu_kill_self(void) 154 { 155 unsigned int cpu; 156 unsigned long srr1, wmask; 157 u64 lpcr_val; 158 159 /* Standard hot unplug procedure */ 160 /* 161 * This hard disables local interurpts, ensuring we have no lazy 162 * irqs pending. 163 */ 164 WARN_ON(irqs_disabled()); 165 hard_irq_disable(); 166 WARN_ON(lazy_irq_pending()); 167 168 idle_task_exit(); 169 current->active_mm = NULL; /* for sanity */ 170 cpu = smp_processor_id(); 171 DBG("CPU%d offline\n", cpu); 172 generic_set_cpu_dead(cpu); 173 smp_wmb(); 174 175 wmask = SRR1_WAKEMASK; 176 if (cpu_has_feature(CPU_FTR_ARCH_207S)) 177 wmask = SRR1_WAKEMASK_P8; 178 179 /* 180 * We don't want to take decrementer interrupts while we are 181 * offline, so clear LPCR:PECE1. We keep PECE2 (and 182 * LPCR_PECE_HVEE on P9) enabled so as to let IPIs in. 183 * 184 * If the CPU gets woken up by a special wakeup, ensure that 185 * the SLW engine sets LPCR with decrementer bit cleared, else 186 * the CPU will come back to the kernel due to a spurious 187 * wakeup. 188 */ 189 lpcr_val = mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1; 190 pnv_program_cpu_hotplug_lpcr(cpu, lpcr_val); 191 192 while (!generic_check_cpu_restart(cpu)) { 193 /* 194 * Clear IPI flag, since we don't handle IPIs while 195 * offline, except for those when changing micro-threading 196 * mode, which are handled explicitly below, and those 197 * for coming online, which are handled via 198 * generic_check_cpu_restart() calls. 199 */ 200 kvmppc_set_host_ipi(cpu, 0); 201 202 srr1 = pnv_cpu_offline(cpu); 203 204 WARN_ON(lazy_irq_pending()); 205 206 /* 207 * If the SRR1 value indicates that we woke up due to 208 * an external interrupt, then clear the interrupt. 209 * We clear the interrupt before checking for the 210 * reason, so as to avoid a race where we wake up for 211 * some other reason, find nothing and clear the interrupt 212 * just as some other cpu is sending us an interrupt. 213 * If we returned from power7_nap as a result of 214 * having finished executing in a KVM guest, then srr1 215 * contains 0. 216 */ 217 if (((srr1 & wmask) == SRR1_WAKEEE) || 218 ((srr1 & wmask) == SRR1_WAKEHVI)) { 219 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 220 if (xive_enabled()) 221 xive_flush_interrupt(); 222 else 223 icp_opal_flush_interrupt(); 224 } else 225 icp_native_flush_interrupt(); 226 } else if ((srr1 & wmask) == SRR1_WAKEHDBELL) { 227 unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER); 228 asm volatile(PPC_MSGCLR(%0) : : "r" (msg)); 229 } else if ((srr1 & wmask) == SRR1_WAKERESET) { 230 irq_set_pending_from_srr1(srr1); 231 /* Does not return */ 232 } 233 234 smp_mb(); 235 236 /* 237 * For kdump kernels, we process the ipi and jump to 238 * crash_ipi_callback 239 */ 240 if (kdump_in_progress()) { 241 /* 242 * If we got to this point, we've not used 243 * NMI's, otherwise we would have gone 244 * via the SRR1_WAKERESET path. We are 245 * using regular IPI's for waking up offline 246 * threads. 247 */ 248 struct pt_regs regs; 249 250 ppc_save_regs(®s); 251 crash_ipi_callback(®s); 252 /* Does not return */ 253 } 254 255 if (cpu_core_split_required()) 256 continue; 257 258 if (srr1 && !generic_check_cpu_restart(cpu)) 259 DBG("CPU%d Unexpected exit while offline srr1=%lx!\n", 260 cpu, srr1); 261 262 } 263 264 /* 265 * Re-enable decrementer interrupts in LPCR. 266 * 267 * Further, we want stop states to be woken up by decrementer 268 * for non-hotplug cases. So program the LPCR via stop api as 269 * well. 270 */ 271 lpcr_val = mfspr(SPRN_LPCR) | (u64)LPCR_PECE1; 272 pnv_program_cpu_hotplug_lpcr(cpu, lpcr_val); 273 274 DBG("CPU%d coming online...\n", cpu); 275 } 276 277 #endif /* CONFIG_HOTPLUG_CPU */ 278 279 static int pnv_cpu_bootable(unsigned int nr) 280 { 281 /* 282 * Starting with POWER8, the subcore logic relies on all threads of a 283 * core being booted so that they can participate in split mode 284 * switches. So on those machines we ignore the smt_enabled_at_boot 285 * setting (smt-enabled on the kernel command line). 286 */ 287 if (cpu_has_feature(CPU_FTR_ARCH_207S)) 288 return 1; 289 290 return smp_generic_cpu_bootable(nr); 291 } 292 293 static int pnv_smp_prepare_cpu(int cpu) 294 { 295 if (xive_enabled()) 296 return xive_smp_prepare_cpu(cpu); 297 return 0; 298 } 299 300 /* Cause IPI as setup by the interrupt controller (xics or xive) */ 301 static void (*ic_cause_ipi)(int cpu); 302 303 static void pnv_cause_ipi(int cpu) 304 { 305 if (doorbell_try_core_ipi(cpu)) 306 return; 307 308 ic_cause_ipi(cpu); 309 } 310 311 static void __init pnv_smp_probe(void) 312 { 313 if (xive_enabled()) 314 xive_smp_probe(); 315 else 316 xics_smp_probe(); 317 318 if (cpu_has_feature(CPU_FTR_DBELL)) { 319 ic_cause_ipi = smp_ops->cause_ipi; 320 WARN_ON(!ic_cause_ipi); 321 322 if (cpu_has_feature(CPU_FTR_ARCH_300)) 323 smp_ops->cause_ipi = doorbell_global_ipi; 324 else 325 smp_ops->cause_ipi = pnv_cause_ipi; 326 } 327 } 328 329 static int pnv_system_reset_exception(struct pt_regs *regs) 330 { 331 if (smp_handle_nmi_ipi(regs)) 332 return 1; 333 return 0; 334 } 335 336 static int pnv_cause_nmi_ipi(int cpu) 337 { 338 int64_t rc; 339 340 if (cpu >= 0) { 341 int h = get_hard_smp_processor_id(cpu); 342 343 if (opal_check_token(OPAL_QUIESCE)) 344 opal_quiesce(QUIESCE_HOLD, h); 345 346 rc = opal_signal_system_reset(h); 347 348 if (opal_check_token(OPAL_QUIESCE)) 349 opal_quiesce(QUIESCE_RESUME, h); 350 351 if (rc != OPAL_SUCCESS) 352 return 0; 353 return 1; 354 355 } else if (cpu == NMI_IPI_ALL_OTHERS) { 356 bool success = true; 357 int c; 358 359 if (opal_check_token(OPAL_QUIESCE)) 360 opal_quiesce(QUIESCE_HOLD, -1); 361 362 /* 363 * We do not use broadcasts (yet), because it's not clear 364 * exactly what semantics Linux wants or the firmware should 365 * provide. 366 */ 367 for_each_online_cpu(c) { 368 if (c == smp_processor_id()) 369 continue; 370 371 rc = opal_signal_system_reset( 372 get_hard_smp_processor_id(c)); 373 if (rc != OPAL_SUCCESS) 374 success = false; 375 } 376 377 if (opal_check_token(OPAL_QUIESCE)) 378 opal_quiesce(QUIESCE_RESUME, -1); 379 380 if (success) 381 return 1; 382 383 /* 384 * Caller will fall back to doorbells, which may pick 385 * up the remainders. 386 */ 387 } 388 389 return 0; 390 } 391 392 static struct smp_ops_t pnv_smp_ops = { 393 .message_pass = NULL, /* Use smp_muxed_ipi_message_pass */ 394 .cause_ipi = NULL, /* Filled at runtime by pnv_smp_probe() */ 395 .cause_nmi_ipi = NULL, 396 .probe = pnv_smp_probe, 397 .prepare_cpu = pnv_smp_prepare_cpu, 398 .kick_cpu = pnv_smp_kick_cpu, 399 .setup_cpu = pnv_smp_setup_cpu, 400 .cpu_bootable = pnv_cpu_bootable, 401 #ifdef CONFIG_HOTPLUG_CPU 402 .cpu_disable = pnv_smp_cpu_disable, 403 .cpu_die = generic_cpu_die, 404 #endif /* CONFIG_HOTPLUG_CPU */ 405 }; 406 407 /* This is called very early during platform setup_arch */ 408 void __init pnv_smp_init(void) 409 { 410 if (opal_check_token(OPAL_SIGNAL_SYSTEM_RESET)) { 411 ppc_md.system_reset_exception = pnv_system_reset_exception; 412 pnv_smp_ops.cause_nmi_ipi = pnv_cause_nmi_ipi; 413 } 414 smp_ops = &pnv_smp_ops; 415 416 #ifdef CONFIG_HOTPLUG_CPU 417 ppc_md.cpu_die = pnv_smp_cpu_kill_self; 418 #ifdef CONFIG_KEXEC_CORE 419 crash_wake_offline = 1; 420 #endif 421 #endif 422 } 423