1184cd4a3SBenjamin Herrenschmidt /* 2184cd4a3SBenjamin Herrenschmidt * Support PCI/PCIe on PowerNV platforms 3184cd4a3SBenjamin Herrenschmidt * 4184cd4a3SBenjamin Herrenschmidt * Copyright 2011 Benjamin Herrenschmidt, IBM Corp. 5184cd4a3SBenjamin Herrenschmidt * 6184cd4a3SBenjamin Herrenschmidt * This program is free software; you can redistribute it and/or 7184cd4a3SBenjamin Herrenschmidt * modify it under the terms of the GNU General Public License 8184cd4a3SBenjamin Herrenschmidt * as published by the Free Software Foundation; either version 9184cd4a3SBenjamin Herrenschmidt * 2 of the License, or (at your option) any later version. 10184cd4a3SBenjamin Herrenschmidt */ 11184cd4a3SBenjamin Herrenschmidt 12cee72d5bSBenjamin Herrenschmidt #undef DEBUG 13184cd4a3SBenjamin Herrenschmidt 14184cd4a3SBenjamin Herrenschmidt #include <linux/kernel.h> 15184cd4a3SBenjamin Herrenschmidt #include <linux/pci.h> 16184cd4a3SBenjamin Herrenschmidt #include <linux/delay.h> 17184cd4a3SBenjamin Herrenschmidt #include <linux/string.h> 18184cd4a3SBenjamin Herrenschmidt #include <linux/init.h> 19184cd4a3SBenjamin Herrenschmidt #include <linux/bootmem.h> 20184cd4a3SBenjamin Herrenschmidt #include <linux/irq.h> 21184cd4a3SBenjamin Herrenschmidt #include <linux/io.h> 22184cd4a3SBenjamin Herrenschmidt #include <linux/msi.h> 23184cd4a3SBenjamin Herrenschmidt 24184cd4a3SBenjamin Herrenschmidt #include <asm/sections.h> 25184cd4a3SBenjamin Herrenschmidt #include <asm/io.h> 26184cd4a3SBenjamin Herrenschmidt #include <asm/prom.h> 27184cd4a3SBenjamin Herrenschmidt #include <asm/pci-bridge.h> 28184cd4a3SBenjamin Herrenschmidt #include <asm/machdep.h> 29184cd4a3SBenjamin Herrenschmidt #include <asm/ppc-pci.h> 30184cd4a3SBenjamin Herrenschmidt #include <asm/opal.h> 31184cd4a3SBenjamin Herrenschmidt #include <asm/iommu.h> 32184cd4a3SBenjamin Herrenschmidt #include <asm/tce.h> 33184cd4a3SBenjamin Herrenschmidt 34184cd4a3SBenjamin Herrenschmidt #include "powernv.h" 35184cd4a3SBenjamin Herrenschmidt #include "pci.h" 36184cd4a3SBenjamin Herrenschmidt 37184cd4a3SBenjamin Herrenschmidt struct resource_wrap { 38184cd4a3SBenjamin Herrenschmidt struct list_head link; 39184cd4a3SBenjamin Herrenschmidt resource_size_t size; 40184cd4a3SBenjamin Herrenschmidt resource_size_t align; 41184cd4a3SBenjamin Herrenschmidt struct pci_dev *dev; /* Set if it's a device */ 42184cd4a3SBenjamin Herrenschmidt struct pci_bus *bus; /* Set if it's a bridge */ 43184cd4a3SBenjamin Herrenschmidt }; 44184cd4a3SBenjamin Herrenschmidt 45184cd4a3SBenjamin Herrenschmidt static int __pe_printk(const char *level, const struct pnv_ioda_pe *pe, 46184cd4a3SBenjamin Herrenschmidt struct va_format *vaf) 47184cd4a3SBenjamin Herrenschmidt { 48184cd4a3SBenjamin Herrenschmidt char pfix[32]; 49184cd4a3SBenjamin Herrenschmidt 50184cd4a3SBenjamin Herrenschmidt if (pe->pdev) 51184cd4a3SBenjamin Herrenschmidt strlcpy(pfix, dev_name(&pe->pdev->dev), sizeof(pfix)); 52184cd4a3SBenjamin Herrenschmidt else 53184cd4a3SBenjamin Herrenschmidt sprintf(pfix, "%04x:%02x ", 54184cd4a3SBenjamin Herrenschmidt pci_domain_nr(pe->pbus), pe->pbus->number); 55184cd4a3SBenjamin Herrenschmidt return printk("pci %s%s: [PE# %.3d] %pV", level, pfix, pe->pe_number, vaf); 56184cd4a3SBenjamin Herrenschmidt } 57184cd4a3SBenjamin Herrenschmidt 58184cd4a3SBenjamin Herrenschmidt #define define_pe_printk_level(func, kern_level) \ 59184cd4a3SBenjamin Herrenschmidt static int func(const struct pnv_ioda_pe *pe, const char *fmt, ...) \ 60184cd4a3SBenjamin Herrenschmidt { \ 61184cd4a3SBenjamin Herrenschmidt struct va_format vaf; \ 62184cd4a3SBenjamin Herrenschmidt va_list args; \ 63184cd4a3SBenjamin Herrenschmidt int r; \ 64184cd4a3SBenjamin Herrenschmidt \ 65184cd4a3SBenjamin Herrenschmidt va_start(args, fmt); \ 66184cd4a3SBenjamin Herrenschmidt \ 67184cd4a3SBenjamin Herrenschmidt vaf.fmt = fmt; \ 68184cd4a3SBenjamin Herrenschmidt vaf.va = &args; \ 69184cd4a3SBenjamin Herrenschmidt \ 70184cd4a3SBenjamin Herrenschmidt r = __pe_printk(kern_level, pe, &vaf); \ 71184cd4a3SBenjamin Herrenschmidt va_end(args); \ 72184cd4a3SBenjamin Herrenschmidt \ 73184cd4a3SBenjamin Herrenschmidt return r; \ 74184cd4a3SBenjamin Herrenschmidt } \ 75184cd4a3SBenjamin Herrenschmidt 76184cd4a3SBenjamin Herrenschmidt define_pe_printk_level(pe_err, KERN_ERR); 77184cd4a3SBenjamin Herrenschmidt define_pe_printk_level(pe_warn, KERN_WARNING); 78184cd4a3SBenjamin Herrenschmidt define_pe_printk_level(pe_info, KERN_INFO); 79184cd4a3SBenjamin Herrenschmidt 80184cd4a3SBenjamin Herrenschmidt 81184cd4a3SBenjamin Herrenschmidt /* Calculate resource usage & alignment requirement of a single 82184cd4a3SBenjamin Herrenschmidt * device. This will also assign all resources within the device 83184cd4a3SBenjamin Herrenschmidt * for a given type starting at 0 for the biggest one and then 84184cd4a3SBenjamin Herrenschmidt * assigning in decreasing order of size. 85184cd4a3SBenjamin Herrenschmidt */ 86184cd4a3SBenjamin Herrenschmidt static void __devinit pnv_ioda_calc_dev(struct pci_dev *dev, unsigned int flags, 87184cd4a3SBenjamin Herrenschmidt resource_size_t *size, 88184cd4a3SBenjamin Herrenschmidt resource_size_t *align) 89184cd4a3SBenjamin Herrenschmidt { 90184cd4a3SBenjamin Herrenschmidt resource_size_t start; 91184cd4a3SBenjamin Herrenschmidt struct resource *r; 92184cd4a3SBenjamin Herrenschmidt int i; 93184cd4a3SBenjamin Herrenschmidt 94184cd4a3SBenjamin Herrenschmidt pr_devel(" -> CDR %s\n", pci_name(dev)); 95184cd4a3SBenjamin Herrenschmidt 96184cd4a3SBenjamin Herrenschmidt *size = *align = 0; 97184cd4a3SBenjamin Herrenschmidt 98184cd4a3SBenjamin Herrenschmidt /* Clear the resources out and mark them all unset */ 99184cd4a3SBenjamin Herrenschmidt for (i = 0; i <= PCI_ROM_RESOURCE; i++) { 100184cd4a3SBenjamin Herrenschmidt r = &dev->resource[i]; 101184cd4a3SBenjamin Herrenschmidt if (!(r->flags & flags)) 102184cd4a3SBenjamin Herrenschmidt continue; 103184cd4a3SBenjamin Herrenschmidt if (r->start) { 104184cd4a3SBenjamin Herrenschmidt r->end -= r->start; 105184cd4a3SBenjamin Herrenschmidt r->start = 0; 106184cd4a3SBenjamin Herrenschmidt } 107184cd4a3SBenjamin Herrenschmidt r->flags |= IORESOURCE_UNSET; 108184cd4a3SBenjamin Herrenschmidt } 109184cd4a3SBenjamin Herrenschmidt 110184cd4a3SBenjamin Herrenschmidt /* We currently keep all memory resources together, we 111184cd4a3SBenjamin Herrenschmidt * will handle prefetch & 64-bit separately in the future 112184cd4a3SBenjamin Herrenschmidt * but for now we stick everybody in M32 113184cd4a3SBenjamin Herrenschmidt */ 114184cd4a3SBenjamin Herrenschmidt start = 0; 115184cd4a3SBenjamin Herrenschmidt for (;;) { 116184cd4a3SBenjamin Herrenschmidt resource_size_t max_size = 0; 117184cd4a3SBenjamin Herrenschmidt int max_no = -1; 118184cd4a3SBenjamin Herrenschmidt 119184cd4a3SBenjamin Herrenschmidt /* Find next biggest resource */ 120184cd4a3SBenjamin Herrenschmidt for (i = 0; i <= PCI_ROM_RESOURCE; i++) { 121184cd4a3SBenjamin Herrenschmidt r = &dev->resource[i]; 122184cd4a3SBenjamin Herrenschmidt if (!(r->flags & IORESOURCE_UNSET) || 123184cd4a3SBenjamin Herrenschmidt !(r->flags & flags)) 124184cd4a3SBenjamin Herrenschmidt continue; 125184cd4a3SBenjamin Herrenschmidt if (resource_size(r) > max_size) { 126184cd4a3SBenjamin Herrenschmidt max_size = resource_size(r); 127184cd4a3SBenjamin Herrenschmidt max_no = i; 128184cd4a3SBenjamin Herrenschmidt } 129184cd4a3SBenjamin Herrenschmidt } 130184cd4a3SBenjamin Herrenschmidt if (max_no < 0) 131184cd4a3SBenjamin Herrenschmidt break; 132184cd4a3SBenjamin Herrenschmidt r = &dev->resource[max_no]; 133184cd4a3SBenjamin Herrenschmidt if (max_size > *align) 134184cd4a3SBenjamin Herrenschmidt *align = max_size; 135184cd4a3SBenjamin Herrenschmidt *size += max_size; 136184cd4a3SBenjamin Herrenschmidt r->start = start; 137184cd4a3SBenjamin Herrenschmidt start += max_size; 138184cd4a3SBenjamin Herrenschmidt r->end = r->start + max_size - 1; 139184cd4a3SBenjamin Herrenschmidt r->flags &= ~IORESOURCE_UNSET; 140184cd4a3SBenjamin Herrenschmidt pr_devel(" -> R%d %016llx..%016llx\n", 141184cd4a3SBenjamin Herrenschmidt max_no, r->start, r->end); 142184cd4a3SBenjamin Herrenschmidt } 143184cd4a3SBenjamin Herrenschmidt pr_devel(" <- CDR %s size=%llx align=%llx\n", 144184cd4a3SBenjamin Herrenschmidt pci_name(dev), *size, *align); 145184cd4a3SBenjamin Herrenschmidt } 146184cd4a3SBenjamin Herrenschmidt 147184cd4a3SBenjamin Herrenschmidt /* Allocate a resource "wrap" for a given device or bridge and 148184cd4a3SBenjamin Herrenschmidt * insert it at the right position in the sorted list 149184cd4a3SBenjamin Herrenschmidt */ 150184cd4a3SBenjamin Herrenschmidt static void __devinit pnv_ioda_add_wrap(struct list_head *list, 151184cd4a3SBenjamin Herrenschmidt struct pci_bus *bus, 152184cd4a3SBenjamin Herrenschmidt struct pci_dev *dev, 153184cd4a3SBenjamin Herrenschmidt resource_size_t size, 154184cd4a3SBenjamin Herrenschmidt resource_size_t align) 155184cd4a3SBenjamin Herrenschmidt { 156184cd4a3SBenjamin Herrenschmidt struct resource_wrap *w1, *w = kzalloc(sizeof(*w), GFP_KERNEL); 157184cd4a3SBenjamin Herrenschmidt 158184cd4a3SBenjamin Herrenschmidt w->size = size; 159184cd4a3SBenjamin Herrenschmidt w->align = align; 160184cd4a3SBenjamin Herrenschmidt w->dev = dev; 161184cd4a3SBenjamin Herrenschmidt w->bus = bus; 162184cd4a3SBenjamin Herrenschmidt 163184cd4a3SBenjamin Herrenschmidt list_for_each_entry(w1, list, link) { 164184cd4a3SBenjamin Herrenschmidt if (w1->align < align) { 165184cd4a3SBenjamin Herrenschmidt list_add_tail(&w->link, &w1->link); 166184cd4a3SBenjamin Herrenschmidt return; 167184cd4a3SBenjamin Herrenschmidt } 168184cd4a3SBenjamin Herrenschmidt } 169184cd4a3SBenjamin Herrenschmidt list_add_tail(&w->link, list); 170184cd4a3SBenjamin Herrenschmidt } 171184cd4a3SBenjamin Herrenschmidt 172184cd4a3SBenjamin Herrenschmidt /* Offset device resources of a given type */ 173184cd4a3SBenjamin Herrenschmidt static void __devinit pnv_ioda_offset_dev(struct pci_dev *dev, 174184cd4a3SBenjamin Herrenschmidt unsigned int flags, 175184cd4a3SBenjamin Herrenschmidt resource_size_t offset) 176184cd4a3SBenjamin Herrenschmidt { 177184cd4a3SBenjamin Herrenschmidt struct resource *r; 178184cd4a3SBenjamin Herrenschmidt int i; 179184cd4a3SBenjamin Herrenschmidt 180184cd4a3SBenjamin Herrenschmidt pr_devel(" -> ODR %s [%x] +%016llx\n", pci_name(dev), flags, offset); 181184cd4a3SBenjamin Herrenschmidt 182184cd4a3SBenjamin Herrenschmidt for (i = 0; i <= PCI_ROM_RESOURCE; i++) { 183184cd4a3SBenjamin Herrenschmidt r = &dev->resource[i]; 184184cd4a3SBenjamin Herrenschmidt if (r->flags & flags) { 185184cd4a3SBenjamin Herrenschmidt dev->resource[i].start += offset; 186184cd4a3SBenjamin Herrenschmidt dev->resource[i].end += offset; 187184cd4a3SBenjamin Herrenschmidt } 188184cd4a3SBenjamin Herrenschmidt } 189184cd4a3SBenjamin Herrenschmidt 190184cd4a3SBenjamin Herrenschmidt pr_devel(" <- ODR %s [%x] +%016llx\n", pci_name(dev), flags, offset); 191184cd4a3SBenjamin Herrenschmidt } 192184cd4a3SBenjamin Herrenschmidt 193184cd4a3SBenjamin Herrenschmidt /* Offset bus resources (& all children) of a given type */ 194184cd4a3SBenjamin Herrenschmidt static void __devinit pnv_ioda_offset_bus(struct pci_bus *bus, 195184cd4a3SBenjamin Herrenschmidt unsigned int flags, 196184cd4a3SBenjamin Herrenschmidt resource_size_t offset) 197184cd4a3SBenjamin Herrenschmidt { 198184cd4a3SBenjamin Herrenschmidt struct resource *r; 199184cd4a3SBenjamin Herrenschmidt struct pci_dev *dev; 200184cd4a3SBenjamin Herrenschmidt struct pci_bus *cbus; 201184cd4a3SBenjamin Herrenschmidt int i; 202184cd4a3SBenjamin Herrenschmidt 203184cd4a3SBenjamin Herrenschmidt pr_devel(" -> OBR %s [%x] +%016llx\n", 204184cd4a3SBenjamin Herrenschmidt bus->self ? pci_name(bus->self) : "root", flags, offset); 205184cd4a3SBenjamin Herrenschmidt 206f7ea82beSBenjamin Herrenschmidt pci_bus_for_each_resource(bus, r, i) { 207184cd4a3SBenjamin Herrenschmidt if (r && (r->flags & flags)) { 208f7ea82beSBenjamin Herrenschmidt r->start += offset; 209f7ea82beSBenjamin Herrenschmidt r->end += offset; 210184cd4a3SBenjamin Herrenschmidt } 211184cd4a3SBenjamin Herrenschmidt } 212184cd4a3SBenjamin Herrenschmidt list_for_each_entry(dev, &bus->devices, bus_list) 213184cd4a3SBenjamin Herrenschmidt pnv_ioda_offset_dev(dev, flags, offset); 214184cd4a3SBenjamin Herrenschmidt list_for_each_entry(cbus, &bus->children, node) 215184cd4a3SBenjamin Herrenschmidt pnv_ioda_offset_bus(cbus, flags, offset); 216184cd4a3SBenjamin Herrenschmidt 217184cd4a3SBenjamin Herrenschmidt pr_devel(" <- OBR %s [%x]\n", 218184cd4a3SBenjamin Herrenschmidt bus->self ? pci_name(bus->self) : "root", flags); 219184cd4a3SBenjamin Herrenschmidt } 220184cd4a3SBenjamin Herrenschmidt 221184cd4a3SBenjamin Herrenschmidt /* This is the guts of our IODA resource allocation. This is called 222184cd4a3SBenjamin Herrenschmidt * recursively for each bus in the system. It calculates all the 223184cd4a3SBenjamin Herrenschmidt * necessary size and requirements for children and assign them 224184cd4a3SBenjamin Herrenschmidt * resources such that: 225184cd4a3SBenjamin Herrenschmidt * 226184cd4a3SBenjamin Herrenschmidt * - Each function fits in it's own contiguous set of IO/M32 227184cd4a3SBenjamin Herrenschmidt * segment 228184cd4a3SBenjamin Herrenschmidt * 229184cd4a3SBenjamin Herrenschmidt * - All segments behind a P2P bridge are contiguous and obey 230184cd4a3SBenjamin Herrenschmidt * alignment constraints of those bridges 231184cd4a3SBenjamin Herrenschmidt */ 232184cd4a3SBenjamin Herrenschmidt static void __devinit pnv_ioda_calc_bus(struct pci_bus *bus, unsigned int flags, 233184cd4a3SBenjamin Herrenschmidt resource_size_t *size, 234184cd4a3SBenjamin Herrenschmidt resource_size_t *align) 235184cd4a3SBenjamin Herrenschmidt { 236184cd4a3SBenjamin Herrenschmidt struct pci_controller *hose = pci_bus_to_host(bus); 237184cd4a3SBenjamin Herrenschmidt struct pnv_phb *phb = hose->private_data; 238184cd4a3SBenjamin Herrenschmidt resource_size_t dev_size, dev_align, start; 239184cd4a3SBenjamin Herrenschmidt resource_size_t min_align, min_balign; 240184cd4a3SBenjamin Herrenschmidt struct pci_dev *cdev; 241184cd4a3SBenjamin Herrenschmidt struct pci_bus *cbus; 242184cd4a3SBenjamin Herrenschmidt struct list_head head; 243184cd4a3SBenjamin Herrenschmidt struct resource_wrap *w; 244184cd4a3SBenjamin Herrenschmidt unsigned int bres; 245184cd4a3SBenjamin Herrenschmidt 246184cd4a3SBenjamin Herrenschmidt *size = *align = 0; 247184cd4a3SBenjamin Herrenschmidt 248184cd4a3SBenjamin Herrenschmidt pr_devel("-> CBR %s [%x]\n", 249184cd4a3SBenjamin Herrenschmidt bus->self ? pci_name(bus->self) : "root", flags); 250184cd4a3SBenjamin Herrenschmidt 251184cd4a3SBenjamin Herrenschmidt /* Calculate alignment requirements based on the type 252184cd4a3SBenjamin Herrenschmidt * of resource we are working on 253184cd4a3SBenjamin Herrenschmidt */ 254184cd4a3SBenjamin Herrenschmidt if (flags & IORESOURCE_IO) { 255184cd4a3SBenjamin Herrenschmidt bres = 0; 256184cd4a3SBenjamin Herrenschmidt min_align = phb->ioda.io_segsize; 257184cd4a3SBenjamin Herrenschmidt min_balign = 0x1000; 258184cd4a3SBenjamin Herrenschmidt } else { 259184cd4a3SBenjamin Herrenschmidt bres = 1; 260184cd4a3SBenjamin Herrenschmidt min_align = phb->ioda.m32_segsize; 261184cd4a3SBenjamin Herrenschmidt min_balign = 0x100000; 262184cd4a3SBenjamin Herrenschmidt } 263184cd4a3SBenjamin Herrenschmidt 264184cd4a3SBenjamin Herrenschmidt /* Gather all our children resources ordered by alignment */ 265184cd4a3SBenjamin Herrenschmidt INIT_LIST_HEAD(&head); 266184cd4a3SBenjamin Herrenschmidt 267184cd4a3SBenjamin Herrenschmidt /* - Busses */ 268184cd4a3SBenjamin Herrenschmidt list_for_each_entry(cbus, &bus->children, node) { 269184cd4a3SBenjamin Herrenschmidt pnv_ioda_calc_bus(cbus, flags, &dev_size, &dev_align); 270184cd4a3SBenjamin Herrenschmidt pnv_ioda_add_wrap(&head, cbus, NULL, dev_size, dev_align); 271184cd4a3SBenjamin Herrenschmidt } 272184cd4a3SBenjamin Herrenschmidt 273184cd4a3SBenjamin Herrenschmidt /* - Devices */ 274184cd4a3SBenjamin Herrenschmidt list_for_each_entry(cdev, &bus->devices, bus_list) { 275184cd4a3SBenjamin Herrenschmidt pnv_ioda_calc_dev(cdev, flags, &dev_size, &dev_align); 276184cd4a3SBenjamin Herrenschmidt /* Align them to segment size */ 277184cd4a3SBenjamin Herrenschmidt if (dev_align < min_align) 278184cd4a3SBenjamin Herrenschmidt dev_align = min_align; 279184cd4a3SBenjamin Herrenschmidt pnv_ioda_add_wrap(&head, NULL, cdev, dev_size, dev_align); 280184cd4a3SBenjamin Herrenschmidt } 281184cd4a3SBenjamin Herrenschmidt if (list_empty(&head)) 282184cd4a3SBenjamin Herrenschmidt goto empty; 283184cd4a3SBenjamin Herrenschmidt 284184cd4a3SBenjamin Herrenschmidt /* Now we can do two things: assign offsets to them within that 285184cd4a3SBenjamin Herrenschmidt * level and get our total alignment & size requirements. The 286184cd4a3SBenjamin Herrenschmidt * assignment algorithm is going to be uber-trivial for now, we 287184cd4a3SBenjamin Herrenschmidt * can try to be smarter later at filling out holes. 288184cd4a3SBenjamin Herrenschmidt */ 289f7ea82beSBenjamin Herrenschmidt if (bus->self) { 290f7ea82beSBenjamin Herrenschmidt /* No offset for downstream bridges */ 291f7ea82beSBenjamin Herrenschmidt start = 0; 292f7ea82beSBenjamin Herrenschmidt } else { 293f7ea82beSBenjamin Herrenschmidt /* Offset from the root */ 294f7ea82beSBenjamin Herrenschmidt if (flags & IORESOURCE_IO) 295184cd4a3SBenjamin Herrenschmidt /* Don't hand out IO 0 */ 296f7ea82beSBenjamin Herrenschmidt start = hose->io_resource.start + 0x1000; 297f7ea82beSBenjamin Herrenschmidt else 298f7ea82beSBenjamin Herrenschmidt start = hose->mem_resources[0].start; 299f7ea82beSBenjamin Herrenschmidt } 300184cd4a3SBenjamin Herrenschmidt while(!list_empty(&head)) { 301184cd4a3SBenjamin Herrenschmidt w = list_first_entry(&head, struct resource_wrap, link); 302184cd4a3SBenjamin Herrenschmidt list_del(&w->link); 303184cd4a3SBenjamin Herrenschmidt if (w->size) { 304184cd4a3SBenjamin Herrenschmidt if (start) { 305184cd4a3SBenjamin Herrenschmidt start = ALIGN(start, w->align); 306184cd4a3SBenjamin Herrenschmidt if (w->dev) 307184cd4a3SBenjamin Herrenschmidt pnv_ioda_offset_dev(w->dev,flags,start); 308184cd4a3SBenjamin Herrenschmidt else if (w->bus) 309184cd4a3SBenjamin Herrenschmidt pnv_ioda_offset_bus(w->bus,flags,start); 310184cd4a3SBenjamin Herrenschmidt } 311184cd4a3SBenjamin Herrenschmidt if (w->align > *align) 312184cd4a3SBenjamin Herrenschmidt *align = w->align; 313184cd4a3SBenjamin Herrenschmidt } 314184cd4a3SBenjamin Herrenschmidt start += w->size; 315184cd4a3SBenjamin Herrenschmidt kfree(w); 316184cd4a3SBenjamin Herrenschmidt } 317184cd4a3SBenjamin Herrenschmidt *size = start; 318184cd4a3SBenjamin Herrenschmidt 319184cd4a3SBenjamin Herrenschmidt /* Align and setup bridge resources */ 320184cd4a3SBenjamin Herrenschmidt *align = max_t(resource_size_t, *align, 321184cd4a3SBenjamin Herrenschmidt max_t(resource_size_t, min_align, min_balign)); 322184cd4a3SBenjamin Herrenschmidt *size = ALIGN(*size, 323184cd4a3SBenjamin Herrenschmidt max_t(resource_size_t, min_align, min_balign)); 324184cd4a3SBenjamin Herrenschmidt empty: 325184cd4a3SBenjamin Herrenschmidt /* Only setup P2P's, not the PHB itself */ 326184cd4a3SBenjamin Herrenschmidt if (bus->self) { 327f7ea82beSBenjamin Herrenschmidt struct resource *res = bus->resource[bres]; 328184cd4a3SBenjamin Herrenschmidt 329f7ea82beSBenjamin Herrenschmidt if (WARN_ON(res == NULL)) 330f7ea82beSBenjamin Herrenschmidt return; 331f7ea82beSBenjamin Herrenschmidt 332f7ea82beSBenjamin Herrenschmidt /* 333f7ea82beSBenjamin Herrenschmidt * FIXME: We should probably export and call 334f7ea82beSBenjamin Herrenschmidt * pci_bridge_check_ranges() to properly re-initialize 335f7ea82beSBenjamin Herrenschmidt * the PCI portion of the flags here, and to detect 336f7ea82beSBenjamin Herrenschmidt * what the bridge actually supports. 337f7ea82beSBenjamin Herrenschmidt */ 338f7ea82beSBenjamin Herrenschmidt res->start = 0; 339f7ea82beSBenjamin Herrenschmidt res->flags = (*size) ? flags : 0; 340f7ea82beSBenjamin Herrenschmidt res->end = (*size) ? (*size - 1) : 0; 341184cd4a3SBenjamin Herrenschmidt } 342184cd4a3SBenjamin Herrenschmidt 343184cd4a3SBenjamin Herrenschmidt pr_devel("<- CBR %s [%x] *size=%016llx *align=%016llx\n", 344184cd4a3SBenjamin Herrenschmidt bus->self ? pci_name(bus->self) : "root", flags,*size,*align); 345184cd4a3SBenjamin Herrenschmidt } 346184cd4a3SBenjamin Herrenschmidt 347184cd4a3SBenjamin Herrenschmidt static struct pci_dn *pnv_ioda_get_pdn(struct pci_dev *dev) 348184cd4a3SBenjamin Herrenschmidt { 349184cd4a3SBenjamin Herrenschmidt struct device_node *np; 350184cd4a3SBenjamin Herrenschmidt 351184cd4a3SBenjamin Herrenschmidt np = pci_device_to_OF_node(dev); 352184cd4a3SBenjamin Herrenschmidt if (!np) 353184cd4a3SBenjamin Herrenschmidt return NULL; 354184cd4a3SBenjamin Herrenschmidt return PCI_DN(np); 355184cd4a3SBenjamin Herrenschmidt } 356184cd4a3SBenjamin Herrenschmidt 357184cd4a3SBenjamin Herrenschmidt static void __devinit pnv_ioda_setup_pe_segments(struct pci_dev *dev) 358184cd4a3SBenjamin Herrenschmidt { 359184cd4a3SBenjamin Herrenschmidt struct pci_controller *hose = pci_bus_to_host(dev->bus); 360184cd4a3SBenjamin Herrenschmidt struct pnv_phb *phb = hose->private_data; 361184cd4a3SBenjamin Herrenschmidt struct pci_dn *pdn = pnv_ioda_get_pdn(dev); 362184cd4a3SBenjamin Herrenschmidt unsigned int pe, i; 363184cd4a3SBenjamin Herrenschmidt resource_size_t pos; 364184cd4a3SBenjamin Herrenschmidt struct resource io_res; 365184cd4a3SBenjamin Herrenschmidt struct resource m32_res; 366184cd4a3SBenjamin Herrenschmidt struct pci_bus_region region; 367184cd4a3SBenjamin Herrenschmidt int rc; 368184cd4a3SBenjamin Herrenschmidt 369184cd4a3SBenjamin Herrenschmidt /* Anything not referenced in the device-tree gets PE#0 */ 370184cd4a3SBenjamin Herrenschmidt pe = pdn ? pdn->pe_number : 0; 371184cd4a3SBenjamin Herrenschmidt 372184cd4a3SBenjamin Herrenschmidt /* Calculate the device min/max */ 373184cd4a3SBenjamin Herrenschmidt io_res.start = m32_res.start = (resource_size_t)-1; 374184cd4a3SBenjamin Herrenschmidt io_res.end = m32_res.end = 0; 375184cd4a3SBenjamin Herrenschmidt io_res.flags = IORESOURCE_IO; 376184cd4a3SBenjamin Herrenschmidt m32_res.flags = IORESOURCE_MEM; 377184cd4a3SBenjamin Herrenschmidt 378184cd4a3SBenjamin Herrenschmidt for (i = 0; i <= PCI_ROM_RESOURCE; i++) { 379184cd4a3SBenjamin Herrenschmidt struct resource *r = NULL; 380184cd4a3SBenjamin Herrenschmidt if (dev->resource[i].flags & IORESOURCE_IO) 381184cd4a3SBenjamin Herrenschmidt r = &io_res; 382184cd4a3SBenjamin Herrenschmidt if (dev->resource[i].flags & IORESOURCE_MEM) 383184cd4a3SBenjamin Herrenschmidt r = &m32_res; 384184cd4a3SBenjamin Herrenschmidt if (!r) 385184cd4a3SBenjamin Herrenschmidt continue; 386184cd4a3SBenjamin Herrenschmidt if (dev->resource[i].start < r->start) 387184cd4a3SBenjamin Herrenschmidt r->start = dev->resource[i].start; 388184cd4a3SBenjamin Herrenschmidt if (dev->resource[i].end > r->end) 389184cd4a3SBenjamin Herrenschmidt r->end = dev->resource[i].end; 390184cd4a3SBenjamin Herrenschmidt } 391184cd4a3SBenjamin Herrenschmidt 392184cd4a3SBenjamin Herrenschmidt /* Setup IO segments */ 393184cd4a3SBenjamin Herrenschmidt if (io_res.start < io_res.end) { 394184cd4a3SBenjamin Herrenschmidt pcibios_resource_to_bus(dev, ®ion, &io_res); 395184cd4a3SBenjamin Herrenschmidt pos = region.start; 396184cd4a3SBenjamin Herrenschmidt i = pos / phb->ioda.io_segsize; 397184cd4a3SBenjamin Herrenschmidt while(i < phb->ioda.total_pe && pos <= region.end) { 398184cd4a3SBenjamin Herrenschmidt if (phb->ioda.io_segmap[i]) { 399184cd4a3SBenjamin Herrenschmidt pr_err("%s: Trying to use IO seg #%d which is" 400184cd4a3SBenjamin Herrenschmidt " already used by PE# %d\n", 401184cd4a3SBenjamin Herrenschmidt pci_name(dev), i, 402184cd4a3SBenjamin Herrenschmidt phb->ioda.io_segmap[i]); 403184cd4a3SBenjamin Herrenschmidt /* XXX DO SOMETHING TO DISABLE DEVICE ? */ 404184cd4a3SBenjamin Herrenschmidt break; 405184cd4a3SBenjamin Herrenschmidt } 406184cd4a3SBenjamin Herrenschmidt phb->ioda.io_segmap[i] = pe; 407184cd4a3SBenjamin Herrenschmidt rc = opal_pci_map_pe_mmio_window(phb->opal_id, pe, 408184cd4a3SBenjamin Herrenschmidt OPAL_IO_WINDOW_TYPE, 409184cd4a3SBenjamin Herrenschmidt 0, i); 410184cd4a3SBenjamin Herrenschmidt if (rc != OPAL_SUCCESS) { 411184cd4a3SBenjamin Herrenschmidt pr_err("%s: OPAL error %d setting up mapping" 412184cd4a3SBenjamin Herrenschmidt " for IO seg# %d\n", 413184cd4a3SBenjamin Herrenschmidt pci_name(dev), rc, i); 414184cd4a3SBenjamin Herrenschmidt /* XXX DO SOMETHING TO DISABLE DEVICE ? */ 415184cd4a3SBenjamin Herrenschmidt break; 416184cd4a3SBenjamin Herrenschmidt } 417184cd4a3SBenjamin Herrenschmidt pos += phb->ioda.io_segsize; 418184cd4a3SBenjamin Herrenschmidt i++; 419184cd4a3SBenjamin Herrenschmidt }; 420184cd4a3SBenjamin Herrenschmidt } 421184cd4a3SBenjamin Herrenschmidt 422184cd4a3SBenjamin Herrenschmidt /* Setup M32 segments */ 423184cd4a3SBenjamin Herrenschmidt if (m32_res.start < m32_res.end) { 424184cd4a3SBenjamin Herrenschmidt pcibios_resource_to_bus(dev, ®ion, &m32_res); 425184cd4a3SBenjamin Herrenschmidt pos = region.start; 426184cd4a3SBenjamin Herrenschmidt i = pos / phb->ioda.m32_segsize; 427184cd4a3SBenjamin Herrenschmidt while(i < phb->ioda.total_pe && pos <= region.end) { 428184cd4a3SBenjamin Herrenschmidt if (phb->ioda.m32_segmap[i]) { 429184cd4a3SBenjamin Herrenschmidt pr_err("%s: Trying to use M32 seg #%d which is" 430184cd4a3SBenjamin Herrenschmidt " already used by PE# %d\n", 431184cd4a3SBenjamin Herrenschmidt pci_name(dev), i, 432184cd4a3SBenjamin Herrenschmidt phb->ioda.m32_segmap[i]); 433184cd4a3SBenjamin Herrenschmidt /* XXX DO SOMETHING TO DISABLE DEVICE ? */ 434184cd4a3SBenjamin Herrenschmidt break; 435184cd4a3SBenjamin Herrenschmidt } 436184cd4a3SBenjamin Herrenschmidt phb->ioda.m32_segmap[i] = pe; 437184cd4a3SBenjamin Herrenschmidt rc = opal_pci_map_pe_mmio_window(phb->opal_id, pe, 438184cd4a3SBenjamin Herrenschmidt OPAL_M32_WINDOW_TYPE, 439184cd4a3SBenjamin Herrenschmidt 0, i); 440184cd4a3SBenjamin Herrenschmidt if (rc != OPAL_SUCCESS) { 441184cd4a3SBenjamin Herrenschmidt pr_err("%s: OPAL error %d setting up mapping" 442184cd4a3SBenjamin Herrenschmidt " for M32 seg# %d\n", 443184cd4a3SBenjamin Herrenschmidt pci_name(dev), rc, i); 444184cd4a3SBenjamin Herrenschmidt /* XXX DO SOMETHING TO DISABLE DEVICE ? */ 445184cd4a3SBenjamin Herrenschmidt break; 446184cd4a3SBenjamin Herrenschmidt } 447184cd4a3SBenjamin Herrenschmidt pos += phb->ioda.m32_segsize; 448184cd4a3SBenjamin Herrenschmidt i++; 449184cd4a3SBenjamin Herrenschmidt } 450184cd4a3SBenjamin Herrenschmidt } 451184cd4a3SBenjamin Herrenschmidt } 452184cd4a3SBenjamin Herrenschmidt 453184cd4a3SBenjamin Herrenschmidt /* Check if a resource still fits in the total IO or M32 range 454184cd4a3SBenjamin Herrenschmidt * for a given PHB 455184cd4a3SBenjamin Herrenschmidt */ 456184cd4a3SBenjamin Herrenschmidt static int __devinit pnv_ioda_resource_fit(struct pci_controller *hose, 457184cd4a3SBenjamin Herrenschmidt struct resource *r) 458184cd4a3SBenjamin Herrenschmidt { 459184cd4a3SBenjamin Herrenschmidt struct resource *bounds; 460184cd4a3SBenjamin Herrenschmidt 461184cd4a3SBenjamin Herrenschmidt if (r->flags & IORESOURCE_IO) 462184cd4a3SBenjamin Herrenschmidt bounds = &hose->io_resource; 463184cd4a3SBenjamin Herrenschmidt else if (r->flags & IORESOURCE_MEM) 464184cd4a3SBenjamin Herrenschmidt bounds = &hose->mem_resources[0]; 465184cd4a3SBenjamin Herrenschmidt else 466184cd4a3SBenjamin Herrenschmidt return 1; 467184cd4a3SBenjamin Herrenschmidt 468184cd4a3SBenjamin Herrenschmidt if (r->start >= bounds->start && r->end <= bounds->end) 469184cd4a3SBenjamin Herrenschmidt return 1; 470184cd4a3SBenjamin Herrenschmidt r->flags = 0; 471184cd4a3SBenjamin Herrenschmidt return 0; 472184cd4a3SBenjamin Herrenschmidt } 473184cd4a3SBenjamin Herrenschmidt 474184cd4a3SBenjamin Herrenschmidt static void __devinit pnv_ioda_update_resources(struct pci_bus *bus) 475184cd4a3SBenjamin Herrenschmidt { 476184cd4a3SBenjamin Herrenschmidt struct pci_controller *hose = pci_bus_to_host(bus); 477184cd4a3SBenjamin Herrenschmidt struct pci_bus *cbus; 478184cd4a3SBenjamin Herrenschmidt struct pci_dev *cdev; 479184cd4a3SBenjamin Herrenschmidt unsigned int i; 480184cd4a3SBenjamin Herrenschmidt 481cee72d5bSBenjamin Herrenschmidt /* We used to clear all device enables here. However it looks like 482cee72d5bSBenjamin Herrenschmidt * clearing MEM enable causes Obsidian (IPR SCS) to go bonkers, 483cee72d5bSBenjamin Herrenschmidt * and shoot fatal errors to the PHB which in turns fences itself 484cee72d5bSBenjamin Herrenschmidt * and we can't recover from that ... yet. So for now, let's leave 485cee72d5bSBenjamin Herrenschmidt * the enables as-is and hope for the best. 486cee72d5bSBenjamin Herrenschmidt */ 487184cd4a3SBenjamin Herrenschmidt 488184cd4a3SBenjamin Herrenschmidt /* Check if bus resources fit in our IO or M32 range */ 489184cd4a3SBenjamin Herrenschmidt for (i = 0; bus->self && (i < 2); i++) { 490184cd4a3SBenjamin Herrenschmidt struct resource *r = bus->resource[i]; 491184cd4a3SBenjamin Herrenschmidt if (r && !pnv_ioda_resource_fit(hose, r)) 492184cd4a3SBenjamin Herrenschmidt pr_err("%s: Bus %d resource %d disabled, no room\n", 493184cd4a3SBenjamin Herrenschmidt pci_name(bus->self), bus->number, i); 494184cd4a3SBenjamin Herrenschmidt } 495184cd4a3SBenjamin Herrenschmidt 496184cd4a3SBenjamin Herrenschmidt /* Update self if it's not a PHB */ 497184cd4a3SBenjamin Herrenschmidt if (bus->self) 498184cd4a3SBenjamin Herrenschmidt pci_setup_bridge(bus); 499184cd4a3SBenjamin Herrenschmidt 500184cd4a3SBenjamin Herrenschmidt /* Update child devices */ 501184cd4a3SBenjamin Herrenschmidt list_for_each_entry(cdev, &bus->devices, bus_list) { 502184cd4a3SBenjamin Herrenschmidt /* Check if resource fits, if not, disabled it */ 503184cd4a3SBenjamin Herrenschmidt for (i = 0; i <= PCI_ROM_RESOURCE; i++) { 504184cd4a3SBenjamin Herrenschmidt struct resource *r = &cdev->resource[i]; 505184cd4a3SBenjamin Herrenschmidt if (!pnv_ioda_resource_fit(hose, r)) 506184cd4a3SBenjamin Herrenschmidt pr_err("%s: Resource %d disabled, no room\n", 507184cd4a3SBenjamin Herrenschmidt pci_name(cdev), i); 508184cd4a3SBenjamin Herrenschmidt } 509184cd4a3SBenjamin Herrenschmidt 510184cd4a3SBenjamin Herrenschmidt /* Assign segments */ 511184cd4a3SBenjamin Herrenschmidt pnv_ioda_setup_pe_segments(cdev); 512184cd4a3SBenjamin Herrenschmidt 513184cd4a3SBenjamin Herrenschmidt /* Update HW BARs */ 514184cd4a3SBenjamin Herrenschmidt for (i = 0; i <= PCI_ROM_RESOURCE; i++) 515184cd4a3SBenjamin Herrenschmidt pci_update_resource(cdev, i); 516184cd4a3SBenjamin Herrenschmidt } 517184cd4a3SBenjamin Herrenschmidt 518184cd4a3SBenjamin Herrenschmidt /* Update child busses */ 519184cd4a3SBenjamin Herrenschmidt list_for_each_entry(cbus, &bus->children, node) 520184cd4a3SBenjamin Herrenschmidt pnv_ioda_update_resources(cbus); 521184cd4a3SBenjamin Herrenschmidt } 522184cd4a3SBenjamin Herrenschmidt 523184cd4a3SBenjamin Herrenschmidt static int __devinit pnv_ioda_alloc_pe(struct pnv_phb *phb) 524184cd4a3SBenjamin Herrenschmidt { 525184cd4a3SBenjamin Herrenschmidt unsigned long pe; 526184cd4a3SBenjamin Herrenschmidt 527184cd4a3SBenjamin Herrenschmidt do { 528184cd4a3SBenjamin Herrenschmidt pe = find_next_zero_bit(phb->ioda.pe_alloc, 529184cd4a3SBenjamin Herrenschmidt phb->ioda.total_pe, 0); 530184cd4a3SBenjamin Herrenschmidt if (pe >= phb->ioda.total_pe) 531184cd4a3SBenjamin Herrenschmidt return IODA_INVALID_PE; 532184cd4a3SBenjamin Herrenschmidt } while(test_and_set_bit(pe, phb->ioda.pe_alloc)); 533184cd4a3SBenjamin Herrenschmidt 534184cd4a3SBenjamin Herrenschmidt phb->ioda.pe_array[pe].pe_number = pe; 535184cd4a3SBenjamin Herrenschmidt return pe; 536184cd4a3SBenjamin Herrenschmidt } 537184cd4a3SBenjamin Herrenschmidt 538184cd4a3SBenjamin Herrenschmidt static void __devinit pnv_ioda_free_pe(struct pnv_phb *phb, int pe) 539184cd4a3SBenjamin Herrenschmidt { 540184cd4a3SBenjamin Herrenschmidt WARN_ON(phb->ioda.pe_array[pe].pdev); 541184cd4a3SBenjamin Herrenschmidt 542184cd4a3SBenjamin Herrenschmidt memset(&phb->ioda.pe_array[pe], 0, sizeof(struct pnv_ioda_pe)); 543184cd4a3SBenjamin Herrenschmidt clear_bit(pe, phb->ioda.pe_alloc); 544184cd4a3SBenjamin Herrenschmidt } 545184cd4a3SBenjamin Herrenschmidt 546184cd4a3SBenjamin Herrenschmidt /* Currently those 2 are only used when MSIs are enabled, this will change 547184cd4a3SBenjamin Herrenschmidt * but in the meantime, we need to protect them to avoid warnings 548184cd4a3SBenjamin Herrenschmidt */ 549184cd4a3SBenjamin Herrenschmidt #ifdef CONFIG_PCI_MSI 550fb446ad0SGavin Shan static struct pnv_ioda_pe * __devinit pnv_ioda_get_pe(struct pci_dev *dev) 551184cd4a3SBenjamin Herrenschmidt { 552184cd4a3SBenjamin Herrenschmidt struct pci_controller *hose = pci_bus_to_host(dev->bus); 553184cd4a3SBenjamin Herrenschmidt struct pnv_phb *phb = hose->private_data; 554184cd4a3SBenjamin Herrenschmidt struct pci_dn *pdn = pnv_ioda_get_pdn(dev); 555184cd4a3SBenjamin Herrenschmidt 556184cd4a3SBenjamin Herrenschmidt if (!pdn) 557184cd4a3SBenjamin Herrenschmidt return NULL; 558184cd4a3SBenjamin Herrenschmidt if (pdn->pe_number == IODA_INVALID_PE) 559184cd4a3SBenjamin Herrenschmidt return NULL; 560184cd4a3SBenjamin Herrenschmidt return &phb->ioda.pe_array[pdn->pe_number]; 561184cd4a3SBenjamin Herrenschmidt } 562184cd4a3SBenjamin Herrenschmidt #endif /* CONFIG_PCI_MSI */ 563184cd4a3SBenjamin Herrenschmidt 564184cd4a3SBenjamin Herrenschmidt static int __devinit pnv_ioda_configure_pe(struct pnv_phb *phb, 565184cd4a3SBenjamin Herrenschmidt struct pnv_ioda_pe *pe) 566184cd4a3SBenjamin Herrenschmidt { 567184cd4a3SBenjamin Herrenschmidt struct pci_dev *parent; 568184cd4a3SBenjamin Herrenschmidt uint8_t bcomp, dcomp, fcomp; 569184cd4a3SBenjamin Herrenschmidt long rc, rid_end, rid; 570184cd4a3SBenjamin Herrenschmidt 571184cd4a3SBenjamin Herrenschmidt /* Bus validation ? */ 572184cd4a3SBenjamin Herrenschmidt if (pe->pbus) { 573184cd4a3SBenjamin Herrenschmidt int count; 574184cd4a3SBenjamin Herrenschmidt 575184cd4a3SBenjamin Herrenschmidt dcomp = OPAL_IGNORE_RID_DEVICE_NUMBER; 576184cd4a3SBenjamin Herrenschmidt fcomp = OPAL_IGNORE_RID_FUNCTION_NUMBER; 577184cd4a3SBenjamin Herrenschmidt parent = pe->pbus->self; 578fb446ad0SGavin Shan if (pe->flags & PNV_IODA_PE_BUS_ALL) 579b918c62eSYinghai Lu count = pe->pbus->busn_res.end - pe->pbus->busn_res.start + 1; 580fb446ad0SGavin Shan else 581fb446ad0SGavin Shan count = 1; 582fb446ad0SGavin Shan 583184cd4a3SBenjamin Herrenschmidt switch(count) { 584184cd4a3SBenjamin Herrenschmidt case 1: bcomp = OpalPciBusAll; break; 585184cd4a3SBenjamin Herrenschmidt case 2: bcomp = OpalPciBus7Bits; break; 586184cd4a3SBenjamin Herrenschmidt case 4: bcomp = OpalPciBus6Bits; break; 587184cd4a3SBenjamin Herrenschmidt case 8: bcomp = OpalPciBus5Bits; break; 588184cd4a3SBenjamin Herrenschmidt case 16: bcomp = OpalPciBus4Bits; break; 589184cd4a3SBenjamin Herrenschmidt case 32: bcomp = OpalPciBus3Bits; break; 590184cd4a3SBenjamin Herrenschmidt default: 591184cd4a3SBenjamin Herrenschmidt pr_err("%s: Number of subordinate busses %d" 592184cd4a3SBenjamin Herrenschmidt " unsupported\n", 593184cd4a3SBenjamin Herrenschmidt pci_name(pe->pbus->self), count); 594184cd4a3SBenjamin Herrenschmidt /* Do an exact match only */ 595184cd4a3SBenjamin Herrenschmidt bcomp = OpalPciBusAll; 596184cd4a3SBenjamin Herrenschmidt } 597184cd4a3SBenjamin Herrenschmidt rid_end = pe->rid + (count << 8); 598184cd4a3SBenjamin Herrenschmidt } else { 599184cd4a3SBenjamin Herrenschmidt parent = pe->pdev->bus->self; 600184cd4a3SBenjamin Herrenschmidt bcomp = OpalPciBusAll; 601184cd4a3SBenjamin Herrenschmidt dcomp = OPAL_COMPARE_RID_DEVICE_NUMBER; 602184cd4a3SBenjamin Herrenschmidt fcomp = OPAL_COMPARE_RID_FUNCTION_NUMBER; 603184cd4a3SBenjamin Herrenschmidt rid_end = pe->rid + 1; 604184cd4a3SBenjamin Herrenschmidt } 605184cd4a3SBenjamin Herrenschmidt 606184cd4a3SBenjamin Herrenschmidt /* Associate PE in PELT */ 607184cd4a3SBenjamin Herrenschmidt rc = opal_pci_set_pe(phb->opal_id, pe->pe_number, pe->rid, 608184cd4a3SBenjamin Herrenschmidt bcomp, dcomp, fcomp, OPAL_MAP_PE); 609184cd4a3SBenjamin Herrenschmidt if (rc) { 610184cd4a3SBenjamin Herrenschmidt pe_err(pe, "OPAL error %ld trying to setup PELT table\n", rc); 611184cd4a3SBenjamin Herrenschmidt return -ENXIO; 612184cd4a3SBenjamin Herrenschmidt } 613184cd4a3SBenjamin Herrenschmidt opal_pci_eeh_freeze_clear(phb->opal_id, pe->pe_number, 614184cd4a3SBenjamin Herrenschmidt OPAL_EEH_ACTION_CLEAR_FREEZE_ALL); 615184cd4a3SBenjamin Herrenschmidt 616184cd4a3SBenjamin Herrenschmidt /* Add to all parents PELT-V */ 617184cd4a3SBenjamin Herrenschmidt while (parent) { 618184cd4a3SBenjamin Herrenschmidt struct pci_dn *pdn = pnv_ioda_get_pdn(parent); 619184cd4a3SBenjamin Herrenschmidt if (pdn && pdn->pe_number != IODA_INVALID_PE) { 620184cd4a3SBenjamin Herrenschmidt rc = opal_pci_set_peltv(phb->opal_id, pdn->pe_number, 621cee72d5bSBenjamin Herrenschmidt pe->pe_number, OPAL_ADD_PE_TO_DOMAIN); 622184cd4a3SBenjamin Herrenschmidt /* XXX What to do in case of error ? */ 623184cd4a3SBenjamin Herrenschmidt } 624184cd4a3SBenjamin Herrenschmidt parent = parent->bus->self; 625184cd4a3SBenjamin Herrenschmidt } 626184cd4a3SBenjamin Herrenschmidt /* Setup reverse map */ 627184cd4a3SBenjamin Herrenschmidt for (rid = pe->rid; rid < rid_end; rid++) 628184cd4a3SBenjamin Herrenschmidt phb->ioda.pe_rmap[rid] = pe->pe_number; 629184cd4a3SBenjamin Herrenschmidt 630184cd4a3SBenjamin Herrenschmidt /* Setup one MVTs on IODA1 */ 631184cd4a3SBenjamin Herrenschmidt if (phb->type == PNV_PHB_IODA1) { 632184cd4a3SBenjamin Herrenschmidt pe->mve_number = pe->pe_number; 633184cd4a3SBenjamin Herrenschmidt rc = opal_pci_set_mve(phb->opal_id, pe->mve_number, 634184cd4a3SBenjamin Herrenschmidt pe->pe_number); 635184cd4a3SBenjamin Herrenschmidt if (rc) { 636184cd4a3SBenjamin Herrenschmidt pe_err(pe, "OPAL error %ld setting up MVE %d\n", 637184cd4a3SBenjamin Herrenschmidt rc, pe->mve_number); 638184cd4a3SBenjamin Herrenschmidt pe->mve_number = -1; 639184cd4a3SBenjamin Herrenschmidt } else { 640184cd4a3SBenjamin Herrenschmidt rc = opal_pci_set_mve_enable(phb->opal_id, 641cee72d5bSBenjamin Herrenschmidt pe->mve_number, OPAL_ENABLE_MVE); 642184cd4a3SBenjamin Herrenschmidt if (rc) { 643184cd4a3SBenjamin Herrenschmidt pe_err(pe, "OPAL error %ld enabling MVE %d\n", 644184cd4a3SBenjamin Herrenschmidt rc, pe->mve_number); 645184cd4a3SBenjamin Herrenschmidt pe->mve_number = -1; 646184cd4a3SBenjamin Herrenschmidt } 647184cd4a3SBenjamin Herrenschmidt } 648184cd4a3SBenjamin Herrenschmidt } else if (phb->type == PNV_PHB_IODA2) 649184cd4a3SBenjamin Herrenschmidt pe->mve_number = 0; 650184cd4a3SBenjamin Herrenschmidt 651184cd4a3SBenjamin Herrenschmidt return 0; 652184cd4a3SBenjamin Herrenschmidt } 653184cd4a3SBenjamin Herrenschmidt 654184cd4a3SBenjamin Herrenschmidt static void __devinit pnv_ioda_link_pe_by_weight(struct pnv_phb *phb, 655184cd4a3SBenjamin Herrenschmidt struct pnv_ioda_pe *pe) 656184cd4a3SBenjamin Herrenschmidt { 657184cd4a3SBenjamin Herrenschmidt struct pnv_ioda_pe *lpe; 658184cd4a3SBenjamin Herrenschmidt 6597ebdf956SGavin Shan list_for_each_entry(lpe, &phb->ioda.pe_dma_list, dma_link) { 660184cd4a3SBenjamin Herrenschmidt if (lpe->dma_weight < pe->dma_weight) { 6617ebdf956SGavin Shan list_add_tail(&pe->dma_link, &lpe->dma_link); 662184cd4a3SBenjamin Herrenschmidt return; 663184cd4a3SBenjamin Herrenschmidt } 664184cd4a3SBenjamin Herrenschmidt } 6657ebdf956SGavin Shan list_add_tail(&pe->dma_link, &phb->ioda.pe_dma_list); 666184cd4a3SBenjamin Herrenschmidt } 667184cd4a3SBenjamin Herrenschmidt 668184cd4a3SBenjamin Herrenschmidt static unsigned int pnv_ioda_dma_weight(struct pci_dev *dev) 669184cd4a3SBenjamin Herrenschmidt { 670184cd4a3SBenjamin Herrenschmidt /* This is quite simplistic. The "base" weight of a device 671184cd4a3SBenjamin Herrenschmidt * is 10. 0 means no DMA is to be accounted for it. 672184cd4a3SBenjamin Herrenschmidt */ 673184cd4a3SBenjamin Herrenschmidt 674184cd4a3SBenjamin Herrenschmidt /* If it's a bridge, no DMA */ 675184cd4a3SBenjamin Herrenschmidt if (dev->hdr_type != PCI_HEADER_TYPE_NORMAL) 676184cd4a3SBenjamin Herrenschmidt return 0; 677184cd4a3SBenjamin Herrenschmidt 678184cd4a3SBenjamin Herrenschmidt /* Reduce the weight of slow USB controllers */ 679184cd4a3SBenjamin Herrenschmidt if (dev->class == PCI_CLASS_SERIAL_USB_UHCI || 680184cd4a3SBenjamin Herrenschmidt dev->class == PCI_CLASS_SERIAL_USB_OHCI || 681184cd4a3SBenjamin Herrenschmidt dev->class == PCI_CLASS_SERIAL_USB_EHCI) 682184cd4a3SBenjamin Herrenschmidt return 3; 683184cd4a3SBenjamin Herrenschmidt 684184cd4a3SBenjamin Herrenschmidt /* Increase the weight of RAID (includes Obsidian) */ 685184cd4a3SBenjamin Herrenschmidt if ((dev->class >> 8) == PCI_CLASS_STORAGE_RAID) 686184cd4a3SBenjamin Herrenschmidt return 15; 687184cd4a3SBenjamin Herrenschmidt 688184cd4a3SBenjamin Herrenschmidt /* Default */ 689184cd4a3SBenjamin Herrenschmidt return 10; 690184cd4a3SBenjamin Herrenschmidt } 691184cd4a3SBenjamin Herrenschmidt 692fb446ad0SGavin Shan #if 0 693184cd4a3SBenjamin Herrenschmidt static struct pnv_ioda_pe * __devinit pnv_ioda_setup_dev_PE(struct pci_dev *dev) 694184cd4a3SBenjamin Herrenschmidt { 695184cd4a3SBenjamin Herrenschmidt struct pci_controller *hose = pci_bus_to_host(dev->bus); 696184cd4a3SBenjamin Herrenschmidt struct pnv_phb *phb = hose->private_data; 697184cd4a3SBenjamin Herrenschmidt struct pci_dn *pdn = pnv_ioda_get_pdn(dev); 698184cd4a3SBenjamin Herrenschmidt struct pnv_ioda_pe *pe; 699184cd4a3SBenjamin Herrenschmidt int pe_num; 700184cd4a3SBenjamin Herrenschmidt 701184cd4a3SBenjamin Herrenschmidt if (!pdn) { 702184cd4a3SBenjamin Herrenschmidt pr_err("%s: Device tree node not associated properly\n", 703184cd4a3SBenjamin Herrenschmidt pci_name(dev)); 704184cd4a3SBenjamin Herrenschmidt return NULL; 705184cd4a3SBenjamin Herrenschmidt } 706184cd4a3SBenjamin Herrenschmidt if (pdn->pe_number != IODA_INVALID_PE) 707184cd4a3SBenjamin Herrenschmidt return NULL; 708184cd4a3SBenjamin Herrenschmidt 709184cd4a3SBenjamin Herrenschmidt /* PE#0 has been pre-set */ 710184cd4a3SBenjamin Herrenschmidt if (dev->bus->number == 0) 711184cd4a3SBenjamin Herrenschmidt pe_num = 0; 712184cd4a3SBenjamin Herrenschmidt else 713184cd4a3SBenjamin Herrenschmidt pe_num = pnv_ioda_alloc_pe(phb); 714184cd4a3SBenjamin Herrenschmidt if (pe_num == IODA_INVALID_PE) { 715184cd4a3SBenjamin Herrenschmidt pr_warning("%s: Not enough PE# available, disabling device\n", 716184cd4a3SBenjamin Herrenschmidt pci_name(dev)); 717184cd4a3SBenjamin Herrenschmidt return NULL; 718184cd4a3SBenjamin Herrenschmidt } 719184cd4a3SBenjamin Herrenschmidt 720184cd4a3SBenjamin Herrenschmidt /* NOTE: We get only one ref to the pci_dev for the pdn, not for the 721184cd4a3SBenjamin Herrenschmidt * pointer in the PE data structure, both should be destroyed at the 722184cd4a3SBenjamin Herrenschmidt * same time. However, this needs to be looked at more closely again 723184cd4a3SBenjamin Herrenschmidt * once we actually start removing things (Hotplug, SR-IOV, ...) 724184cd4a3SBenjamin Herrenschmidt * 725184cd4a3SBenjamin Herrenschmidt * At some point we want to remove the PDN completely anyways 726184cd4a3SBenjamin Herrenschmidt */ 727184cd4a3SBenjamin Herrenschmidt pe = &phb->ioda.pe_array[pe_num]; 728184cd4a3SBenjamin Herrenschmidt pci_dev_get(dev); 729184cd4a3SBenjamin Herrenschmidt pdn->pcidev = dev; 730184cd4a3SBenjamin Herrenschmidt pdn->pe_number = pe_num; 731184cd4a3SBenjamin Herrenschmidt pe->pdev = dev; 732184cd4a3SBenjamin Herrenschmidt pe->pbus = NULL; 733184cd4a3SBenjamin Herrenschmidt pe->tce32_seg = -1; 734184cd4a3SBenjamin Herrenschmidt pe->mve_number = -1; 735184cd4a3SBenjamin Herrenschmidt pe->rid = dev->bus->number << 8 | pdn->devfn; 736184cd4a3SBenjamin Herrenschmidt 737184cd4a3SBenjamin Herrenschmidt pe_info(pe, "Associated device to PE\n"); 738184cd4a3SBenjamin Herrenschmidt 739184cd4a3SBenjamin Herrenschmidt if (pnv_ioda_configure_pe(phb, pe)) { 740184cd4a3SBenjamin Herrenschmidt /* XXX What do we do here ? */ 741184cd4a3SBenjamin Herrenschmidt if (pe_num) 742184cd4a3SBenjamin Herrenschmidt pnv_ioda_free_pe(phb, pe_num); 743184cd4a3SBenjamin Herrenschmidt pdn->pe_number = IODA_INVALID_PE; 744184cd4a3SBenjamin Herrenschmidt pe->pdev = NULL; 745184cd4a3SBenjamin Herrenschmidt pci_dev_put(dev); 746184cd4a3SBenjamin Herrenschmidt return NULL; 747184cd4a3SBenjamin Herrenschmidt } 748184cd4a3SBenjamin Herrenschmidt 749184cd4a3SBenjamin Herrenschmidt /* Assign a DMA weight to the device */ 750184cd4a3SBenjamin Herrenschmidt pe->dma_weight = pnv_ioda_dma_weight(dev); 751184cd4a3SBenjamin Herrenschmidt if (pe->dma_weight != 0) { 752184cd4a3SBenjamin Herrenschmidt phb->ioda.dma_weight += pe->dma_weight; 753184cd4a3SBenjamin Herrenschmidt phb->ioda.dma_pe_count++; 754184cd4a3SBenjamin Herrenschmidt } 755184cd4a3SBenjamin Herrenschmidt 756184cd4a3SBenjamin Herrenschmidt /* Link the PE */ 757184cd4a3SBenjamin Herrenschmidt pnv_ioda_link_pe_by_weight(phb, pe); 758184cd4a3SBenjamin Herrenschmidt 759184cd4a3SBenjamin Herrenschmidt return pe; 760184cd4a3SBenjamin Herrenschmidt } 761fb446ad0SGavin Shan #endif /* Useful for SRIOV case */ 762184cd4a3SBenjamin Herrenschmidt 763184cd4a3SBenjamin Herrenschmidt static void pnv_ioda_setup_same_PE(struct pci_bus *bus, struct pnv_ioda_pe *pe) 764184cd4a3SBenjamin Herrenschmidt { 765184cd4a3SBenjamin Herrenschmidt struct pci_dev *dev; 766184cd4a3SBenjamin Herrenschmidt 767184cd4a3SBenjamin Herrenschmidt list_for_each_entry(dev, &bus->devices, bus_list) { 768184cd4a3SBenjamin Herrenschmidt struct pci_dn *pdn = pnv_ioda_get_pdn(dev); 769184cd4a3SBenjamin Herrenschmidt 770184cd4a3SBenjamin Herrenschmidt if (pdn == NULL) { 771184cd4a3SBenjamin Herrenschmidt pr_warn("%s: No device node associated with device !\n", 772184cd4a3SBenjamin Herrenschmidt pci_name(dev)); 773184cd4a3SBenjamin Herrenschmidt continue; 774184cd4a3SBenjamin Herrenschmidt } 775184cd4a3SBenjamin Herrenschmidt pci_dev_get(dev); 776184cd4a3SBenjamin Herrenschmidt pdn->pcidev = dev; 777184cd4a3SBenjamin Herrenschmidt pdn->pe_number = pe->pe_number; 778184cd4a3SBenjamin Herrenschmidt pe->dma_weight += pnv_ioda_dma_weight(dev); 779fb446ad0SGavin Shan if ((pe->flags & PNV_IODA_PE_BUS_ALL) && dev->subordinate) 780184cd4a3SBenjamin Herrenschmidt pnv_ioda_setup_same_PE(dev->subordinate, pe); 781184cd4a3SBenjamin Herrenschmidt } 782184cd4a3SBenjamin Herrenschmidt } 783184cd4a3SBenjamin Herrenschmidt 784fb446ad0SGavin Shan /* 785fb446ad0SGavin Shan * There're 2 types of PCI bus sensitive PEs: One that is compromised of 786fb446ad0SGavin Shan * single PCI bus. Another one that contains the primary PCI bus and its 787fb446ad0SGavin Shan * subordinate PCI devices and buses. The second type of PE is normally 788fb446ad0SGavin Shan * orgiriated by PCIe-to-PCI bridge or PLX switch downstream ports. 789fb446ad0SGavin Shan */ 790fb446ad0SGavin Shan static void __devinit pnv_ioda_setup_bus_PE(struct pci_bus *bus, int all) 791184cd4a3SBenjamin Herrenschmidt { 792fb446ad0SGavin Shan struct pci_controller *hose = pci_bus_to_host(bus); 793184cd4a3SBenjamin Herrenschmidt struct pnv_phb *phb = hose->private_data; 794184cd4a3SBenjamin Herrenschmidt struct pnv_ioda_pe *pe; 795184cd4a3SBenjamin Herrenschmidt int pe_num; 796184cd4a3SBenjamin Herrenschmidt 797184cd4a3SBenjamin Herrenschmidt pe_num = pnv_ioda_alloc_pe(phb); 798184cd4a3SBenjamin Herrenschmidt if (pe_num == IODA_INVALID_PE) { 799fb446ad0SGavin Shan pr_warning("%s: Not enough PE# available for PCI bus %04x:%02x\n", 800fb446ad0SGavin Shan __func__, pci_domain_nr(bus), bus->number); 801184cd4a3SBenjamin Herrenschmidt return; 802184cd4a3SBenjamin Herrenschmidt } 803184cd4a3SBenjamin Herrenschmidt 804184cd4a3SBenjamin Herrenschmidt pe = &phb->ioda.pe_array[pe_num]; 805fb446ad0SGavin Shan pe->flags = (all ? PNV_IODA_PE_BUS_ALL : PNV_IODA_PE_BUS); 806184cd4a3SBenjamin Herrenschmidt pe->pbus = bus; 807184cd4a3SBenjamin Herrenschmidt pe->pdev = NULL; 808184cd4a3SBenjamin Herrenschmidt pe->tce32_seg = -1; 809184cd4a3SBenjamin Herrenschmidt pe->mve_number = -1; 810b918c62eSYinghai Lu pe->rid = bus->busn_res.start << 8; 811184cd4a3SBenjamin Herrenschmidt pe->dma_weight = 0; 812184cd4a3SBenjamin Herrenschmidt 813fb446ad0SGavin Shan if (all) 814fb446ad0SGavin Shan pe_info(pe, "Secondary bus %d..%d associated with PE#%d\n", 815fb446ad0SGavin Shan bus->busn_res.start, bus->busn_res.end, pe_num); 816fb446ad0SGavin Shan else 817fb446ad0SGavin Shan pe_info(pe, "Secondary bus %d associated with PE#%d\n", 818fb446ad0SGavin Shan bus->busn_res.start, pe_num); 819184cd4a3SBenjamin Herrenschmidt 820184cd4a3SBenjamin Herrenschmidt if (pnv_ioda_configure_pe(phb, pe)) { 821184cd4a3SBenjamin Herrenschmidt /* XXX What do we do here ? */ 822184cd4a3SBenjamin Herrenschmidt if (pe_num) 823184cd4a3SBenjamin Herrenschmidt pnv_ioda_free_pe(phb, pe_num); 824184cd4a3SBenjamin Herrenschmidt pe->pbus = NULL; 825184cd4a3SBenjamin Herrenschmidt return; 826184cd4a3SBenjamin Herrenschmidt } 827184cd4a3SBenjamin Herrenschmidt 828184cd4a3SBenjamin Herrenschmidt /* Associate it with all child devices */ 829184cd4a3SBenjamin Herrenschmidt pnv_ioda_setup_same_PE(bus, pe); 830184cd4a3SBenjamin Herrenschmidt 8317ebdf956SGavin Shan /* Put PE to the list */ 8327ebdf956SGavin Shan list_add_tail(&pe->list, &phb->ioda.pe_list); 8337ebdf956SGavin Shan 834184cd4a3SBenjamin Herrenschmidt /* Account for one DMA PE if at least one DMA capable device exist 835184cd4a3SBenjamin Herrenschmidt * below the bridge 836184cd4a3SBenjamin Herrenschmidt */ 837184cd4a3SBenjamin Herrenschmidt if (pe->dma_weight != 0) { 838184cd4a3SBenjamin Herrenschmidt phb->ioda.dma_weight += pe->dma_weight; 839184cd4a3SBenjamin Herrenschmidt phb->ioda.dma_pe_count++; 840184cd4a3SBenjamin Herrenschmidt } 841184cd4a3SBenjamin Herrenschmidt 842184cd4a3SBenjamin Herrenschmidt /* Link the PE */ 843184cd4a3SBenjamin Herrenschmidt pnv_ioda_link_pe_by_weight(phb, pe); 844184cd4a3SBenjamin Herrenschmidt } 845184cd4a3SBenjamin Herrenschmidt 846184cd4a3SBenjamin Herrenschmidt static void __devinit pnv_ioda_setup_PEs(struct pci_bus *bus) 847184cd4a3SBenjamin Herrenschmidt { 848184cd4a3SBenjamin Herrenschmidt struct pci_dev *dev; 849fb446ad0SGavin Shan 850fb446ad0SGavin Shan pnv_ioda_setup_bus_PE(bus, 0); 851184cd4a3SBenjamin Herrenschmidt 852184cd4a3SBenjamin Herrenschmidt list_for_each_entry(dev, &bus->devices, bus_list) { 853fb446ad0SGavin Shan if (dev->subordinate) { 85462f87c0eSYijing Wang if (pci_pcie_type(dev) == PCI_EXP_TYPE_PCI_BRIDGE) 855fb446ad0SGavin Shan pnv_ioda_setup_bus_PE(dev->subordinate, 1); 856fb446ad0SGavin Shan else 857184cd4a3SBenjamin Herrenschmidt pnv_ioda_setup_PEs(dev->subordinate); 858184cd4a3SBenjamin Herrenschmidt } 859184cd4a3SBenjamin Herrenschmidt } 860fb446ad0SGavin Shan } 861fb446ad0SGavin Shan 862fb446ad0SGavin Shan /* 863fb446ad0SGavin Shan * Configure PEs so that the downstream PCI buses and devices 864fb446ad0SGavin Shan * could have their associated PE#. Unfortunately, we didn't 865fb446ad0SGavin Shan * figure out the way to identify the PLX bridge yet. So we 866fb446ad0SGavin Shan * simply put the PCI bus and the subordinate behind the root 867fb446ad0SGavin Shan * port to PE# here. The game rule here is expected to be changed 868fb446ad0SGavin Shan * as soon as we can detected PLX bridge correctly. 869fb446ad0SGavin Shan */ 870fb446ad0SGavin Shan static void __devinit pnv_pci_ioda_setup_PEs(void) 871fb446ad0SGavin Shan { 872fb446ad0SGavin Shan struct pci_controller *hose, *tmp; 873fb446ad0SGavin Shan 874fb446ad0SGavin Shan list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { 875fb446ad0SGavin Shan pnv_ioda_setup_PEs(hose->bus); 876fb446ad0SGavin Shan } 877fb446ad0SGavin Shan } 878184cd4a3SBenjamin Herrenschmidt 879184cd4a3SBenjamin Herrenschmidt static void __devinit pnv_pci_ioda_dma_dev_setup(struct pnv_phb *phb, 880184cd4a3SBenjamin Herrenschmidt struct pci_dev *dev) 881184cd4a3SBenjamin Herrenschmidt { 882184cd4a3SBenjamin Herrenschmidt /* We delay DMA setup after we have assigned all PE# */ 883184cd4a3SBenjamin Herrenschmidt } 884184cd4a3SBenjamin Herrenschmidt 885184cd4a3SBenjamin Herrenschmidt static void __devinit pnv_ioda_setup_bus_dma(struct pnv_ioda_pe *pe, 886184cd4a3SBenjamin Herrenschmidt struct pci_bus *bus) 887184cd4a3SBenjamin Herrenschmidt { 888184cd4a3SBenjamin Herrenschmidt struct pci_dev *dev; 889184cd4a3SBenjamin Herrenschmidt 890184cd4a3SBenjamin Herrenschmidt list_for_each_entry(dev, &bus->devices, bus_list) { 891184cd4a3SBenjamin Herrenschmidt set_iommu_table_base(&dev->dev, &pe->tce32_table); 892184cd4a3SBenjamin Herrenschmidt if (dev->subordinate) 893184cd4a3SBenjamin Herrenschmidt pnv_ioda_setup_bus_dma(pe, dev->subordinate); 894184cd4a3SBenjamin Herrenschmidt } 895184cd4a3SBenjamin Herrenschmidt } 896184cd4a3SBenjamin Herrenschmidt 897184cd4a3SBenjamin Herrenschmidt static void __devinit pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb, 898184cd4a3SBenjamin Herrenschmidt struct pnv_ioda_pe *pe, 899184cd4a3SBenjamin Herrenschmidt unsigned int base, 900184cd4a3SBenjamin Herrenschmidt unsigned int segs) 901184cd4a3SBenjamin Herrenschmidt { 902184cd4a3SBenjamin Herrenschmidt 903184cd4a3SBenjamin Herrenschmidt struct page *tce_mem = NULL; 904184cd4a3SBenjamin Herrenschmidt const __be64 *swinvp; 905184cd4a3SBenjamin Herrenschmidt struct iommu_table *tbl; 906184cd4a3SBenjamin Herrenschmidt unsigned int i; 907184cd4a3SBenjamin Herrenschmidt int64_t rc; 908184cd4a3SBenjamin Herrenschmidt void *addr; 909184cd4a3SBenjamin Herrenschmidt 910184cd4a3SBenjamin Herrenschmidt /* 256M DMA window, 4K TCE pages, 8 bytes TCE */ 911184cd4a3SBenjamin Herrenschmidt #define TCE32_TABLE_SIZE ((0x10000000 / 0x1000) * 8) 912184cd4a3SBenjamin Herrenschmidt 913184cd4a3SBenjamin Herrenschmidt /* XXX FIXME: Handle 64-bit only DMA devices */ 914184cd4a3SBenjamin Herrenschmidt /* XXX FIXME: Provide 64-bit DMA facilities & non-4K TCE tables etc.. */ 915184cd4a3SBenjamin Herrenschmidt /* XXX FIXME: Allocate multi-level tables on PHB3 */ 916184cd4a3SBenjamin Herrenschmidt 917184cd4a3SBenjamin Herrenschmidt /* We shouldn't already have a 32-bit DMA associated */ 918184cd4a3SBenjamin Herrenschmidt if (WARN_ON(pe->tce32_seg >= 0)) 919184cd4a3SBenjamin Herrenschmidt return; 920184cd4a3SBenjamin Herrenschmidt 921184cd4a3SBenjamin Herrenschmidt /* Grab a 32-bit TCE table */ 922184cd4a3SBenjamin Herrenschmidt pe->tce32_seg = base; 923184cd4a3SBenjamin Herrenschmidt pe_info(pe, " Setting up 32-bit TCE table at %08x..%08x\n", 924184cd4a3SBenjamin Herrenschmidt (base << 28), ((base + segs) << 28) - 1); 925184cd4a3SBenjamin Herrenschmidt 926184cd4a3SBenjamin Herrenschmidt /* XXX Currently, we allocate one big contiguous table for the 927184cd4a3SBenjamin Herrenschmidt * TCEs. We only really need one chunk per 256M of TCE space 928184cd4a3SBenjamin Herrenschmidt * (ie per segment) but that's an optimization for later, it 929184cd4a3SBenjamin Herrenschmidt * requires some added smarts with our get/put_tce implementation 930184cd4a3SBenjamin Herrenschmidt */ 931184cd4a3SBenjamin Herrenschmidt tce_mem = alloc_pages_node(phb->hose->node, GFP_KERNEL, 932184cd4a3SBenjamin Herrenschmidt get_order(TCE32_TABLE_SIZE * segs)); 933184cd4a3SBenjamin Herrenschmidt if (!tce_mem) { 934184cd4a3SBenjamin Herrenschmidt pe_err(pe, " Failed to allocate a 32-bit TCE memory\n"); 935184cd4a3SBenjamin Herrenschmidt goto fail; 936184cd4a3SBenjamin Herrenschmidt } 937184cd4a3SBenjamin Herrenschmidt addr = page_address(tce_mem); 938184cd4a3SBenjamin Herrenschmidt memset(addr, 0, TCE32_TABLE_SIZE * segs); 939184cd4a3SBenjamin Herrenschmidt 940184cd4a3SBenjamin Herrenschmidt /* Configure HW */ 941184cd4a3SBenjamin Herrenschmidt for (i = 0; i < segs; i++) { 942184cd4a3SBenjamin Herrenschmidt rc = opal_pci_map_pe_dma_window(phb->opal_id, 943184cd4a3SBenjamin Herrenschmidt pe->pe_number, 944184cd4a3SBenjamin Herrenschmidt base + i, 1, 945184cd4a3SBenjamin Herrenschmidt __pa(addr) + TCE32_TABLE_SIZE * i, 946184cd4a3SBenjamin Herrenschmidt TCE32_TABLE_SIZE, 0x1000); 947184cd4a3SBenjamin Herrenschmidt if (rc) { 948184cd4a3SBenjamin Herrenschmidt pe_err(pe, " Failed to configure 32-bit TCE table," 949184cd4a3SBenjamin Herrenschmidt " err %ld\n", rc); 950184cd4a3SBenjamin Herrenschmidt goto fail; 951184cd4a3SBenjamin Herrenschmidt } 952184cd4a3SBenjamin Herrenschmidt } 953184cd4a3SBenjamin Herrenschmidt 954184cd4a3SBenjamin Herrenschmidt /* Setup linux iommu table */ 955184cd4a3SBenjamin Herrenschmidt tbl = &pe->tce32_table; 956184cd4a3SBenjamin Herrenschmidt pnv_pci_setup_iommu_table(tbl, addr, TCE32_TABLE_SIZE * segs, 957184cd4a3SBenjamin Herrenschmidt base << 28); 958184cd4a3SBenjamin Herrenschmidt 959184cd4a3SBenjamin Herrenschmidt /* OPAL variant of P7IOC SW invalidated TCEs */ 960184cd4a3SBenjamin Herrenschmidt swinvp = of_get_property(phb->hose->dn, "ibm,opal-tce-kill", NULL); 961184cd4a3SBenjamin Herrenschmidt if (swinvp) { 962184cd4a3SBenjamin Herrenschmidt /* We need a couple more fields -- an address and a data 963184cd4a3SBenjamin Herrenschmidt * to or. Since the bus is only printed out on table free 964184cd4a3SBenjamin Herrenschmidt * errors, and on the first pass the data will be a relative 965184cd4a3SBenjamin Herrenschmidt * bus number, print that out instead. 966184cd4a3SBenjamin Herrenschmidt */ 967184cd4a3SBenjamin Herrenschmidt tbl->it_busno = 0; 968184cd4a3SBenjamin Herrenschmidt tbl->it_index = (unsigned long)ioremap(be64_to_cpup(swinvp), 8); 969184cd4a3SBenjamin Herrenschmidt tbl->it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE 970184cd4a3SBenjamin Herrenschmidt | TCE_PCI_SWINV_PAIR; 971184cd4a3SBenjamin Herrenschmidt } 972184cd4a3SBenjamin Herrenschmidt iommu_init_table(tbl, phb->hose->node); 973184cd4a3SBenjamin Herrenschmidt 974184cd4a3SBenjamin Herrenschmidt if (pe->pdev) 975184cd4a3SBenjamin Herrenschmidt set_iommu_table_base(&pe->pdev->dev, tbl); 976184cd4a3SBenjamin Herrenschmidt else 977184cd4a3SBenjamin Herrenschmidt pnv_ioda_setup_bus_dma(pe, pe->pbus); 978184cd4a3SBenjamin Herrenschmidt 979184cd4a3SBenjamin Herrenschmidt return; 980184cd4a3SBenjamin Herrenschmidt fail: 981184cd4a3SBenjamin Herrenschmidt /* XXX Failure: Try to fallback to 64-bit only ? */ 982184cd4a3SBenjamin Herrenschmidt if (pe->tce32_seg >= 0) 983184cd4a3SBenjamin Herrenschmidt pe->tce32_seg = -1; 984184cd4a3SBenjamin Herrenschmidt if (tce_mem) 985184cd4a3SBenjamin Herrenschmidt __free_pages(tce_mem, get_order(TCE32_TABLE_SIZE * segs)); 986184cd4a3SBenjamin Herrenschmidt } 987184cd4a3SBenjamin Herrenschmidt 988184cd4a3SBenjamin Herrenschmidt static void __devinit pnv_ioda_setup_dma(struct pnv_phb *phb) 989184cd4a3SBenjamin Herrenschmidt { 990184cd4a3SBenjamin Herrenschmidt struct pci_controller *hose = phb->hose; 991184cd4a3SBenjamin Herrenschmidt unsigned int residual, remaining, segs, tw, base; 992184cd4a3SBenjamin Herrenschmidt struct pnv_ioda_pe *pe; 993184cd4a3SBenjamin Herrenschmidt 994184cd4a3SBenjamin Herrenschmidt /* If we have more PE# than segments available, hand out one 995184cd4a3SBenjamin Herrenschmidt * per PE until we run out and let the rest fail. If not, 996184cd4a3SBenjamin Herrenschmidt * then we assign at least one segment per PE, plus more based 997184cd4a3SBenjamin Herrenschmidt * on the amount of devices under that PE 998184cd4a3SBenjamin Herrenschmidt */ 999184cd4a3SBenjamin Herrenschmidt if (phb->ioda.dma_pe_count > phb->ioda.tce32_count) 1000184cd4a3SBenjamin Herrenschmidt residual = 0; 1001184cd4a3SBenjamin Herrenschmidt else 1002184cd4a3SBenjamin Herrenschmidt residual = phb->ioda.tce32_count - 1003184cd4a3SBenjamin Herrenschmidt phb->ioda.dma_pe_count; 1004184cd4a3SBenjamin Herrenschmidt 1005184cd4a3SBenjamin Herrenschmidt pr_info("PCI: Domain %04x has %ld available 32-bit DMA segments\n", 1006184cd4a3SBenjamin Herrenschmidt hose->global_number, phb->ioda.tce32_count); 1007184cd4a3SBenjamin Herrenschmidt pr_info("PCI: %d PE# for a total weight of %d\n", 1008184cd4a3SBenjamin Herrenschmidt phb->ioda.dma_pe_count, phb->ioda.dma_weight); 1009184cd4a3SBenjamin Herrenschmidt 1010184cd4a3SBenjamin Herrenschmidt /* Walk our PE list and configure their DMA segments, hand them 1011184cd4a3SBenjamin Herrenschmidt * out one base segment plus any residual segments based on 1012184cd4a3SBenjamin Herrenschmidt * weight 1013184cd4a3SBenjamin Herrenschmidt */ 1014184cd4a3SBenjamin Herrenschmidt remaining = phb->ioda.tce32_count; 1015184cd4a3SBenjamin Herrenschmidt tw = phb->ioda.dma_weight; 1016184cd4a3SBenjamin Herrenschmidt base = 0; 10177ebdf956SGavin Shan list_for_each_entry(pe, &phb->ioda.pe_dma_list, dma_link) { 1018184cd4a3SBenjamin Herrenschmidt if (!pe->dma_weight) 1019184cd4a3SBenjamin Herrenschmidt continue; 1020184cd4a3SBenjamin Herrenschmidt if (!remaining) { 1021184cd4a3SBenjamin Herrenschmidt pe_warn(pe, "No DMA32 resources available\n"); 1022184cd4a3SBenjamin Herrenschmidt continue; 1023184cd4a3SBenjamin Herrenschmidt } 1024184cd4a3SBenjamin Herrenschmidt segs = 1; 1025184cd4a3SBenjamin Herrenschmidt if (residual) { 1026184cd4a3SBenjamin Herrenschmidt segs += ((pe->dma_weight * residual) + (tw / 2)) / tw; 1027184cd4a3SBenjamin Herrenschmidt if (segs > remaining) 1028184cd4a3SBenjamin Herrenschmidt segs = remaining; 1029184cd4a3SBenjamin Herrenschmidt } 1030184cd4a3SBenjamin Herrenschmidt pe_info(pe, "DMA weight %d, assigned %d DMA32 segments\n", 1031184cd4a3SBenjamin Herrenschmidt pe->dma_weight, segs); 1032184cd4a3SBenjamin Herrenschmidt pnv_pci_ioda_setup_dma_pe(phb, pe, base, segs); 1033184cd4a3SBenjamin Herrenschmidt remaining -= segs; 1034184cd4a3SBenjamin Herrenschmidt base += segs; 1035184cd4a3SBenjamin Herrenschmidt } 1036184cd4a3SBenjamin Herrenschmidt } 1037184cd4a3SBenjamin Herrenschmidt 1038184cd4a3SBenjamin Herrenschmidt #ifdef CONFIG_PCI_MSI 1039184cd4a3SBenjamin Herrenschmidt static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb, struct pci_dev *dev, 1040184cd4a3SBenjamin Herrenschmidt unsigned int hwirq, unsigned int is_64, 1041184cd4a3SBenjamin Herrenschmidt struct msi_msg *msg) 1042184cd4a3SBenjamin Herrenschmidt { 1043184cd4a3SBenjamin Herrenschmidt struct pnv_ioda_pe *pe = pnv_ioda_get_pe(dev); 1044184cd4a3SBenjamin Herrenschmidt unsigned int xive_num = hwirq - phb->msi_base; 1045184cd4a3SBenjamin Herrenschmidt uint64_t addr64; 1046184cd4a3SBenjamin Herrenschmidt uint32_t addr32, data; 1047184cd4a3SBenjamin Herrenschmidt int rc; 1048184cd4a3SBenjamin Herrenschmidt 1049184cd4a3SBenjamin Herrenschmidt /* No PE assigned ? bail out ... no MSI for you ! */ 1050184cd4a3SBenjamin Herrenschmidt if (pe == NULL) 1051184cd4a3SBenjamin Herrenschmidt return -ENXIO; 1052184cd4a3SBenjamin Herrenschmidt 1053184cd4a3SBenjamin Herrenschmidt /* Check if we have an MVE */ 1054184cd4a3SBenjamin Herrenschmidt if (pe->mve_number < 0) 1055184cd4a3SBenjamin Herrenschmidt return -ENXIO; 1056184cd4a3SBenjamin Herrenschmidt 1057184cd4a3SBenjamin Herrenschmidt /* Assign XIVE to PE */ 1058184cd4a3SBenjamin Herrenschmidt rc = opal_pci_set_xive_pe(phb->opal_id, pe->pe_number, xive_num); 1059184cd4a3SBenjamin Herrenschmidt if (rc) { 1060184cd4a3SBenjamin Herrenschmidt pr_warn("%s: OPAL error %d setting XIVE %d PE\n", 1061184cd4a3SBenjamin Herrenschmidt pci_name(dev), rc, xive_num); 1062184cd4a3SBenjamin Herrenschmidt return -EIO; 1063184cd4a3SBenjamin Herrenschmidt } 1064184cd4a3SBenjamin Herrenschmidt 1065184cd4a3SBenjamin Herrenschmidt if (is_64) { 1066184cd4a3SBenjamin Herrenschmidt rc = opal_get_msi_64(phb->opal_id, pe->mve_number, xive_num, 1, 1067184cd4a3SBenjamin Herrenschmidt &addr64, &data); 1068184cd4a3SBenjamin Herrenschmidt if (rc) { 1069184cd4a3SBenjamin Herrenschmidt pr_warn("%s: OPAL error %d getting 64-bit MSI data\n", 1070184cd4a3SBenjamin Herrenschmidt pci_name(dev), rc); 1071184cd4a3SBenjamin Herrenschmidt return -EIO; 1072184cd4a3SBenjamin Herrenschmidt } 1073184cd4a3SBenjamin Herrenschmidt msg->address_hi = addr64 >> 32; 1074184cd4a3SBenjamin Herrenschmidt msg->address_lo = addr64 & 0xfffffffful; 1075184cd4a3SBenjamin Herrenschmidt } else { 1076184cd4a3SBenjamin Herrenschmidt rc = opal_get_msi_32(phb->opal_id, pe->mve_number, xive_num, 1, 1077184cd4a3SBenjamin Herrenschmidt &addr32, &data); 1078184cd4a3SBenjamin Herrenschmidt if (rc) { 1079184cd4a3SBenjamin Herrenschmidt pr_warn("%s: OPAL error %d getting 32-bit MSI data\n", 1080184cd4a3SBenjamin Herrenschmidt pci_name(dev), rc); 1081184cd4a3SBenjamin Herrenschmidt return -EIO; 1082184cd4a3SBenjamin Herrenschmidt } 1083184cd4a3SBenjamin Herrenschmidt msg->address_hi = 0; 1084184cd4a3SBenjamin Herrenschmidt msg->address_lo = addr32; 1085184cd4a3SBenjamin Herrenschmidt } 1086184cd4a3SBenjamin Herrenschmidt msg->data = data; 1087184cd4a3SBenjamin Herrenschmidt 1088184cd4a3SBenjamin Herrenschmidt pr_devel("%s: %s-bit MSI on hwirq %x (xive #%d)," 1089184cd4a3SBenjamin Herrenschmidt " address=%x_%08x data=%x PE# %d\n", 1090184cd4a3SBenjamin Herrenschmidt pci_name(dev), is_64 ? "64" : "32", hwirq, xive_num, 1091184cd4a3SBenjamin Herrenschmidt msg->address_hi, msg->address_lo, data, pe->pe_number); 1092184cd4a3SBenjamin Herrenschmidt 1093184cd4a3SBenjamin Herrenschmidt return 0; 1094184cd4a3SBenjamin Herrenschmidt } 1095184cd4a3SBenjamin Herrenschmidt 1096184cd4a3SBenjamin Herrenschmidt static void pnv_pci_init_ioda_msis(struct pnv_phb *phb) 1097184cd4a3SBenjamin Herrenschmidt { 1098184cd4a3SBenjamin Herrenschmidt unsigned int bmap_size; 1099184cd4a3SBenjamin Herrenschmidt const __be32 *prop = of_get_property(phb->hose->dn, 1100184cd4a3SBenjamin Herrenschmidt "ibm,opal-msi-ranges", NULL); 1101184cd4a3SBenjamin Herrenschmidt if (!prop) { 1102184cd4a3SBenjamin Herrenschmidt /* BML Fallback */ 1103184cd4a3SBenjamin Herrenschmidt prop = of_get_property(phb->hose->dn, "msi-ranges", NULL); 1104184cd4a3SBenjamin Herrenschmidt } 1105184cd4a3SBenjamin Herrenschmidt if (!prop) 1106184cd4a3SBenjamin Herrenschmidt return; 1107184cd4a3SBenjamin Herrenschmidt 1108184cd4a3SBenjamin Herrenschmidt phb->msi_base = be32_to_cpup(prop); 1109184cd4a3SBenjamin Herrenschmidt phb->msi_count = be32_to_cpup(prop + 1); 1110184cd4a3SBenjamin Herrenschmidt bmap_size = BITS_TO_LONGS(phb->msi_count) * sizeof(unsigned long); 1111184cd4a3SBenjamin Herrenschmidt phb->msi_map = zalloc_maybe_bootmem(bmap_size, GFP_KERNEL); 1112184cd4a3SBenjamin Herrenschmidt if (!phb->msi_map) { 1113184cd4a3SBenjamin Herrenschmidt pr_err("PCI %d: Failed to allocate MSI bitmap !\n", 1114184cd4a3SBenjamin Herrenschmidt phb->hose->global_number); 1115184cd4a3SBenjamin Herrenschmidt return; 1116184cd4a3SBenjamin Herrenschmidt } 1117184cd4a3SBenjamin Herrenschmidt phb->msi_setup = pnv_pci_ioda_msi_setup; 1118184cd4a3SBenjamin Herrenschmidt phb->msi32_support = 1; 1119184cd4a3SBenjamin Herrenschmidt pr_info(" Allocated bitmap for %d MSIs (base IRQ 0x%x)\n", 1120184cd4a3SBenjamin Herrenschmidt phb->msi_count, phb->msi_base); 1121184cd4a3SBenjamin Herrenschmidt } 1122184cd4a3SBenjamin Herrenschmidt #else 1123184cd4a3SBenjamin Herrenschmidt static void pnv_pci_init_ioda_msis(struct pnv_phb *phb) { } 1124184cd4a3SBenjamin Herrenschmidt #endif /* CONFIG_PCI_MSI */ 1125184cd4a3SBenjamin Herrenschmidt 112611685becSGavin Shan /* 112711685becSGavin Shan * This function is supposed to be called on basis of PE from top 112811685becSGavin Shan * to bottom style. So the the I/O or MMIO segment assigned to 112911685becSGavin Shan * parent PE could be overrided by its child PEs if necessary. 113011685becSGavin Shan */ 113111685becSGavin Shan static void __devinit pnv_ioda_setup_pe_seg(struct pci_controller *hose, 113211685becSGavin Shan struct pnv_ioda_pe *pe) 113311685becSGavin Shan { 113411685becSGavin Shan struct pnv_phb *phb = hose->private_data; 113511685becSGavin Shan struct pci_bus_region region; 113611685becSGavin Shan struct resource *res; 113711685becSGavin Shan int i, index; 113811685becSGavin Shan int rc; 113911685becSGavin Shan 114011685becSGavin Shan /* 114111685becSGavin Shan * NOTE: We only care PCI bus based PE for now. For PCI 114211685becSGavin Shan * device based PE, for example SRIOV sensitive VF should 114311685becSGavin Shan * be figured out later. 114411685becSGavin Shan */ 114511685becSGavin Shan BUG_ON(!(pe->flags & (PNV_IODA_PE_BUS | PNV_IODA_PE_BUS_ALL))); 114611685becSGavin Shan 114711685becSGavin Shan pci_bus_for_each_resource(pe->pbus, res, i) { 114811685becSGavin Shan if (!res || !res->flags || 114911685becSGavin Shan res->start > res->end) 115011685becSGavin Shan continue; 115111685becSGavin Shan 115211685becSGavin Shan if (res->flags & IORESOURCE_IO) { 115311685becSGavin Shan region.start = res->start - phb->ioda.io_pci_base; 115411685becSGavin Shan region.end = res->end - phb->ioda.io_pci_base; 115511685becSGavin Shan index = region.start / phb->ioda.io_segsize; 115611685becSGavin Shan 115711685becSGavin Shan while (index < phb->ioda.total_pe && 115811685becSGavin Shan region.start <= region.end) { 115911685becSGavin Shan phb->ioda.io_segmap[index] = pe->pe_number; 116011685becSGavin Shan rc = opal_pci_map_pe_mmio_window(phb->opal_id, 116111685becSGavin Shan pe->pe_number, OPAL_IO_WINDOW_TYPE, 0, index); 116211685becSGavin Shan if (rc != OPAL_SUCCESS) { 116311685becSGavin Shan pr_err("%s: OPAL error %d when mapping IO " 116411685becSGavin Shan "segment #%d to PE#%d\n", 116511685becSGavin Shan __func__, rc, index, pe->pe_number); 116611685becSGavin Shan break; 116711685becSGavin Shan } 116811685becSGavin Shan 116911685becSGavin Shan region.start += phb->ioda.io_segsize; 117011685becSGavin Shan index++; 117111685becSGavin Shan } 117211685becSGavin Shan } else if (res->flags & IORESOURCE_MEM) { 117311685becSGavin Shan region.start = res->start - 117411685becSGavin Shan hose->pci_mem_offset - 117511685becSGavin Shan phb->ioda.m32_pci_base; 117611685becSGavin Shan region.end = res->end - 117711685becSGavin Shan hose->pci_mem_offset - 117811685becSGavin Shan phb->ioda.m32_pci_base; 117911685becSGavin Shan index = region.start / phb->ioda.m32_segsize; 118011685becSGavin Shan 118111685becSGavin Shan while (index < phb->ioda.total_pe && 118211685becSGavin Shan region.start <= region.end) { 118311685becSGavin Shan phb->ioda.m32_segmap[index] = pe->pe_number; 118411685becSGavin Shan rc = opal_pci_map_pe_mmio_window(phb->opal_id, 118511685becSGavin Shan pe->pe_number, OPAL_M32_WINDOW_TYPE, 0, index); 118611685becSGavin Shan if (rc != OPAL_SUCCESS) { 118711685becSGavin Shan pr_err("%s: OPAL error %d when mapping M32 " 118811685becSGavin Shan "segment#%d to PE#%d", 118911685becSGavin Shan __func__, rc, index, pe->pe_number); 119011685becSGavin Shan break; 119111685becSGavin Shan } 119211685becSGavin Shan 119311685becSGavin Shan region.start += phb->ioda.m32_segsize; 119411685becSGavin Shan index++; 119511685becSGavin Shan } 119611685becSGavin Shan } 119711685becSGavin Shan } 119811685becSGavin Shan } 119911685becSGavin Shan 120011685becSGavin Shan static void __devinit pnv_pci_ioda_setup_seg(void) 120111685becSGavin Shan { 120211685becSGavin Shan struct pci_controller *tmp, *hose; 120311685becSGavin Shan struct pnv_phb *phb; 120411685becSGavin Shan struct pnv_ioda_pe *pe; 120511685becSGavin Shan 120611685becSGavin Shan list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { 120711685becSGavin Shan phb = hose->private_data; 120811685becSGavin Shan list_for_each_entry(pe, &phb->ioda.pe_list, list) { 120911685becSGavin Shan pnv_ioda_setup_pe_seg(hose, pe); 121011685becSGavin Shan } 121111685becSGavin Shan } 121211685becSGavin Shan } 121311685becSGavin Shan 121413395c48SGavin Shan static void __devinit pnv_pci_ioda_setup_DMA(void) 121513395c48SGavin Shan { 121613395c48SGavin Shan struct pci_controller *hose, *tmp; 1217db1266c8SGavin Shan struct pnv_phb *phb; 121813395c48SGavin Shan 121913395c48SGavin Shan list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { 122013395c48SGavin Shan pnv_ioda_setup_dma(hose->private_data); 1221db1266c8SGavin Shan 1222db1266c8SGavin Shan /* Mark the PHB initialization done */ 1223db1266c8SGavin Shan phb = hose->private_data; 1224db1266c8SGavin Shan phb->initialized = 1; 122513395c48SGavin Shan } 122613395c48SGavin Shan } 122713395c48SGavin Shan 1228fb446ad0SGavin Shan static void __devinit pnv_pci_ioda_fixup(void) 1229fb446ad0SGavin Shan { 1230fb446ad0SGavin Shan pnv_pci_ioda_setup_PEs(); 123111685becSGavin Shan pnv_pci_ioda_setup_seg(); 123213395c48SGavin Shan pnv_pci_ioda_setup_DMA(); 1233fb446ad0SGavin Shan } 1234fb446ad0SGavin Shan 1235271fd03aSGavin Shan /* 1236271fd03aSGavin Shan * Returns the alignment for I/O or memory windows for P2P 1237271fd03aSGavin Shan * bridges. That actually depends on how PEs are segmented. 1238271fd03aSGavin Shan * For now, we return I/O or M32 segment size for PE sensitive 1239271fd03aSGavin Shan * P2P bridges. Otherwise, the default values (4KiB for I/O, 1240271fd03aSGavin Shan * 1MiB for memory) will be returned. 1241271fd03aSGavin Shan * 1242271fd03aSGavin Shan * The current PCI bus might be put into one PE, which was 1243271fd03aSGavin Shan * create against the parent PCI bridge. For that case, we 1244271fd03aSGavin Shan * needn't enlarge the alignment so that we can save some 1245271fd03aSGavin Shan * resources. 1246271fd03aSGavin Shan */ 1247271fd03aSGavin Shan static resource_size_t pnv_pci_window_alignment(struct pci_bus *bus, 1248271fd03aSGavin Shan unsigned long type) 1249271fd03aSGavin Shan { 1250271fd03aSGavin Shan struct pci_dev *bridge; 1251271fd03aSGavin Shan struct pci_controller *hose = pci_bus_to_host(bus); 1252271fd03aSGavin Shan struct pnv_phb *phb = hose->private_data; 1253271fd03aSGavin Shan int num_pci_bridges = 0; 1254271fd03aSGavin Shan 1255271fd03aSGavin Shan bridge = bus->self; 1256271fd03aSGavin Shan while (bridge) { 1257271fd03aSGavin Shan if (pci_pcie_type(bridge) == PCI_EXP_TYPE_PCI_BRIDGE) { 1258271fd03aSGavin Shan num_pci_bridges++; 1259271fd03aSGavin Shan if (num_pci_bridges >= 2) 1260271fd03aSGavin Shan return 1; 1261271fd03aSGavin Shan } 1262271fd03aSGavin Shan 1263271fd03aSGavin Shan bridge = bridge->bus->self; 1264271fd03aSGavin Shan } 1265271fd03aSGavin Shan 1266271fd03aSGavin Shan /* We need support prefetchable memory window later */ 1267271fd03aSGavin Shan if (type & IORESOURCE_MEM) 1268271fd03aSGavin Shan return phb->ioda.m32_segsize; 1269271fd03aSGavin Shan 1270271fd03aSGavin Shan return phb->ioda.io_segsize; 1271271fd03aSGavin Shan } 1272271fd03aSGavin Shan 1273184cd4a3SBenjamin Herrenschmidt /* Prevent enabling devices for which we couldn't properly 1274184cd4a3SBenjamin Herrenschmidt * assign a PE 1275184cd4a3SBenjamin Herrenschmidt */ 1276184cd4a3SBenjamin Herrenschmidt static int __devinit pnv_pci_enable_device_hook(struct pci_dev *dev) 1277184cd4a3SBenjamin Herrenschmidt { 1278db1266c8SGavin Shan struct pci_controller *hose = pci_bus_to_host(dev->bus); 1279db1266c8SGavin Shan struct pnv_phb *phb = hose->private_data; 1280db1266c8SGavin Shan struct pci_dn *pdn; 1281184cd4a3SBenjamin Herrenschmidt 1282db1266c8SGavin Shan /* The function is probably called while the PEs have 1283db1266c8SGavin Shan * not be created yet. For example, resource reassignment 1284db1266c8SGavin Shan * during PCI probe period. We just skip the check if 1285db1266c8SGavin Shan * PEs isn't ready. 1286db1266c8SGavin Shan */ 1287db1266c8SGavin Shan if (!phb->initialized) 1288db1266c8SGavin Shan return 0; 1289db1266c8SGavin Shan 1290db1266c8SGavin Shan pdn = pnv_ioda_get_pdn(dev); 1291184cd4a3SBenjamin Herrenschmidt if (!pdn || pdn->pe_number == IODA_INVALID_PE) 1292184cd4a3SBenjamin Herrenschmidt return -EINVAL; 1293db1266c8SGavin Shan 1294184cd4a3SBenjamin Herrenschmidt return 0; 1295184cd4a3SBenjamin Herrenschmidt } 1296184cd4a3SBenjamin Herrenschmidt 1297184cd4a3SBenjamin Herrenschmidt static u32 pnv_ioda_bdfn_to_pe(struct pnv_phb *phb, struct pci_bus *bus, 1298184cd4a3SBenjamin Herrenschmidt u32 devfn) 1299184cd4a3SBenjamin Herrenschmidt { 1300184cd4a3SBenjamin Herrenschmidt return phb->ioda.pe_rmap[(bus->number << 8) | devfn]; 1301184cd4a3SBenjamin Herrenschmidt } 1302184cd4a3SBenjamin Herrenschmidt 1303184cd4a3SBenjamin Herrenschmidt void __init pnv_pci_init_ioda1_phb(struct device_node *np) 1304184cd4a3SBenjamin Herrenschmidt { 1305184cd4a3SBenjamin Herrenschmidt struct pci_controller *hose; 1306184cd4a3SBenjamin Herrenschmidt static int primary = 1; 1307184cd4a3SBenjamin Herrenschmidt struct pnv_phb *phb; 1308184cd4a3SBenjamin Herrenschmidt unsigned long size, m32map_off, iomap_off, pemap_off; 1309184cd4a3SBenjamin Herrenschmidt const u64 *prop64; 1310184cd4a3SBenjamin Herrenschmidt u64 phb_id; 1311184cd4a3SBenjamin Herrenschmidt void *aux; 1312184cd4a3SBenjamin Herrenschmidt long rc; 1313184cd4a3SBenjamin Herrenschmidt 1314184cd4a3SBenjamin Herrenschmidt pr_info(" Initializing IODA OPAL PHB %s\n", np->full_name); 1315184cd4a3SBenjamin Herrenschmidt 1316184cd4a3SBenjamin Herrenschmidt prop64 = of_get_property(np, "ibm,opal-phbid", NULL); 1317184cd4a3SBenjamin Herrenschmidt if (!prop64) { 1318184cd4a3SBenjamin Herrenschmidt pr_err(" Missing \"ibm,opal-phbid\" property !\n"); 1319184cd4a3SBenjamin Herrenschmidt return; 1320184cd4a3SBenjamin Herrenschmidt } 1321184cd4a3SBenjamin Herrenschmidt phb_id = be64_to_cpup(prop64); 1322184cd4a3SBenjamin Herrenschmidt pr_debug(" PHB-ID : 0x%016llx\n", phb_id); 1323184cd4a3SBenjamin Herrenschmidt 1324184cd4a3SBenjamin Herrenschmidt phb = alloc_bootmem(sizeof(struct pnv_phb)); 1325184cd4a3SBenjamin Herrenschmidt if (phb) { 1326184cd4a3SBenjamin Herrenschmidt memset(phb, 0, sizeof(struct pnv_phb)); 1327184cd4a3SBenjamin Herrenschmidt phb->hose = hose = pcibios_alloc_controller(np); 1328184cd4a3SBenjamin Herrenschmidt } 1329184cd4a3SBenjamin Herrenschmidt if (!phb || !phb->hose) { 1330184cd4a3SBenjamin Herrenschmidt pr_err("PCI: Failed to allocate PCI controller for %s\n", 1331184cd4a3SBenjamin Herrenschmidt np->full_name); 1332184cd4a3SBenjamin Herrenschmidt return; 1333184cd4a3SBenjamin Herrenschmidt } 1334184cd4a3SBenjamin Herrenschmidt 1335184cd4a3SBenjamin Herrenschmidt spin_lock_init(&phb->lock); 1336184cd4a3SBenjamin Herrenschmidt /* XXX Use device-tree */ 1337184cd4a3SBenjamin Herrenschmidt hose->first_busno = 0; 1338184cd4a3SBenjamin Herrenschmidt hose->last_busno = 0xff; 1339184cd4a3SBenjamin Herrenschmidt hose->private_data = phb; 1340184cd4a3SBenjamin Herrenschmidt phb->opal_id = phb_id; 1341184cd4a3SBenjamin Herrenschmidt phb->type = PNV_PHB_IODA1; 1342184cd4a3SBenjamin Herrenschmidt 1343cee72d5bSBenjamin Herrenschmidt /* Detect specific models for error handling */ 1344cee72d5bSBenjamin Herrenschmidt if (of_device_is_compatible(np, "ibm,p7ioc-pciex")) 1345cee72d5bSBenjamin Herrenschmidt phb->model = PNV_PHB_MODEL_P7IOC; 1346cee72d5bSBenjamin Herrenschmidt else 1347cee72d5bSBenjamin Herrenschmidt phb->model = PNV_PHB_MODEL_UNKNOWN; 1348cee72d5bSBenjamin Herrenschmidt 1349184cd4a3SBenjamin Herrenschmidt /* We parse "ranges" now since we need to deduce the register base 1350184cd4a3SBenjamin Herrenschmidt * from the IO base 1351184cd4a3SBenjamin Herrenschmidt */ 1352184cd4a3SBenjamin Herrenschmidt pci_process_bridge_OF_ranges(phb->hose, np, primary); 1353184cd4a3SBenjamin Herrenschmidt primary = 0; 1354184cd4a3SBenjamin Herrenschmidt 1355184cd4a3SBenjamin Herrenschmidt /* Magic formula from Milton */ 1356184cd4a3SBenjamin Herrenschmidt phb->regs = of_iomap(np, 0); 1357184cd4a3SBenjamin Herrenschmidt if (phb->regs == NULL) 1358184cd4a3SBenjamin Herrenschmidt pr_err(" Failed to map registers !\n"); 1359184cd4a3SBenjamin Herrenschmidt 1360184cd4a3SBenjamin Herrenschmidt 1361184cd4a3SBenjamin Herrenschmidt /* XXX This is hack-a-thon. This needs to be changed so that: 1362184cd4a3SBenjamin Herrenschmidt * - we obtain stuff like PE# etc... from device-tree 1363184cd4a3SBenjamin Herrenschmidt * - we properly re-allocate M32 ourselves 1364184cd4a3SBenjamin Herrenschmidt * (the OFW one isn't very good) 1365184cd4a3SBenjamin Herrenschmidt */ 1366184cd4a3SBenjamin Herrenschmidt 1367184cd4a3SBenjamin Herrenschmidt /* Initialize more IODA stuff */ 1368184cd4a3SBenjamin Herrenschmidt phb->ioda.total_pe = 128; 1369184cd4a3SBenjamin Herrenschmidt 1370184cd4a3SBenjamin Herrenschmidt phb->ioda.m32_size = resource_size(&hose->mem_resources[0]); 1371184cd4a3SBenjamin Herrenschmidt /* OFW Has already off top 64k of M32 space (MSI space) */ 1372184cd4a3SBenjamin Herrenschmidt phb->ioda.m32_size += 0x10000; 1373184cd4a3SBenjamin Herrenschmidt 1374184cd4a3SBenjamin Herrenschmidt phb->ioda.m32_segsize = phb->ioda.m32_size / phb->ioda.total_pe; 1375184cd4a3SBenjamin Herrenschmidt phb->ioda.m32_pci_base = hose->mem_resources[0].start - 1376184cd4a3SBenjamin Herrenschmidt hose->pci_mem_offset; 1377184cd4a3SBenjamin Herrenschmidt phb->ioda.io_size = hose->pci_io_size; 1378184cd4a3SBenjamin Herrenschmidt phb->ioda.io_segsize = phb->ioda.io_size / phb->ioda.total_pe; 1379184cd4a3SBenjamin Herrenschmidt phb->ioda.io_pci_base = 0; /* XXX calculate this ? */ 1380184cd4a3SBenjamin Herrenschmidt 1381184cd4a3SBenjamin Herrenschmidt /* Allocate aux data & arrays */ 1382184cd4a3SBenjamin Herrenschmidt size = _ALIGN_UP(phb->ioda.total_pe / 8, sizeof(unsigned long)); 1383184cd4a3SBenjamin Herrenschmidt m32map_off = size; 1384e47747f4SGavin Shan size += phb->ioda.total_pe * sizeof(phb->ioda.m32_segmap[0]); 1385184cd4a3SBenjamin Herrenschmidt iomap_off = size; 1386e47747f4SGavin Shan size += phb->ioda.total_pe * sizeof(phb->ioda.io_segmap[0]); 1387184cd4a3SBenjamin Herrenschmidt pemap_off = size; 1388184cd4a3SBenjamin Herrenschmidt size += phb->ioda.total_pe * sizeof(struct pnv_ioda_pe); 1389184cd4a3SBenjamin Herrenschmidt aux = alloc_bootmem(size); 1390184cd4a3SBenjamin Herrenschmidt memset(aux, 0, size); 1391184cd4a3SBenjamin Herrenschmidt phb->ioda.pe_alloc = aux; 1392184cd4a3SBenjamin Herrenschmidt phb->ioda.m32_segmap = aux + m32map_off; 1393184cd4a3SBenjamin Herrenschmidt phb->ioda.io_segmap = aux + iomap_off; 1394184cd4a3SBenjamin Herrenschmidt phb->ioda.pe_array = aux + pemap_off; 1395184cd4a3SBenjamin Herrenschmidt set_bit(0, phb->ioda.pe_alloc); 1396184cd4a3SBenjamin Herrenschmidt 13977ebdf956SGavin Shan INIT_LIST_HEAD(&phb->ioda.pe_dma_list); 1398184cd4a3SBenjamin Herrenschmidt INIT_LIST_HEAD(&phb->ioda.pe_list); 1399184cd4a3SBenjamin Herrenschmidt 1400184cd4a3SBenjamin Herrenschmidt /* Calculate how many 32-bit TCE segments we have */ 1401184cd4a3SBenjamin Herrenschmidt phb->ioda.tce32_count = phb->ioda.m32_pci_base >> 28; 1402184cd4a3SBenjamin Herrenschmidt 1403184cd4a3SBenjamin Herrenschmidt /* Clear unusable m64 */ 1404184cd4a3SBenjamin Herrenschmidt hose->mem_resources[1].flags = 0; 1405184cd4a3SBenjamin Herrenschmidt hose->mem_resources[1].start = 0; 1406184cd4a3SBenjamin Herrenschmidt hose->mem_resources[1].end = 0; 1407184cd4a3SBenjamin Herrenschmidt hose->mem_resources[2].flags = 0; 1408184cd4a3SBenjamin Herrenschmidt hose->mem_resources[2].start = 0; 1409184cd4a3SBenjamin Herrenschmidt hose->mem_resources[2].end = 0; 1410184cd4a3SBenjamin Herrenschmidt 1411184cd4a3SBenjamin Herrenschmidt #if 0 1412184cd4a3SBenjamin Herrenschmidt rc = opal_pci_set_phb_mem_window(opal->phb_id, 1413184cd4a3SBenjamin Herrenschmidt window_type, 1414184cd4a3SBenjamin Herrenschmidt window_num, 1415184cd4a3SBenjamin Herrenschmidt starting_real_address, 1416184cd4a3SBenjamin Herrenschmidt starting_pci_address, 1417184cd4a3SBenjamin Herrenschmidt segment_size); 1418184cd4a3SBenjamin Herrenschmidt #endif 1419184cd4a3SBenjamin Herrenschmidt 1420184cd4a3SBenjamin Herrenschmidt pr_info(" %d PE's M32: 0x%x [segment=0x%x] IO: 0x%x [segment=0x%x]\n", 1421184cd4a3SBenjamin Herrenschmidt phb->ioda.total_pe, 1422184cd4a3SBenjamin Herrenschmidt phb->ioda.m32_size, phb->ioda.m32_segsize, 1423184cd4a3SBenjamin Herrenschmidt phb->ioda.io_size, phb->ioda.io_segsize); 1424184cd4a3SBenjamin Herrenschmidt 1425184cd4a3SBenjamin Herrenschmidt if (phb->regs) { 1426184cd4a3SBenjamin Herrenschmidt pr_devel(" BUID = 0x%016llx\n", in_be64(phb->regs + 0x100)); 1427184cd4a3SBenjamin Herrenschmidt pr_devel(" PHB2_CR = 0x%016llx\n", in_be64(phb->regs + 0x160)); 1428184cd4a3SBenjamin Herrenschmidt pr_devel(" IO_BAR = 0x%016llx\n", in_be64(phb->regs + 0x170)); 1429184cd4a3SBenjamin Herrenschmidt pr_devel(" IO_BAMR = 0x%016llx\n", in_be64(phb->regs + 0x178)); 1430184cd4a3SBenjamin Herrenschmidt pr_devel(" IO_SAR = 0x%016llx\n", in_be64(phb->regs + 0x180)); 1431184cd4a3SBenjamin Herrenschmidt pr_devel(" M32_BAR = 0x%016llx\n", in_be64(phb->regs + 0x190)); 1432184cd4a3SBenjamin Herrenschmidt pr_devel(" M32_BAMR = 0x%016llx\n", in_be64(phb->regs + 0x198)); 1433184cd4a3SBenjamin Herrenschmidt pr_devel(" M32_SAR = 0x%016llx\n", in_be64(phb->regs + 0x1a0)); 1434184cd4a3SBenjamin Herrenschmidt } 1435184cd4a3SBenjamin Herrenschmidt phb->hose->ops = &pnv_pci_ops; 1436184cd4a3SBenjamin Herrenschmidt 1437184cd4a3SBenjamin Herrenschmidt /* Setup RID -> PE mapping function */ 1438184cd4a3SBenjamin Herrenschmidt phb->bdfn_to_pe = pnv_ioda_bdfn_to_pe; 1439184cd4a3SBenjamin Herrenschmidt 1440184cd4a3SBenjamin Herrenschmidt /* Setup TCEs */ 1441184cd4a3SBenjamin Herrenschmidt phb->dma_dev_setup = pnv_pci_ioda_dma_dev_setup; 1442184cd4a3SBenjamin Herrenschmidt 1443184cd4a3SBenjamin Herrenschmidt /* Setup MSI support */ 1444184cd4a3SBenjamin Herrenschmidt pnv_pci_init_ioda_msis(phb); 1445184cd4a3SBenjamin Herrenschmidt 1446c40a4210SGavin Shan /* 1447c40a4210SGavin Shan * We pass the PCI probe flag PCI_REASSIGN_ALL_RSRC here 1448c40a4210SGavin Shan * to let the PCI core do resource assignment. It's supposed 1449c40a4210SGavin Shan * that the PCI core will do correct I/O and MMIO alignment 1450c40a4210SGavin Shan * for the P2P bridge bars so that each PCI bus (excluding 1451c40a4210SGavin Shan * the child P2P bridges) can form individual PE. 1452184cd4a3SBenjamin Herrenschmidt */ 1453fb446ad0SGavin Shan ppc_md.pcibios_fixup = pnv_pci_ioda_fixup; 1454184cd4a3SBenjamin Herrenschmidt ppc_md.pcibios_enable_device_hook = pnv_pci_enable_device_hook; 1455271fd03aSGavin Shan ppc_md.pcibios_window_alignment = pnv_pci_window_alignment; 1456c40a4210SGavin Shan pci_add_flags(PCI_REASSIGN_ALL_RSRC); 1457184cd4a3SBenjamin Herrenschmidt 1458184cd4a3SBenjamin Herrenschmidt /* Reset IODA tables to a clean state */ 1459f11fe552SBenjamin Herrenschmidt rc = opal_pci_reset(phb_id, OPAL_PCI_IODA_TABLE_RESET, OPAL_ASSERT_RESET); 1460184cd4a3SBenjamin Herrenschmidt if (rc) 1461f11fe552SBenjamin Herrenschmidt pr_warning(" OPAL Error %ld performing IODA table reset !\n", rc); 1462184cd4a3SBenjamin Herrenschmidt opal_pci_set_pe(phb_id, 0, 0, 7, 1, 1 , OPAL_MAP_PE); 1463184cd4a3SBenjamin Herrenschmidt } 1464184cd4a3SBenjamin Herrenschmidt 1465184cd4a3SBenjamin Herrenschmidt void __init pnv_pci_init_ioda_hub(struct device_node *np) 1466184cd4a3SBenjamin Herrenschmidt { 1467184cd4a3SBenjamin Herrenschmidt struct device_node *phbn; 1468184cd4a3SBenjamin Herrenschmidt const u64 *prop64; 1469184cd4a3SBenjamin Herrenschmidt u64 hub_id; 1470184cd4a3SBenjamin Herrenschmidt 1471184cd4a3SBenjamin Herrenschmidt pr_info("Probing IODA IO-Hub %s\n", np->full_name); 1472184cd4a3SBenjamin Herrenschmidt 1473184cd4a3SBenjamin Herrenschmidt prop64 = of_get_property(np, "ibm,opal-hubid", NULL); 1474184cd4a3SBenjamin Herrenschmidt if (!prop64) { 1475184cd4a3SBenjamin Herrenschmidt pr_err(" Missing \"ibm,opal-hubid\" property !\n"); 1476184cd4a3SBenjamin Herrenschmidt return; 1477184cd4a3SBenjamin Herrenschmidt } 1478184cd4a3SBenjamin Herrenschmidt hub_id = be64_to_cpup(prop64); 1479184cd4a3SBenjamin Herrenschmidt pr_devel(" HUB-ID : 0x%016llx\n", hub_id); 1480184cd4a3SBenjamin Herrenschmidt 1481184cd4a3SBenjamin Herrenschmidt /* Count child PHBs */ 1482184cd4a3SBenjamin Herrenschmidt for_each_child_of_node(np, phbn) { 1483184cd4a3SBenjamin Herrenschmidt /* Look for IODA1 PHBs */ 1484184cd4a3SBenjamin Herrenschmidt if (of_device_is_compatible(phbn, "ibm,ioda-phb")) 1485184cd4a3SBenjamin Herrenschmidt pnv_pci_init_ioda1_phb(phbn); 1486184cd4a3SBenjamin Herrenschmidt } 1487184cd4a3SBenjamin Herrenschmidt } 1488