1 /* 2 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved. 3 * 4 * Authors: 5 * Alexander Graf <agraf@suse.de> 6 * Kevin Wolf <mail@kevin-wolf.de> 7 * 8 * Description: 9 * This file is derived from arch/powerpc/kvm/44x.c, 10 * by Hollis Blanchard <hollisb@us.ibm.com>. 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License, version 2, as 14 * published by the Free Software Foundation. 15 */ 16 17 #include <linux/kvm_host.h> 18 #include <linux/err.h> 19 #include <linux/export.h> 20 #include <linux/slab.h> 21 #include <linux/module.h> 22 #include <linux/miscdevice.h> 23 #include <linux/gfp.h> 24 #include <linux/sched.h> 25 #include <linux/vmalloc.h> 26 #include <linux/highmem.h> 27 28 #include <asm/reg.h> 29 #include <asm/cputable.h> 30 #include <asm/cacheflush.h> 31 #include <linux/uaccess.h> 32 #include <asm/io.h> 33 #include <asm/kvm_ppc.h> 34 #include <asm/kvm_book3s.h> 35 #include <asm/mmu_context.h> 36 #include <asm/page.h> 37 #include <asm/xive.h> 38 39 #include "book3s.h" 40 #include "trace.h" 41 42 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU 43 44 /* #define EXIT_DEBUG */ 45 46 struct kvm_stats_debugfs_item debugfs_entries[] = { 47 { "exits", VCPU_STAT(sum_exits) }, 48 { "mmio", VCPU_STAT(mmio_exits) }, 49 { "sig", VCPU_STAT(signal_exits) }, 50 { "sysc", VCPU_STAT(syscall_exits) }, 51 { "inst_emu", VCPU_STAT(emulated_inst_exits) }, 52 { "dec", VCPU_STAT(dec_exits) }, 53 { "ext_intr", VCPU_STAT(ext_intr_exits) }, 54 { "queue_intr", VCPU_STAT(queue_intr) }, 55 { "halt_poll_success_ns", VCPU_STAT(halt_poll_success_ns) }, 56 { "halt_poll_fail_ns", VCPU_STAT(halt_poll_fail_ns) }, 57 { "halt_wait_ns", VCPU_STAT(halt_wait_ns) }, 58 { "halt_successful_poll", VCPU_STAT(halt_successful_poll), }, 59 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll), }, 60 { "halt_successful_wait", VCPU_STAT(halt_successful_wait) }, 61 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) }, 62 { "halt_wakeup", VCPU_STAT(halt_wakeup) }, 63 { "pf_storage", VCPU_STAT(pf_storage) }, 64 { "sp_storage", VCPU_STAT(sp_storage) }, 65 { "pf_instruc", VCPU_STAT(pf_instruc) }, 66 { "sp_instruc", VCPU_STAT(sp_instruc) }, 67 { "ld", VCPU_STAT(ld) }, 68 { "ld_slow", VCPU_STAT(ld_slow) }, 69 { "st", VCPU_STAT(st) }, 70 { "st_slow", VCPU_STAT(st_slow) }, 71 { "pthru_all", VCPU_STAT(pthru_all) }, 72 { "pthru_host", VCPU_STAT(pthru_host) }, 73 { "pthru_bad_aff", VCPU_STAT(pthru_bad_aff) }, 74 { NULL } 75 }; 76 77 void kvmppc_unfixup_split_real(struct kvm_vcpu *vcpu) 78 { 79 if (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) { 80 ulong pc = kvmppc_get_pc(vcpu); 81 ulong lr = kvmppc_get_lr(vcpu); 82 if ((pc & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS) 83 kvmppc_set_pc(vcpu, pc & ~SPLIT_HACK_MASK); 84 if ((lr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS) 85 kvmppc_set_lr(vcpu, lr & ~SPLIT_HACK_MASK); 86 vcpu->arch.hflags &= ~BOOK3S_HFLAG_SPLIT_HACK; 87 } 88 } 89 EXPORT_SYMBOL_GPL(kvmppc_unfixup_split_real); 90 91 static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu) 92 { 93 if (!is_kvmppc_hv_enabled(vcpu->kvm)) 94 return to_book3s(vcpu)->hior; 95 return 0; 96 } 97 98 static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu, 99 unsigned long pending_now, unsigned long old_pending) 100 { 101 if (is_kvmppc_hv_enabled(vcpu->kvm)) 102 return; 103 if (pending_now) 104 kvmppc_set_int_pending(vcpu, 1); 105 else if (old_pending) 106 kvmppc_set_int_pending(vcpu, 0); 107 } 108 109 static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu) 110 { 111 ulong crit_raw; 112 ulong crit_r1; 113 bool crit; 114 115 if (is_kvmppc_hv_enabled(vcpu->kvm)) 116 return false; 117 118 crit_raw = kvmppc_get_critical(vcpu); 119 crit_r1 = kvmppc_get_gpr(vcpu, 1); 120 121 /* Truncate crit indicators in 32 bit mode */ 122 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) { 123 crit_raw &= 0xffffffff; 124 crit_r1 &= 0xffffffff; 125 } 126 127 /* Critical section when crit == r1 */ 128 crit = (crit_raw == crit_r1); 129 /* ... and we're in supervisor mode */ 130 crit = crit && !(kvmppc_get_msr(vcpu) & MSR_PR); 131 132 return crit; 133 } 134 135 void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags) 136 { 137 kvmppc_unfixup_split_real(vcpu); 138 kvmppc_set_srr0(vcpu, kvmppc_get_pc(vcpu)); 139 kvmppc_set_srr1(vcpu, (kvmppc_get_msr(vcpu) & ~0x783f0000ul) | flags); 140 kvmppc_set_pc(vcpu, kvmppc_interrupt_offset(vcpu) + vec); 141 vcpu->arch.mmu.reset_msr(vcpu); 142 } 143 144 static int kvmppc_book3s_vec2irqprio(unsigned int vec) 145 { 146 unsigned int prio; 147 148 switch (vec) { 149 case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET; break; 150 case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK; break; 151 case 0x300: prio = BOOK3S_IRQPRIO_DATA_STORAGE; break; 152 case 0x380: prio = BOOK3S_IRQPRIO_DATA_SEGMENT; break; 153 case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE; break; 154 case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT; break; 155 case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL; break; 156 case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT; break; 157 case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM; break; 158 case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL; break; 159 case 0x900: prio = BOOK3S_IRQPRIO_DECREMENTER; break; 160 case 0xc00: prio = BOOK3S_IRQPRIO_SYSCALL; break; 161 case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG; break; 162 case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC; break; 163 case 0xf40: prio = BOOK3S_IRQPRIO_VSX; break; 164 case 0xf60: prio = BOOK3S_IRQPRIO_FAC_UNAVAIL; break; 165 default: prio = BOOK3S_IRQPRIO_MAX; break; 166 } 167 168 return prio; 169 } 170 171 void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu, 172 unsigned int vec) 173 { 174 unsigned long old_pending = vcpu->arch.pending_exceptions; 175 176 clear_bit(kvmppc_book3s_vec2irqprio(vec), 177 &vcpu->arch.pending_exceptions); 178 179 kvmppc_update_int_pending(vcpu, vcpu->arch.pending_exceptions, 180 old_pending); 181 } 182 183 void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec) 184 { 185 vcpu->stat.queue_intr++; 186 187 set_bit(kvmppc_book3s_vec2irqprio(vec), 188 &vcpu->arch.pending_exceptions); 189 #ifdef EXIT_DEBUG 190 printk(KERN_INFO "Queueing interrupt %x\n", vec); 191 #endif 192 } 193 EXPORT_SYMBOL_GPL(kvmppc_book3s_queue_irqprio); 194 195 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags) 196 { 197 /* might as well deliver this straight away */ 198 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, flags); 199 } 200 EXPORT_SYMBOL_GPL(kvmppc_core_queue_program); 201 202 void kvmppc_core_queue_fpunavail(struct kvm_vcpu *vcpu) 203 { 204 /* might as well deliver this straight away */ 205 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, 0); 206 } 207 208 void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu) 209 { 210 /* might as well deliver this straight away */ 211 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_ALTIVEC, 0); 212 } 213 214 void kvmppc_core_queue_vsx_unavail(struct kvm_vcpu *vcpu) 215 { 216 /* might as well deliver this straight away */ 217 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_VSX, 0); 218 } 219 220 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu) 221 { 222 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER); 223 } 224 EXPORT_SYMBOL_GPL(kvmppc_core_queue_dec); 225 226 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu) 227 { 228 return test_bit(BOOK3S_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 229 } 230 EXPORT_SYMBOL_GPL(kvmppc_core_pending_dec); 231 232 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu) 233 { 234 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER); 235 } 236 EXPORT_SYMBOL_GPL(kvmppc_core_dequeue_dec); 237 238 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, 239 struct kvm_interrupt *irq) 240 { 241 /* 242 * This case (KVM_INTERRUPT_SET) should never actually arise for 243 * a pseries guest (because pseries guests expect their interrupt 244 * controllers to continue asserting an external interrupt request 245 * until it is acknowledged at the interrupt controller), but is 246 * included to avoid ABI breakage and potentially for other 247 * sorts of guest. 248 * 249 * There is a subtlety here: HV KVM does not test the 250 * external_oneshot flag in the code that synthesizes 251 * external interrupts for the guest just before entering 252 * the guest. That is OK even if userspace did do a 253 * KVM_INTERRUPT_SET on a pseries guest vcpu, because the 254 * caller (kvm_vcpu_ioctl_interrupt) does a kvm_vcpu_kick() 255 * which ends up doing a smp_send_reschedule(), which will 256 * pull the guest all the way out to the host, meaning that 257 * we will call kvmppc_core_prepare_to_enter() before entering 258 * the guest again, and that will handle the external_oneshot 259 * flag correctly. 260 */ 261 if (irq->irq == KVM_INTERRUPT_SET) 262 vcpu->arch.external_oneshot = 1; 263 264 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL); 265 } 266 267 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu) 268 { 269 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL); 270 } 271 272 void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, ulong dar, 273 ulong flags) 274 { 275 kvmppc_set_dar(vcpu, dar); 276 kvmppc_set_dsisr(vcpu, flags); 277 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE, 0); 278 } 279 EXPORT_SYMBOL_GPL(kvmppc_core_queue_data_storage); 280 281 void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong flags) 282 { 283 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_INST_STORAGE, flags); 284 } 285 EXPORT_SYMBOL_GPL(kvmppc_core_queue_inst_storage); 286 287 static int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu, 288 unsigned int priority) 289 { 290 int deliver = 1; 291 int vec = 0; 292 bool crit = kvmppc_critical_section(vcpu); 293 294 switch (priority) { 295 case BOOK3S_IRQPRIO_DECREMENTER: 296 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit; 297 vec = BOOK3S_INTERRUPT_DECREMENTER; 298 break; 299 case BOOK3S_IRQPRIO_EXTERNAL: 300 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit; 301 vec = BOOK3S_INTERRUPT_EXTERNAL; 302 break; 303 case BOOK3S_IRQPRIO_SYSTEM_RESET: 304 vec = BOOK3S_INTERRUPT_SYSTEM_RESET; 305 break; 306 case BOOK3S_IRQPRIO_MACHINE_CHECK: 307 vec = BOOK3S_INTERRUPT_MACHINE_CHECK; 308 break; 309 case BOOK3S_IRQPRIO_DATA_STORAGE: 310 vec = BOOK3S_INTERRUPT_DATA_STORAGE; 311 break; 312 case BOOK3S_IRQPRIO_INST_STORAGE: 313 vec = BOOK3S_INTERRUPT_INST_STORAGE; 314 break; 315 case BOOK3S_IRQPRIO_DATA_SEGMENT: 316 vec = BOOK3S_INTERRUPT_DATA_SEGMENT; 317 break; 318 case BOOK3S_IRQPRIO_INST_SEGMENT: 319 vec = BOOK3S_INTERRUPT_INST_SEGMENT; 320 break; 321 case BOOK3S_IRQPRIO_ALIGNMENT: 322 vec = BOOK3S_INTERRUPT_ALIGNMENT; 323 break; 324 case BOOK3S_IRQPRIO_PROGRAM: 325 vec = BOOK3S_INTERRUPT_PROGRAM; 326 break; 327 case BOOK3S_IRQPRIO_VSX: 328 vec = BOOK3S_INTERRUPT_VSX; 329 break; 330 case BOOK3S_IRQPRIO_ALTIVEC: 331 vec = BOOK3S_INTERRUPT_ALTIVEC; 332 break; 333 case BOOK3S_IRQPRIO_FP_UNAVAIL: 334 vec = BOOK3S_INTERRUPT_FP_UNAVAIL; 335 break; 336 case BOOK3S_IRQPRIO_SYSCALL: 337 vec = BOOK3S_INTERRUPT_SYSCALL; 338 break; 339 case BOOK3S_IRQPRIO_DEBUG: 340 vec = BOOK3S_INTERRUPT_TRACE; 341 break; 342 case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR: 343 vec = BOOK3S_INTERRUPT_PERFMON; 344 break; 345 case BOOK3S_IRQPRIO_FAC_UNAVAIL: 346 vec = BOOK3S_INTERRUPT_FAC_UNAVAIL; 347 break; 348 default: 349 deliver = 0; 350 printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority); 351 break; 352 } 353 354 #if 0 355 printk(KERN_INFO "Deliver interrupt 0x%x? %x\n", vec, deliver); 356 #endif 357 358 if (deliver) 359 kvmppc_inject_interrupt(vcpu, vec, 0); 360 361 return deliver; 362 } 363 364 /* 365 * This function determines if an irqprio should be cleared once issued. 366 */ 367 static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority) 368 { 369 switch (priority) { 370 case BOOK3S_IRQPRIO_DECREMENTER: 371 /* DEC interrupts get cleared by mtdec */ 372 return false; 373 case BOOK3S_IRQPRIO_EXTERNAL: 374 /* 375 * External interrupts get cleared by userspace 376 * except when set by the KVM_INTERRUPT ioctl with 377 * KVM_INTERRUPT_SET (not KVM_INTERRUPT_SET_LEVEL). 378 */ 379 if (vcpu->arch.external_oneshot) { 380 vcpu->arch.external_oneshot = 0; 381 return true; 382 } 383 return false; 384 } 385 386 return true; 387 } 388 389 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu) 390 { 391 unsigned long *pending = &vcpu->arch.pending_exceptions; 392 unsigned long old_pending = vcpu->arch.pending_exceptions; 393 unsigned int priority; 394 395 #ifdef EXIT_DEBUG 396 if (vcpu->arch.pending_exceptions) 397 printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions); 398 #endif 399 priority = __ffs(*pending); 400 while (priority < BOOK3S_IRQPRIO_MAX) { 401 if (kvmppc_book3s_irqprio_deliver(vcpu, priority) && 402 clear_irqprio(vcpu, priority)) { 403 clear_bit(priority, &vcpu->arch.pending_exceptions); 404 break; 405 } 406 407 priority = find_next_bit(pending, 408 BITS_PER_BYTE * sizeof(*pending), 409 priority + 1); 410 } 411 412 /* Tell the guest about our interrupt status */ 413 kvmppc_update_int_pending(vcpu, *pending, old_pending); 414 415 return 0; 416 } 417 EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter); 418 419 kvm_pfn_t kvmppc_gpa_to_pfn(struct kvm_vcpu *vcpu, gpa_t gpa, bool writing, 420 bool *writable) 421 { 422 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM; 423 gfn_t gfn = gpa >> PAGE_SHIFT; 424 425 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) 426 mp_pa = (uint32_t)mp_pa; 427 428 /* Magic page override */ 429 gpa &= ~0xFFFULL; 430 if (unlikely(mp_pa) && unlikely((gpa & KVM_PAM) == mp_pa)) { 431 ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK; 432 kvm_pfn_t pfn; 433 434 pfn = (kvm_pfn_t)virt_to_phys((void*)shared_page) >> PAGE_SHIFT; 435 get_page(pfn_to_page(pfn)); 436 if (writable) 437 *writable = true; 438 return pfn; 439 } 440 441 return gfn_to_pfn_prot(vcpu->kvm, gfn, writing, writable); 442 } 443 EXPORT_SYMBOL_GPL(kvmppc_gpa_to_pfn); 444 445 int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid, 446 enum xlate_readwrite xlrw, struct kvmppc_pte *pte) 447 { 448 bool data = (xlid == XLATE_DATA); 449 bool iswrite = (xlrw == XLATE_WRITE); 450 int relocated = (kvmppc_get_msr(vcpu) & (data ? MSR_DR : MSR_IR)); 451 int r; 452 453 if (relocated) { 454 r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data, iswrite); 455 } else { 456 pte->eaddr = eaddr; 457 pte->raddr = eaddr & KVM_PAM; 458 pte->vpage = VSID_REAL | eaddr >> 12; 459 pte->may_read = true; 460 pte->may_write = true; 461 pte->may_execute = true; 462 r = 0; 463 464 if ((kvmppc_get_msr(vcpu) & (MSR_IR | MSR_DR)) == MSR_DR && 465 !data) { 466 if ((vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) && 467 ((eaddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS)) 468 pte->raddr &= ~SPLIT_HACK_MASK; 469 } 470 } 471 472 return r; 473 } 474 475 int kvmppc_load_last_inst(struct kvm_vcpu *vcpu, 476 enum instruction_fetch_type type, u32 *inst) 477 { 478 ulong pc = kvmppc_get_pc(vcpu); 479 int r; 480 481 if (type == INST_SC) 482 pc -= 4; 483 484 r = kvmppc_ld(vcpu, &pc, sizeof(u32), inst, false); 485 if (r == EMULATE_DONE) 486 return r; 487 else 488 return EMULATE_AGAIN; 489 } 490 EXPORT_SYMBOL_GPL(kvmppc_load_last_inst); 491 492 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) 493 { 494 return 0; 495 } 496 497 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu) 498 { 499 return 0; 500 } 501 502 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu) 503 { 504 } 505 506 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, 507 struct kvm_sregs *sregs) 508 { 509 int ret; 510 511 vcpu_load(vcpu); 512 ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs); 513 vcpu_put(vcpu); 514 515 return ret; 516 } 517 518 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, 519 struct kvm_sregs *sregs) 520 { 521 int ret; 522 523 vcpu_load(vcpu); 524 ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs); 525 vcpu_put(vcpu); 526 527 return ret; 528 } 529 530 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 531 { 532 int i; 533 534 regs->pc = kvmppc_get_pc(vcpu); 535 regs->cr = kvmppc_get_cr(vcpu); 536 regs->ctr = kvmppc_get_ctr(vcpu); 537 regs->lr = kvmppc_get_lr(vcpu); 538 regs->xer = kvmppc_get_xer(vcpu); 539 regs->msr = kvmppc_get_msr(vcpu); 540 regs->srr0 = kvmppc_get_srr0(vcpu); 541 regs->srr1 = kvmppc_get_srr1(vcpu); 542 regs->pid = vcpu->arch.pid; 543 regs->sprg0 = kvmppc_get_sprg0(vcpu); 544 regs->sprg1 = kvmppc_get_sprg1(vcpu); 545 regs->sprg2 = kvmppc_get_sprg2(vcpu); 546 regs->sprg3 = kvmppc_get_sprg3(vcpu); 547 regs->sprg4 = kvmppc_get_sprg4(vcpu); 548 regs->sprg5 = kvmppc_get_sprg5(vcpu); 549 regs->sprg6 = kvmppc_get_sprg6(vcpu); 550 regs->sprg7 = kvmppc_get_sprg7(vcpu); 551 552 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 553 regs->gpr[i] = kvmppc_get_gpr(vcpu, i); 554 555 return 0; 556 } 557 558 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 559 { 560 int i; 561 562 kvmppc_set_pc(vcpu, regs->pc); 563 kvmppc_set_cr(vcpu, regs->cr); 564 kvmppc_set_ctr(vcpu, regs->ctr); 565 kvmppc_set_lr(vcpu, regs->lr); 566 kvmppc_set_xer(vcpu, regs->xer); 567 kvmppc_set_msr(vcpu, regs->msr); 568 kvmppc_set_srr0(vcpu, regs->srr0); 569 kvmppc_set_srr1(vcpu, regs->srr1); 570 kvmppc_set_sprg0(vcpu, regs->sprg0); 571 kvmppc_set_sprg1(vcpu, regs->sprg1); 572 kvmppc_set_sprg2(vcpu, regs->sprg2); 573 kvmppc_set_sprg3(vcpu, regs->sprg3); 574 kvmppc_set_sprg4(vcpu, regs->sprg4); 575 kvmppc_set_sprg5(vcpu, regs->sprg5); 576 kvmppc_set_sprg6(vcpu, regs->sprg6); 577 kvmppc_set_sprg7(vcpu, regs->sprg7); 578 579 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 580 kvmppc_set_gpr(vcpu, i, regs->gpr[i]); 581 582 return 0; 583 } 584 585 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 586 { 587 return -ENOTSUPP; 588 } 589 590 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 591 { 592 return -ENOTSUPP; 593 } 594 595 int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id, 596 union kvmppc_one_reg *val) 597 { 598 int r = 0; 599 long int i; 600 601 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val); 602 if (r == -EINVAL) { 603 r = 0; 604 switch (id) { 605 case KVM_REG_PPC_DAR: 606 *val = get_reg_val(id, kvmppc_get_dar(vcpu)); 607 break; 608 case KVM_REG_PPC_DSISR: 609 *val = get_reg_val(id, kvmppc_get_dsisr(vcpu)); 610 break; 611 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31: 612 i = id - KVM_REG_PPC_FPR0; 613 *val = get_reg_val(id, VCPU_FPR(vcpu, i)); 614 break; 615 case KVM_REG_PPC_FPSCR: 616 *val = get_reg_val(id, vcpu->arch.fp.fpscr); 617 break; 618 #ifdef CONFIG_VSX 619 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31: 620 if (cpu_has_feature(CPU_FTR_VSX)) { 621 i = id - KVM_REG_PPC_VSR0; 622 val->vsxval[0] = vcpu->arch.fp.fpr[i][0]; 623 val->vsxval[1] = vcpu->arch.fp.fpr[i][1]; 624 } else { 625 r = -ENXIO; 626 } 627 break; 628 #endif /* CONFIG_VSX */ 629 case KVM_REG_PPC_DEBUG_INST: 630 *val = get_reg_val(id, INS_TW); 631 break; 632 #ifdef CONFIG_KVM_XICS 633 case KVM_REG_PPC_ICP_STATE: 634 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) { 635 r = -ENXIO; 636 break; 637 } 638 if (xive_enabled()) 639 *val = get_reg_val(id, kvmppc_xive_get_icp(vcpu)); 640 else 641 *val = get_reg_val(id, kvmppc_xics_get_icp(vcpu)); 642 break; 643 #endif /* CONFIG_KVM_XICS */ 644 case KVM_REG_PPC_FSCR: 645 *val = get_reg_val(id, vcpu->arch.fscr); 646 break; 647 case KVM_REG_PPC_TAR: 648 *val = get_reg_val(id, vcpu->arch.tar); 649 break; 650 case KVM_REG_PPC_EBBHR: 651 *val = get_reg_val(id, vcpu->arch.ebbhr); 652 break; 653 case KVM_REG_PPC_EBBRR: 654 *val = get_reg_val(id, vcpu->arch.ebbrr); 655 break; 656 case KVM_REG_PPC_BESCR: 657 *val = get_reg_val(id, vcpu->arch.bescr); 658 break; 659 case KVM_REG_PPC_IC: 660 *val = get_reg_val(id, vcpu->arch.ic); 661 break; 662 default: 663 r = -EINVAL; 664 break; 665 } 666 } 667 668 return r; 669 } 670 671 int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id, 672 union kvmppc_one_reg *val) 673 { 674 int r = 0; 675 long int i; 676 677 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val); 678 if (r == -EINVAL) { 679 r = 0; 680 switch (id) { 681 case KVM_REG_PPC_DAR: 682 kvmppc_set_dar(vcpu, set_reg_val(id, *val)); 683 break; 684 case KVM_REG_PPC_DSISR: 685 kvmppc_set_dsisr(vcpu, set_reg_val(id, *val)); 686 break; 687 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31: 688 i = id - KVM_REG_PPC_FPR0; 689 VCPU_FPR(vcpu, i) = set_reg_val(id, *val); 690 break; 691 case KVM_REG_PPC_FPSCR: 692 vcpu->arch.fp.fpscr = set_reg_val(id, *val); 693 break; 694 #ifdef CONFIG_VSX 695 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31: 696 if (cpu_has_feature(CPU_FTR_VSX)) { 697 i = id - KVM_REG_PPC_VSR0; 698 vcpu->arch.fp.fpr[i][0] = val->vsxval[0]; 699 vcpu->arch.fp.fpr[i][1] = val->vsxval[1]; 700 } else { 701 r = -ENXIO; 702 } 703 break; 704 #endif /* CONFIG_VSX */ 705 #ifdef CONFIG_KVM_XICS 706 case KVM_REG_PPC_ICP_STATE: 707 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) { 708 r = -ENXIO; 709 break; 710 } 711 if (xive_enabled()) 712 r = kvmppc_xive_set_icp(vcpu, set_reg_val(id, *val)); 713 else 714 r = kvmppc_xics_set_icp(vcpu, set_reg_val(id, *val)); 715 break; 716 #endif /* CONFIG_KVM_XICS */ 717 case KVM_REG_PPC_FSCR: 718 vcpu->arch.fscr = set_reg_val(id, *val); 719 break; 720 case KVM_REG_PPC_TAR: 721 vcpu->arch.tar = set_reg_val(id, *val); 722 break; 723 case KVM_REG_PPC_EBBHR: 724 vcpu->arch.ebbhr = set_reg_val(id, *val); 725 break; 726 case KVM_REG_PPC_EBBRR: 727 vcpu->arch.ebbrr = set_reg_val(id, *val); 728 break; 729 case KVM_REG_PPC_BESCR: 730 vcpu->arch.bescr = set_reg_val(id, *val); 731 break; 732 case KVM_REG_PPC_IC: 733 vcpu->arch.ic = set_reg_val(id, *val); 734 break; 735 default: 736 r = -EINVAL; 737 break; 738 } 739 } 740 741 return r; 742 } 743 744 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 745 { 746 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu); 747 } 748 749 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu) 750 { 751 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu); 752 } 753 754 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr) 755 { 756 vcpu->kvm->arch.kvm_ops->set_msr(vcpu, msr); 757 } 758 EXPORT_SYMBOL_GPL(kvmppc_set_msr); 759 760 int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) 761 { 762 return vcpu->kvm->arch.kvm_ops->vcpu_run(kvm_run, vcpu); 763 } 764 765 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, 766 struct kvm_translation *tr) 767 { 768 return 0; 769 } 770 771 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu, 772 struct kvm_guest_debug *dbg) 773 { 774 vcpu_load(vcpu); 775 vcpu->guest_debug = dbg->control; 776 vcpu_put(vcpu); 777 return 0; 778 } 779 780 void kvmppc_decrementer_func(struct kvm_vcpu *vcpu) 781 { 782 kvmppc_core_queue_dec(vcpu); 783 kvm_vcpu_kick(vcpu); 784 } 785 786 struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id) 787 { 788 return kvm->arch.kvm_ops->vcpu_create(kvm, id); 789 } 790 791 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu) 792 { 793 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu); 794 } 795 796 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu) 797 { 798 return vcpu->kvm->arch.kvm_ops->check_requests(vcpu); 799 } 800 801 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log) 802 { 803 return kvm->arch.kvm_ops->get_dirty_log(kvm, log); 804 } 805 806 void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free, 807 struct kvm_memory_slot *dont) 808 { 809 kvm->arch.kvm_ops->free_memslot(free, dont); 810 } 811 812 int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot, 813 unsigned long npages) 814 { 815 return kvm->arch.kvm_ops->create_memslot(slot, npages); 816 } 817 818 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot) 819 { 820 kvm->arch.kvm_ops->flush_memslot(kvm, memslot); 821 } 822 823 int kvmppc_core_prepare_memory_region(struct kvm *kvm, 824 struct kvm_memory_slot *memslot, 825 const struct kvm_userspace_memory_region *mem) 826 { 827 return kvm->arch.kvm_ops->prepare_memory_region(kvm, memslot, mem); 828 } 829 830 void kvmppc_core_commit_memory_region(struct kvm *kvm, 831 const struct kvm_userspace_memory_region *mem, 832 const struct kvm_memory_slot *old, 833 const struct kvm_memory_slot *new) 834 { 835 kvm->arch.kvm_ops->commit_memory_region(kvm, mem, old, new); 836 } 837 838 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end) 839 { 840 return kvm->arch.kvm_ops->unmap_hva_range(kvm, start, end); 841 } 842 843 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end) 844 { 845 return kvm->arch.kvm_ops->age_hva(kvm, start, end); 846 } 847 848 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva) 849 { 850 return kvm->arch.kvm_ops->test_age_hva(kvm, hva); 851 } 852 853 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte) 854 { 855 kvm->arch.kvm_ops->set_spte_hva(kvm, hva, pte); 856 } 857 858 void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu) 859 { 860 vcpu->kvm->arch.kvm_ops->mmu_destroy(vcpu); 861 } 862 863 int kvmppc_core_init_vm(struct kvm *kvm) 864 { 865 866 #ifdef CONFIG_PPC64 867 INIT_LIST_HEAD_RCU(&kvm->arch.spapr_tce_tables); 868 INIT_LIST_HEAD(&kvm->arch.rtas_tokens); 869 #endif 870 871 return kvm->arch.kvm_ops->init_vm(kvm); 872 } 873 874 void kvmppc_core_destroy_vm(struct kvm *kvm) 875 { 876 kvm->arch.kvm_ops->destroy_vm(kvm); 877 878 #ifdef CONFIG_PPC64 879 kvmppc_rtas_tokens_free(kvm); 880 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables)); 881 #endif 882 } 883 884 int kvmppc_h_logical_ci_load(struct kvm_vcpu *vcpu) 885 { 886 unsigned long size = kvmppc_get_gpr(vcpu, 4); 887 unsigned long addr = kvmppc_get_gpr(vcpu, 5); 888 u64 buf; 889 int srcu_idx; 890 int ret; 891 892 if (!is_power_of_2(size) || (size > sizeof(buf))) 893 return H_TOO_HARD; 894 895 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 896 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, size, &buf); 897 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 898 if (ret != 0) 899 return H_TOO_HARD; 900 901 switch (size) { 902 case 1: 903 kvmppc_set_gpr(vcpu, 4, *(u8 *)&buf); 904 break; 905 906 case 2: 907 kvmppc_set_gpr(vcpu, 4, be16_to_cpu(*(__be16 *)&buf)); 908 break; 909 910 case 4: 911 kvmppc_set_gpr(vcpu, 4, be32_to_cpu(*(__be32 *)&buf)); 912 break; 913 914 case 8: 915 kvmppc_set_gpr(vcpu, 4, be64_to_cpu(*(__be64 *)&buf)); 916 break; 917 918 default: 919 BUG(); 920 } 921 922 return H_SUCCESS; 923 } 924 EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_load); 925 926 int kvmppc_h_logical_ci_store(struct kvm_vcpu *vcpu) 927 { 928 unsigned long size = kvmppc_get_gpr(vcpu, 4); 929 unsigned long addr = kvmppc_get_gpr(vcpu, 5); 930 unsigned long val = kvmppc_get_gpr(vcpu, 6); 931 u64 buf; 932 int srcu_idx; 933 int ret; 934 935 switch (size) { 936 case 1: 937 *(u8 *)&buf = val; 938 break; 939 940 case 2: 941 *(__be16 *)&buf = cpu_to_be16(val); 942 break; 943 944 case 4: 945 *(__be32 *)&buf = cpu_to_be32(val); 946 break; 947 948 case 8: 949 *(__be64 *)&buf = cpu_to_be64(val); 950 break; 951 952 default: 953 return H_TOO_HARD; 954 } 955 956 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 957 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, size, &buf); 958 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 959 if (ret != 0) 960 return H_TOO_HARD; 961 962 return H_SUCCESS; 963 } 964 EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_store); 965 966 int kvmppc_core_check_processor_compat(void) 967 { 968 /* 969 * We always return 0 for book3s. We check 970 * for compatibility while loading the HV 971 * or PR module 972 */ 973 return 0; 974 } 975 976 int kvmppc_book3s_hcall_implemented(struct kvm *kvm, unsigned long hcall) 977 { 978 return kvm->arch.kvm_ops->hcall_implemented(hcall); 979 } 980 981 #ifdef CONFIG_KVM_XICS 982 int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level, 983 bool line_status) 984 { 985 if (xive_enabled()) 986 return kvmppc_xive_set_irq(kvm, irq_source_id, irq, level, 987 line_status); 988 else 989 return kvmppc_xics_set_irq(kvm, irq_source_id, irq, level, 990 line_status); 991 } 992 993 int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *irq_entry, 994 struct kvm *kvm, int irq_source_id, 995 int level, bool line_status) 996 { 997 return kvm_set_irq(kvm, irq_source_id, irq_entry->gsi, 998 level, line_status); 999 } 1000 static int kvmppc_book3s_set_irq(struct kvm_kernel_irq_routing_entry *e, 1001 struct kvm *kvm, int irq_source_id, int level, 1002 bool line_status) 1003 { 1004 return kvm_set_irq(kvm, irq_source_id, e->gsi, level, line_status); 1005 } 1006 1007 int kvm_irq_map_gsi(struct kvm *kvm, 1008 struct kvm_kernel_irq_routing_entry *entries, int gsi) 1009 { 1010 entries->gsi = gsi; 1011 entries->type = KVM_IRQ_ROUTING_IRQCHIP; 1012 entries->set = kvmppc_book3s_set_irq; 1013 entries->irqchip.irqchip = 0; 1014 entries->irqchip.pin = gsi; 1015 return 1; 1016 } 1017 1018 int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin) 1019 { 1020 return pin; 1021 } 1022 1023 #endif /* CONFIG_KVM_XICS */ 1024 1025 static int kvmppc_book3s_init(void) 1026 { 1027 int r; 1028 1029 r = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE); 1030 if (r) 1031 return r; 1032 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER 1033 r = kvmppc_book3s_init_pr(); 1034 #endif 1035 1036 #ifdef CONFIG_KVM_XICS 1037 #ifdef CONFIG_KVM_XIVE 1038 if (xive_enabled()) { 1039 kvmppc_xive_init_module(); 1040 kvm_register_device_ops(&kvm_xive_ops, KVM_DEV_TYPE_XICS); 1041 } else 1042 #endif 1043 kvm_register_device_ops(&kvm_xics_ops, KVM_DEV_TYPE_XICS); 1044 #endif 1045 return r; 1046 } 1047 1048 static void kvmppc_book3s_exit(void) 1049 { 1050 #ifdef CONFIG_KVM_XICS 1051 if (xive_enabled()) 1052 kvmppc_xive_exit_module(); 1053 #endif 1054 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER 1055 kvmppc_book3s_exit_pr(); 1056 #endif 1057 kvm_exit(); 1058 } 1059 1060 module_init(kvmppc_book3s_init); 1061 module_exit(kvmppc_book3s_exit); 1062 1063 /* On 32bit this is our one and only kernel module */ 1064 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER 1065 MODULE_ALIAS_MISCDEV(KVM_MINOR); 1066 MODULE_ALIAS("devname:kvm"); 1067 #endif 1068