1 /* 2 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved. 3 * 4 * Authors: 5 * Alexander Graf <agraf@suse.de> 6 * Kevin Wolf <mail@kevin-wolf.de> 7 * 8 * Description: 9 * This file is derived from arch/powerpc/kvm/44x.c, 10 * by Hollis Blanchard <hollisb@us.ibm.com>. 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License, version 2, as 14 * published by the Free Software Foundation. 15 */ 16 17 #include <linux/kvm_host.h> 18 #include <linux/err.h> 19 #include <linux/export.h> 20 #include <linux/slab.h> 21 #include <linux/module.h> 22 #include <linux/miscdevice.h> 23 #include <linux/gfp.h> 24 #include <linux/sched.h> 25 #include <linux/vmalloc.h> 26 #include <linux/highmem.h> 27 28 #include <asm/reg.h> 29 #include <asm/cputable.h> 30 #include <asm/cacheflush.h> 31 #include <linux/uaccess.h> 32 #include <asm/io.h> 33 #include <asm/kvm_ppc.h> 34 #include <asm/kvm_book3s.h> 35 #include <asm/mmu_context.h> 36 #include <asm/page.h> 37 #include <asm/xive.h> 38 39 #include "book3s.h" 40 #include "trace.h" 41 42 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM 43 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU 44 45 /* #define EXIT_DEBUG */ 46 47 struct kvm_stats_debugfs_item debugfs_entries[] = { 48 { "exits", VCPU_STAT(sum_exits) }, 49 { "mmio", VCPU_STAT(mmio_exits) }, 50 { "sig", VCPU_STAT(signal_exits) }, 51 { "sysc", VCPU_STAT(syscall_exits) }, 52 { "inst_emu", VCPU_STAT(emulated_inst_exits) }, 53 { "dec", VCPU_STAT(dec_exits) }, 54 { "ext_intr", VCPU_STAT(ext_intr_exits) }, 55 { "queue_intr", VCPU_STAT(queue_intr) }, 56 { "halt_poll_success_ns", VCPU_STAT(halt_poll_success_ns) }, 57 { "halt_poll_fail_ns", VCPU_STAT(halt_poll_fail_ns) }, 58 { "halt_wait_ns", VCPU_STAT(halt_wait_ns) }, 59 { "halt_successful_poll", VCPU_STAT(halt_successful_poll), }, 60 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll), }, 61 { "halt_successful_wait", VCPU_STAT(halt_successful_wait) }, 62 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) }, 63 { "halt_wakeup", VCPU_STAT(halt_wakeup) }, 64 { "pf_storage", VCPU_STAT(pf_storage) }, 65 { "sp_storage", VCPU_STAT(sp_storage) }, 66 { "pf_instruc", VCPU_STAT(pf_instruc) }, 67 { "sp_instruc", VCPU_STAT(sp_instruc) }, 68 { "ld", VCPU_STAT(ld) }, 69 { "ld_slow", VCPU_STAT(ld_slow) }, 70 { "st", VCPU_STAT(st) }, 71 { "st_slow", VCPU_STAT(st_slow) }, 72 { "pthru_all", VCPU_STAT(pthru_all) }, 73 { "pthru_host", VCPU_STAT(pthru_host) }, 74 { "pthru_bad_aff", VCPU_STAT(pthru_bad_aff) }, 75 { "largepages_2M", VM_STAT(num_2M_pages) }, 76 { "largepages_1G", VM_STAT(num_1G_pages) }, 77 { NULL } 78 }; 79 80 void kvmppc_unfixup_split_real(struct kvm_vcpu *vcpu) 81 { 82 if (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) { 83 ulong pc = kvmppc_get_pc(vcpu); 84 ulong lr = kvmppc_get_lr(vcpu); 85 if ((pc & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS) 86 kvmppc_set_pc(vcpu, pc & ~SPLIT_HACK_MASK); 87 if ((lr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS) 88 kvmppc_set_lr(vcpu, lr & ~SPLIT_HACK_MASK); 89 vcpu->arch.hflags &= ~BOOK3S_HFLAG_SPLIT_HACK; 90 } 91 } 92 EXPORT_SYMBOL_GPL(kvmppc_unfixup_split_real); 93 94 static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu) 95 { 96 if (!is_kvmppc_hv_enabled(vcpu->kvm)) 97 return to_book3s(vcpu)->hior; 98 return 0; 99 } 100 101 static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu, 102 unsigned long pending_now, unsigned long old_pending) 103 { 104 if (is_kvmppc_hv_enabled(vcpu->kvm)) 105 return; 106 if (pending_now) 107 kvmppc_set_int_pending(vcpu, 1); 108 else if (old_pending) 109 kvmppc_set_int_pending(vcpu, 0); 110 } 111 112 static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu) 113 { 114 ulong crit_raw; 115 ulong crit_r1; 116 bool crit; 117 118 if (is_kvmppc_hv_enabled(vcpu->kvm)) 119 return false; 120 121 crit_raw = kvmppc_get_critical(vcpu); 122 crit_r1 = kvmppc_get_gpr(vcpu, 1); 123 124 /* Truncate crit indicators in 32 bit mode */ 125 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) { 126 crit_raw &= 0xffffffff; 127 crit_r1 &= 0xffffffff; 128 } 129 130 /* Critical section when crit == r1 */ 131 crit = (crit_raw == crit_r1); 132 /* ... and we're in supervisor mode */ 133 crit = crit && !(kvmppc_get_msr(vcpu) & MSR_PR); 134 135 return crit; 136 } 137 138 void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags) 139 { 140 kvmppc_unfixup_split_real(vcpu); 141 kvmppc_set_srr0(vcpu, kvmppc_get_pc(vcpu)); 142 kvmppc_set_srr1(vcpu, (kvmppc_get_msr(vcpu) & ~0x783f0000ul) | flags); 143 kvmppc_set_pc(vcpu, kvmppc_interrupt_offset(vcpu) + vec); 144 vcpu->arch.mmu.reset_msr(vcpu); 145 } 146 147 static int kvmppc_book3s_vec2irqprio(unsigned int vec) 148 { 149 unsigned int prio; 150 151 switch (vec) { 152 case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET; break; 153 case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK; break; 154 case 0x300: prio = BOOK3S_IRQPRIO_DATA_STORAGE; break; 155 case 0x380: prio = BOOK3S_IRQPRIO_DATA_SEGMENT; break; 156 case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE; break; 157 case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT; break; 158 case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL; break; 159 case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT; break; 160 case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM; break; 161 case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL; break; 162 case 0x900: prio = BOOK3S_IRQPRIO_DECREMENTER; break; 163 case 0xc00: prio = BOOK3S_IRQPRIO_SYSCALL; break; 164 case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG; break; 165 case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC; break; 166 case 0xf40: prio = BOOK3S_IRQPRIO_VSX; break; 167 case 0xf60: prio = BOOK3S_IRQPRIO_FAC_UNAVAIL; break; 168 default: prio = BOOK3S_IRQPRIO_MAX; break; 169 } 170 171 return prio; 172 } 173 174 void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu, 175 unsigned int vec) 176 { 177 unsigned long old_pending = vcpu->arch.pending_exceptions; 178 179 clear_bit(kvmppc_book3s_vec2irqprio(vec), 180 &vcpu->arch.pending_exceptions); 181 182 kvmppc_update_int_pending(vcpu, vcpu->arch.pending_exceptions, 183 old_pending); 184 } 185 186 void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec) 187 { 188 vcpu->stat.queue_intr++; 189 190 set_bit(kvmppc_book3s_vec2irqprio(vec), 191 &vcpu->arch.pending_exceptions); 192 #ifdef EXIT_DEBUG 193 printk(KERN_INFO "Queueing interrupt %x\n", vec); 194 #endif 195 } 196 EXPORT_SYMBOL_GPL(kvmppc_book3s_queue_irqprio); 197 198 void kvmppc_core_queue_machine_check(struct kvm_vcpu *vcpu, ulong flags) 199 { 200 /* might as well deliver this straight away */ 201 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_MACHINE_CHECK, flags); 202 } 203 EXPORT_SYMBOL_GPL(kvmppc_core_queue_machine_check); 204 205 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags) 206 { 207 /* might as well deliver this straight away */ 208 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, flags); 209 } 210 EXPORT_SYMBOL_GPL(kvmppc_core_queue_program); 211 212 void kvmppc_core_queue_fpunavail(struct kvm_vcpu *vcpu) 213 { 214 /* might as well deliver this straight away */ 215 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, 0); 216 } 217 218 void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu) 219 { 220 /* might as well deliver this straight away */ 221 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_ALTIVEC, 0); 222 } 223 224 void kvmppc_core_queue_vsx_unavail(struct kvm_vcpu *vcpu) 225 { 226 /* might as well deliver this straight away */ 227 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_VSX, 0); 228 } 229 230 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu) 231 { 232 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER); 233 } 234 EXPORT_SYMBOL_GPL(kvmppc_core_queue_dec); 235 236 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu) 237 { 238 return test_bit(BOOK3S_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 239 } 240 EXPORT_SYMBOL_GPL(kvmppc_core_pending_dec); 241 242 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu) 243 { 244 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER); 245 } 246 EXPORT_SYMBOL_GPL(kvmppc_core_dequeue_dec); 247 248 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, 249 struct kvm_interrupt *irq) 250 { 251 /* 252 * This case (KVM_INTERRUPT_SET) should never actually arise for 253 * a pseries guest (because pseries guests expect their interrupt 254 * controllers to continue asserting an external interrupt request 255 * until it is acknowledged at the interrupt controller), but is 256 * included to avoid ABI breakage and potentially for other 257 * sorts of guest. 258 * 259 * There is a subtlety here: HV KVM does not test the 260 * external_oneshot flag in the code that synthesizes 261 * external interrupts for the guest just before entering 262 * the guest. That is OK even if userspace did do a 263 * KVM_INTERRUPT_SET on a pseries guest vcpu, because the 264 * caller (kvm_vcpu_ioctl_interrupt) does a kvm_vcpu_kick() 265 * which ends up doing a smp_send_reschedule(), which will 266 * pull the guest all the way out to the host, meaning that 267 * we will call kvmppc_core_prepare_to_enter() before entering 268 * the guest again, and that will handle the external_oneshot 269 * flag correctly. 270 */ 271 if (irq->irq == KVM_INTERRUPT_SET) 272 vcpu->arch.external_oneshot = 1; 273 274 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL); 275 } 276 277 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu) 278 { 279 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL); 280 } 281 282 void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, ulong dar, 283 ulong flags) 284 { 285 kvmppc_set_dar(vcpu, dar); 286 kvmppc_set_dsisr(vcpu, flags); 287 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE, 0); 288 } 289 EXPORT_SYMBOL_GPL(kvmppc_core_queue_data_storage); 290 291 void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong flags) 292 { 293 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_INST_STORAGE, flags); 294 } 295 EXPORT_SYMBOL_GPL(kvmppc_core_queue_inst_storage); 296 297 static int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu, 298 unsigned int priority) 299 { 300 int deliver = 1; 301 int vec = 0; 302 bool crit = kvmppc_critical_section(vcpu); 303 304 switch (priority) { 305 case BOOK3S_IRQPRIO_DECREMENTER: 306 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit; 307 vec = BOOK3S_INTERRUPT_DECREMENTER; 308 break; 309 case BOOK3S_IRQPRIO_EXTERNAL: 310 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit; 311 vec = BOOK3S_INTERRUPT_EXTERNAL; 312 break; 313 case BOOK3S_IRQPRIO_SYSTEM_RESET: 314 vec = BOOK3S_INTERRUPT_SYSTEM_RESET; 315 break; 316 case BOOK3S_IRQPRIO_MACHINE_CHECK: 317 vec = BOOK3S_INTERRUPT_MACHINE_CHECK; 318 break; 319 case BOOK3S_IRQPRIO_DATA_STORAGE: 320 vec = BOOK3S_INTERRUPT_DATA_STORAGE; 321 break; 322 case BOOK3S_IRQPRIO_INST_STORAGE: 323 vec = BOOK3S_INTERRUPT_INST_STORAGE; 324 break; 325 case BOOK3S_IRQPRIO_DATA_SEGMENT: 326 vec = BOOK3S_INTERRUPT_DATA_SEGMENT; 327 break; 328 case BOOK3S_IRQPRIO_INST_SEGMENT: 329 vec = BOOK3S_INTERRUPT_INST_SEGMENT; 330 break; 331 case BOOK3S_IRQPRIO_ALIGNMENT: 332 vec = BOOK3S_INTERRUPT_ALIGNMENT; 333 break; 334 case BOOK3S_IRQPRIO_PROGRAM: 335 vec = BOOK3S_INTERRUPT_PROGRAM; 336 break; 337 case BOOK3S_IRQPRIO_VSX: 338 vec = BOOK3S_INTERRUPT_VSX; 339 break; 340 case BOOK3S_IRQPRIO_ALTIVEC: 341 vec = BOOK3S_INTERRUPT_ALTIVEC; 342 break; 343 case BOOK3S_IRQPRIO_FP_UNAVAIL: 344 vec = BOOK3S_INTERRUPT_FP_UNAVAIL; 345 break; 346 case BOOK3S_IRQPRIO_SYSCALL: 347 vec = BOOK3S_INTERRUPT_SYSCALL; 348 break; 349 case BOOK3S_IRQPRIO_DEBUG: 350 vec = BOOK3S_INTERRUPT_TRACE; 351 break; 352 case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR: 353 vec = BOOK3S_INTERRUPT_PERFMON; 354 break; 355 case BOOK3S_IRQPRIO_FAC_UNAVAIL: 356 vec = BOOK3S_INTERRUPT_FAC_UNAVAIL; 357 break; 358 default: 359 deliver = 0; 360 printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority); 361 break; 362 } 363 364 #if 0 365 printk(KERN_INFO "Deliver interrupt 0x%x? %x\n", vec, deliver); 366 #endif 367 368 if (deliver) 369 kvmppc_inject_interrupt(vcpu, vec, 0); 370 371 return deliver; 372 } 373 374 /* 375 * This function determines if an irqprio should be cleared once issued. 376 */ 377 static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority) 378 { 379 switch (priority) { 380 case BOOK3S_IRQPRIO_DECREMENTER: 381 /* DEC interrupts get cleared by mtdec */ 382 return false; 383 case BOOK3S_IRQPRIO_EXTERNAL: 384 /* 385 * External interrupts get cleared by userspace 386 * except when set by the KVM_INTERRUPT ioctl with 387 * KVM_INTERRUPT_SET (not KVM_INTERRUPT_SET_LEVEL). 388 */ 389 if (vcpu->arch.external_oneshot) { 390 vcpu->arch.external_oneshot = 0; 391 return true; 392 } 393 return false; 394 } 395 396 return true; 397 } 398 399 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu) 400 { 401 unsigned long *pending = &vcpu->arch.pending_exceptions; 402 unsigned long old_pending = vcpu->arch.pending_exceptions; 403 unsigned int priority; 404 405 #ifdef EXIT_DEBUG 406 if (vcpu->arch.pending_exceptions) 407 printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions); 408 #endif 409 priority = __ffs(*pending); 410 while (priority < BOOK3S_IRQPRIO_MAX) { 411 if (kvmppc_book3s_irqprio_deliver(vcpu, priority) && 412 clear_irqprio(vcpu, priority)) { 413 clear_bit(priority, &vcpu->arch.pending_exceptions); 414 break; 415 } 416 417 priority = find_next_bit(pending, 418 BITS_PER_BYTE * sizeof(*pending), 419 priority + 1); 420 } 421 422 /* Tell the guest about our interrupt status */ 423 kvmppc_update_int_pending(vcpu, *pending, old_pending); 424 425 return 0; 426 } 427 EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter); 428 429 kvm_pfn_t kvmppc_gpa_to_pfn(struct kvm_vcpu *vcpu, gpa_t gpa, bool writing, 430 bool *writable) 431 { 432 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM; 433 gfn_t gfn = gpa >> PAGE_SHIFT; 434 435 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) 436 mp_pa = (uint32_t)mp_pa; 437 438 /* Magic page override */ 439 gpa &= ~0xFFFULL; 440 if (unlikely(mp_pa) && unlikely((gpa & KVM_PAM) == mp_pa)) { 441 ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK; 442 kvm_pfn_t pfn; 443 444 pfn = (kvm_pfn_t)virt_to_phys((void*)shared_page) >> PAGE_SHIFT; 445 get_page(pfn_to_page(pfn)); 446 if (writable) 447 *writable = true; 448 return pfn; 449 } 450 451 return gfn_to_pfn_prot(vcpu->kvm, gfn, writing, writable); 452 } 453 EXPORT_SYMBOL_GPL(kvmppc_gpa_to_pfn); 454 455 int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid, 456 enum xlate_readwrite xlrw, struct kvmppc_pte *pte) 457 { 458 bool data = (xlid == XLATE_DATA); 459 bool iswrite = (xlrw == XLATE_WRITE); 460 int relocated = (kvmppc_get_msr(vcpu) & (data ? MSR_DR : MSR_IR)); 461 int r; 462 463 if (relocated) { 464 r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data, iswrite); 465 } else { 466 pte->eaddr = eaddr; 467 pte->raddr = eaddr & KVM_PAM; 468 pte->vpage = VSID_REAL | eaddr >> 12; 469 pte->may_read = true; 470 pte->may_write = true; 471 pte->may_execute = true; 472 r = 0; 473 474 if ((kvmppc_get_msr(vcpu) & (MSR_IR | MSR_DR)) == MSR_DR && 475 !data) { 476 if ((vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) && 477 ((eaddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS)) 478 pte->raddr &= ~SPLIT_HACK_MASK; 479 } 480 } 481 482 return r; 483 } 484 485 int kvmppc_load_last_inst(struct kvm_vcpu *vcpu, 486 enum instruction_fetch_type type, u32 *inst) 487 { 488 ulong pc = kvmppc_get_pc(vcpu); 489 int r; 490 491 if (type == INST_SC) 492 pc -= 4; 493 494 r = kvmppc_ld(vcpu, &pc, sizeof(u32), inst, false); 495 if (r == EMULATE_DONE) 496 return r; 497 else 498 return EMULATE_AGAIN; 499 } 500 EXPORT_SYMBOL_GPL(kvmppc_load_last_inst); 501 502 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) 503 { 504 return 0; 505 } 506 507 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu) 508 { 509 return 0; 510 } 511 512 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu) 513 { 514 } 515 516 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, 517 struct kvm_sregs *sregs) 518 { 519 int ret; 520 521 vcpu_load(vcpu); 522 ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs); 523 vcpu_put(vcpu); 524 525 return ret; 526 } 527 528 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, 529 struct kvm_sregs *sregs) 530 { 531 int ret; 532 533 vcpu_load(vcpu); 534 ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs); 535 vcpu_put(vcpu); 536 537 return ret; 538 } 539 540 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 541 { 542 int i; 543 544 regs->pc = kvmppc_get_pc(vcpu); 545 regs->cr = kvmppc_get_cr(vcpu); 546 regs->ctr = kvmppc_get_ctr(vcpu); 547 regs->lr = kvmppc_get_lr(vcpu); 548 regs->xer = kvmppc_get_xer(vcpu); 549 regs->msr = kvmppc_get_msr(vcpu); 550 regs->srr0 = kvmppc_get_srr0(vcpu); 551 regs->srr1 = kvmppc_get_srr1(vcpu); 552 regs->pid = vcpu->arch.pid; 553 regs->sprg0 = kvmppc_get_sprg0(vcpu); 554 regs->sprg1 = kvmppc_get_sprg1(vcpu); 555 regs->sprg2 = kvmppc_get_sprg2(vcpu); 556 regs->sprg3 = kvmppc_get_sprg3(vcpu); 557 regs->sprg4 = kvmppc_get_sprg4(vcpu); 558 regs->sprg5 = kvmppc_get_sprg5(vcpu); 559 regs->sprg6 = kvmppc_get_sprg6(vcpu); 560 regs->sprg7 = kvmppc_get_sprg7(vcpu); 561 562 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 563 regs->gpr[i] = kvmppc_get_gpr(vcpu, i); 564 565 return 0; 566 } 567 568 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 569 { 570 int i; 571 572 kvmppc_set_pc(vcpu, regs->pc); 573 kvmppc_set_cr(vcpu, regs->cr); 574 kvmppc_set_ctr(vcpu, regs->ctr); 575 kvmppc_set_lr(vcpu, regs->lr); 576 kvmppc_set_xer(vcpu, regs->xer); 577 kvmppc_set_msr(vcpu, regs->msr); 578 kvmppc_set_srr0(vcpu, regs->srr0); 579 kvmppc_set_srr1(vcpu, regs->srr1); 580 kvmppc_set_sprg0(vcpu, regs->sprg0); 581 kvmppc_set_sprg1(vcpu, regs->sprg1); 582 kvmppc_set_sprg2(vcpu, regs->sprg2); 583 kvmppc_set_sprg3(vcpu, regs->sprg3); 584 kvmppc_set_sprg4(vcpu, regs->sprg4); 585 kvmppc_set_sprg5(vcpu, regs->sprg5); 586 kvmppc_set_sprg6(vcpu, regs->sprg6); 587 kvmppc_set_sprg7(vcpu, regs->sprg7); 588 589 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 590 kvmppc_set_gpr(vcpu, i, regs->gpr[i]); 591 592 return 0; 593 } 594 595 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 596 { 597 return -ENOTSUPP; 598 } 599 600 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 601 { 602 return -ENOTSUPP; 603 } 604 605 int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id, 606 union kvmppc_one_reg *val) 607 { 608 int r = 0; 609 long int i; 610 611 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val); 612 if (r == -EINVAL) { 613 r = 0; 614 switch (id) { 615 case KVM_REG_PPC_DAR: 616 *val = get_reg_val(id, kvmppc_get_dar(vcpu)); 617 break; 618 case KVM_REG_PPC_DSISR: 619 *val = get_reg_val(id, kvmppc_get_dsisr(vcpu)); 620 break; 621 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31: 622 i = id - KVM_REG_PPC_FPR0; 623 *val = get_reg_val(id, VCPU_FPR(vcpu, i)); 624 break; 625 case KVM_REG_PPC_FPSCR: 626 *val = get_reg_val(id, vcpu->arch.fp.fpscr); 627 break; 628 #ifdef CONFIG_VSX 629 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31: 630 if (cpu_has_feature(CPU_FTR_VSX)) { 631 i = id - KVM_REG_PPC_VSR0; 632 val->vsxval[0] = vcpu->arch.fp.fpr[i][0]; 633 val->vsxval[1] = vcpu->arch.fp.fpr[i][1]; 634 } else { 635 r = -ENXIO; 636 } 637 break; 638 #endif /* CONFIG_VSX */ 639 case KVM_REG_PPC_DEBUG_INST: 640 *val = get_reg_val(id, INS_TW); 641 break; 642 #ifdef CONFIG_KVM_XICS 643 case KVM_REG_PPC_ICP_STATE: 644 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) { 645 r = -ENXIO; 646 break; 647 } 648 if (xics_on_xive()) 649 *val = get_reg_val(id, kvmppc_xive_get_icp(vcpu)); 650 else 651 *val = get_reg_val(id, kvmppc_xics_get_icp(vcpu)); 652 break; 653 #endif /* CONFIG_KVM_XICS */ 654 #ifdef CONFIG_KVM_XIVE 655 case KVM_REG_PPC_VP_STATE: 656 if (!vcpu->arch.xive_vcpu) { 657 r = -ENXIO; 658 break; 659 } 660 if (xive_enabled()) 661 r = kvmppc_xive_native_get_vp(vcpu, val); 662 else 663 r = -ENXIO; 664 break; 665 #endif /* CONFIG_KVM_XIVE */ 666 case KVM_REG_PPC_FSCR: 667 *val = get_reg_val(id, vcpu->arch.fscr); 668 break; 669 case KVM_REG_PPC_TAR: 670 *val = get_reg_val(id, vcpu->arch.tar); 671 break; 672 case KVM_REG_PPC_EBBHR: 673 *val = get_reg_val(id, vcpu->arch.ebbhr); 674 break; 675 case KVM_REG_PPC_EBBRR: 676 *val = get_reg_val(id, vcpu->arch.ebbrr); 677 break; 678 case KVM_REG_PPC_BESCR: 679 *val = get_reg_val(id, vcpu->arch.bescr); 680 break; 681 case KVM_REG_PPC_IC: 682 *val = get_reg_val(id, vcpu->arch.ic); 683 break; 684 default: 685 r = -EINVAL; 686 break; 687 } 688 } 689 690 return r; 691 } 692 693 int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id, 694 union kvmppc_one_reg *val) 695 { 696 int r = 0; 697 long int i; 698 699 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val); 700 if (r == -EINVAL) { 701 r = 0; 702 switch (id) { 703 case KVM_REG_PPC_DAR: 704 kvmppc_set_dar(vcpu, set_reg_val(id, *val)); 705 break; 706 case KVM_REG_PPC_DSISR: 707 kvmppc_set_dsisr(vcpu, set_reg_val(id, *val)); 708 break; 709 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31: 710 i = id - KVM_REG_PPC_FPR0; 711 VCPU_FPR(vcpu, i) = set_reg_val(id, *val); 712 break; 713 case KVM_REG_PPC_FPSCR: 714 vcpu->arch.fp.fpscr = set_reg_val(id, *val); 715 break; 716 #ifdef CONFIG_VSX 717 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31: 718 if (cpu_has_feature(CPU_FTR_VSX)) { 719 i = id - KVM_REG_PPC_VSR0; 720 vcpu->arch.fp.fpr[i][0] = val->vsxval[0]; 721 vcpu->arch.fp.fpr[i][1] = val->vsxval[1]; 722 } else { 723 r = -ENXIO; 724 } 725 break; 726 #endif /* CONFIG_VSX */ 727 #ifdef CONFIG_KVM_XICS 728 case KVM_REG_PPC_ICP_STATE: 729 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) { 730 r = -ENXIO; 731 break; 732 } 733 if (xics_on_xive()) 734 r = kvmppc_xive_set_icp(vcpu, set_reg_val(id, *val)); 735 else 736 r = kvmppc_xics_set_icp(vcpu, set_reg_val(id, *val)); 737 break; 738 #endif /* CONFIG_KVM_XICS */ 739 #ifdef CONFIG_KVM_XIVE 740 case KVM_REG_PPC_VP_STATE: 741 if (!vcpu->arch.xive_vcpu) { 742 r = -ENXIO; 743 break; 744 } 745 if (xive_enabled()) 746 r = kvmppc_xive_native_set_vp(vcpu, val); 747 else 748 r = -ENXIO; 749 break; 750 #endif /* CONFIG_KVM_XIVE */ 751 case KVM_REG_PPC_FSCR: 752 vcpu->arch.fscr = set_reg_val(id, *val); 753 break; 754 case KVM_REG_PPC_TAR: 755 vcpu->arch.tar = set_reg_val(id, *val); 756 break; 757 case KVM_REG_PPC_EBBHR: 758 vcpu->arch.ebbhr = set_reg_val(id, *val); 759 break; 760 case KVM_REG_PPC_EBBRR: 761 vcpu->arch.ebbrr = set_reg_val(id, *val); 762 break; 763 case KVM_REG_PPC_BESCR: 764 vcpu->arch.bescr = set_reg_val(id, *val); 765 break; 766 case KVM_REG_PPC_IC: 767 vcpu->arch.ic = set_reg_val(id, *val); 768 break; 769 default: 770 r = -EINVAL; 771 break; 772 } 773 } 774 775 return r; 776 } 777 778 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 779 { 780 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu); 781 } 782 783 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu) 784 { 785 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu); 786 } 787 788 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr) 789 { 790 vcpu->kvm->arch.kvm_ops->set_msr(vcpu, msr); 791 } 792 EXPORT_SYMBOL_GPL(kvmppc_set_msr); 793 794 int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) 795 { 796 return vcpu->kvm->arch.kvm_ops->vcpu_run(kvm_run, vcpu); 797 } 798 799 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, 800 struct kvm_translation *tr) 801 { 802 return 0; 803 } 804 805 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu, 806 struct kvm_guest_debug *dbg) 807 { 808 vcpu_load(vcpu); 809 vcpu->guest_debug = dbg->control; 810 vcpu_put(vcpu); 811 return 0; 812 } 813 814 void kvmppc_decrementer_func(struct kvm_vcpu *vcpu) 815 { 816 kvmppc_core_queue_dec(vcpu); 817 kvm_vcpu_kick(vcpu); 818 } 819 820 struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id) 821 { 822 return kvm->arch.kvm_ops->vcpu_create(kvm, id); 823 } 824 825 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu) 826 { 827 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu); 828 } 829 830 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu) 831 { 832 return vcpu->kvm->arch.kvm_ops->check_requests(vcpu); 833 } 834 835 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log) 836 { 837 return kvm->arch.kvm_ops->get_dirty_log(kvm, log); 838 } 839 840 void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free, 841 struct kvm_memory_slot *dont) 842 { 843 kvm->arch.kvm_ops->free_memslot(free, dont); 844 } 845 846 int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot, 847 unsigned long npages) 848 { 849 return kvm->arch.kvm_ops->create_memslot(slot, npages); 850 } 851 852 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot) 853 { 854 kvm->arch.kvm_ops->flush_memslot(kvm, memslot); 855 } 856 857 int kvmppc_core_prepare_memory_region(struct kvm *kvm, 858 struct kvm_memory_slot *memslot, 859 const struct kvm_userspace_memory_region *mem) 860 { 861 return kvm->arch.kvm_ops->prepare_memory_region(kvm, memslot, mem); 862 } 863 864 void kvmppc_core_commit_memory_region(struct kvm *kvm, 865 const struct kvm_userspace_memory_region *mem, 866 const struct kvm_memory_slot *old, 867 const struct kvm_memory_slot *new, 868 enum kvm_mr_change change) 869 { 870 kvm->arch.kvm_ops->commit_memory_region(kvm, mem, old, new, change); 871 } 872 873 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end) 874 { 875 return kvm->arch.kvm_ops->unmap_hva_range(kvm, start, end); 876 } 877 878 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end) 879 { 880 return kvm->arch.kvm_ops->age_hva(kvm, start, end); 881 } 882 883 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva) 884 { 885 return kvm->arch.kvm_ops->test_age_hva(kvm, hva); 886 } 887 888 int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte) 889 { 890 kvm->arch.kvm_ops->set_spte_hva(kvm, hva, pte); 891 return 0; 892 } 893 894 void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu) 895 { 896 vcpu->kvm->arch.kvm_ops->mmu_destroy(vcpu); 897 } 898 899 int kvmppc_core_init_vm(struct kvm *kvm) 900 { 901 902 #ifdef CONFIG_PPC64 903 INIT_LIST_HEAD_RCU(&kvm->arch.spapr_tce_tables); 904 INIT_LIST_HEAD(&kvm->arch.rtas_tokens); 905 #endif 906 907 return kvm->arch.kvm_ops->init_vm(kvm); 908 } 909 910 void kvmppc_core_destroy_vm(struct kvm *kvm) 911 { 912 kvm->arch.kvm_ops->destroy_vm(kvm); 913 914 #ifdef CONFIG_PPC64 915 kvmppc_rtas_tokens_free(kvm); 916 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables)); 917 #endif 918 919 #ifdef CONFIG_KVM_XICS 920 /* 921 * Free the XIVE devices which are not directly freed by the 922 * device 'release' method 923 */ 924 kfree(kvm->arch.xive_devices.native); 925 kvm->arch.xive_devices.native = NULL; 926 kfree(kvm->arch.xive_devices.xics_on_xive); 927 kvm->arch.xive_devices.xics_on_xive = NULL; 928 #endif /* CONFIG_KVM_XICS */ 929 } 930 931 int kvmppc_h_logical_ci_load(struct kvm_vcpu *vcpu) 932 { 933 unsigned long size = kvmppc_get_gpr(vcpu, 4); 934 unsigned long addr = kvmppc_get_gpr(vcpu, 5); 935 u64 buf; 936 int srcu_idx; 937 int ret; 938 939 if (!is_power_of_2(size) || (size > sizeof(buf))) 940 return H_TOO_HARD; 941 942 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 943 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, size, &buf); 944 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 945 if (ret != 0) 946 return H_TOO_HARD; 947 948 switch (size) { 949 case 1: 950 kvmppc_set_gpr(vcpu, 4, *(u8 *)&buf); 951 break; 952 953 case 2: 954 kvmppc_set_gpr(vcpu, 4, be16_to_cpu(*(__be16 *)&buf)); 955 break; 956 957 case 4: 958 kvmppc_set_gpr(vcpu, 4, be32_to_cpu(*(__be32 *)&buf)); 959 break; 960 961 case 8: 962 kvmppc_set_gpr(vcpu, 4, be64_to_cpu(*(__be64 *)&buf)); 963 break; 964 965 default: 966 BUG(); 967 } 968 969 return H_SUCCESS; 970 } 971 EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_load); 972 973 int kvmppc_h_logical_ci_store(struct kvm_vcpu *vcpu) 974 { 975 unsigned long size = kvmppc_get_gpr(vcpu, 4); 976 unsigned long addr = kvmppc_get_gpr(vcpu, 5); 977 unsigned long val = kvmppc_get_gpr(vcpu, 6); 978 u64 buf; 979 int srcu_idx; 980 int ret; 981 982 switch (size) { 983 case 1: 984 *(u8 *)&buf = val; 985 break; 986 987 case 2: 988 *(__be16 *)&buf = cpu_to_be16(val); 989 break; 990 991 case 4: 992 *(__be32 *)&buf = cpu_to_be32(val); 993 break; 994 995 case 8: 996 *(__be64 *)&buf = cpu_to_be64(val); 997 break; 998 999 default: 1000 return H_TOO_HARD; 1001 } 1002 1003 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 1004 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, size, &buf); 1005 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 1006 if (ret != 0) 1007 return H_TOO_HARD; 1008 1009 return H_SUCCESS; 1010 } 1011 EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_store); 1012 1013 int kvmppc_core_check_processor_compat(void) 1014 { 1015 /* 1016 * We always return 0 for book3s. We check 1017 * for compatibility while loading the HV 1018 * or PR module 1019 */ 1020 return 0; 1021 } 1022 1023 int kvmppc_book3s_hcall_implemented(struct kvm *kvm, unsigned long hcall) 1024 { 1025 return kvm->arch.kvm_ops->hcall_implemented(hcall); 1026 } 1027 1028 #ifdef CONFIG_KVM_XICS 1029 int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level, 1030 bool line_status) 1031 { 1032 if (xics_on_xive()) 1033 return kvmppc_xive_set_irq(kvm, irq_source_id, irq, level, 1034 line_status); 1035 else 1036 return kvmppc_xics_set_irq(kvm, irq_source_id, irq, level, 1037 line_status); 1038 } 1039 1040 int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *irq_entry, 1041 struct kvm *kvm, int irq_source_id, 1042 int level, bool line_status) 1043 { 1044 return kvm_set_irq(kvm, irq_source_id, irq_entry->gsi, 1045 level, line_status); 1046 } 1047 static int kvmppc_book3s_set_irq(struct kvm_kernel_irq_routing_entry *e, 1048 struct kvm *kvm, int irq_source_id, int level, 1049 bool line_status) 1050 { 1051 return kvm_set_irq(kvm, irq_source_id, e->gsi, level, line_status); 1052 } 1053 1054 int kvm_irq_map_gsi(struct kvm *kvm, 1055 struct kvm_kernel_irq_routing_entry *entries, int gsi) 1056 { 1057 entries->gsi = gsi; 1058 entries->type = KVM_IRQ_ROUTING_IRQCHIP; 1059 entries->set = kvmppc_book3s_set_irq; 1060 entries->irqchip.irqchip = 0; 1061 entries->irqchip.pin = gsi; 1062 return 1; 1063 } 1064 1065 int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin) 1066 { 1067 return pin; 1068 } 1069 1070 #endif /* CONFIG_KVM_XICS */ 1071 1072 static int kvmppc_book3s_init(void) 1073 { 1074 int r; 1075 1076 r = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE); 1077 if (r) 1078 return r; 1079 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER 1080 r = kvmppc_book3s_init_pr(); 1081 #endif 1082 1083 #ifdef CONFIG_KVM_XICS 1084 #ifdef CONFIG_KVM_XIVE 1085 if (xics_on_xive()) { 1086 kvmppc_xive_init_module(); 1087 kvm_register_device_ops(&kvm_xive_ops, KVM_DEV_TYPE_XICS); 1088 kvmppc_xive_native_init_module(); 1089 kvm_register_device_ops(&kvm_xive_native_ops, 1090 KVM_DEV_TYPE_XIVE); 1091 } else 1092 #endif 1093 kvm_register_device_ops(&kvm_xics_ops, KVM_DEV_TYPE_XICS); 1094 #endif 1095 return r; 1096 } 1097 1098 static void kvmppc_book3s_exit(void) 1099 { 1100 #ifdef CONFIG_KVM_XICS 1101 if (xics_on_xive()) { 1102 kvmppc_xive_exit_module(); 1103 kvmppc_xive_native_exit_module(); 1104 } 1105 #endif 1106 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER 1107 kvmppc_book3s_exit_pr(); 1108 #endif 1109 kvm_exit(); 1110 } 1111 1112 module_init(kvmppc_book3s_init); 1113 module_exit(kvmppc_book3s_exit); 1114 1115 /* On 32bit this is our one and only kernel module */ 1116 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER 1117 MODULE_ALIAS_MISCDEV(KVM_MINOR); 1118 MODULE_ALIAS("devname:kvm"); 1119 #endif 1120