1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved. 4 * 5 * Authors: 6 * Alexander Graf <agraf@suse.de> 7 * Kevin Wolf <mail@kevin-wolf.de> 8 * 9 * Description: 10 * This file is derived from arch/powerpc/kvm/44x.c, 11 * by Hollis Blanchard <hollisb@us.ibm.com>. 12 */ 13 14 #include <linux/kvm_host.h> 15 #include <linux/err.h> 16 #include <linux/export.h> 17 #include <linux/slab.h> 18 #include <linux/module.h> 19 #include <linux/miscdevice.h> 20 #include <linux/gfp.h> 21 #include <linux/sched.h> 22 #include <linux/vmalloc.h> 23 #include <linux/highmem.h> 24 25 #include <asm/reg.h> 26 #include <asm/cputable.h> 27 #include <asm/cacheflush.h> 28 #include <linux/uaccess.h> 29 #include <asm/io.h> 30 #include <asm/kvm_ppc.h> 31 #include <asm/kvm_book3s.h> 32 #include <asm/mmu_context.h> 33 #include <asm/page.h> 34 #include <asm/xive.h> 35 36 #include "book3s.h" 37 #include "trace.h" 38 39 #define VM_STAT(x, ...) offsetof(struct kvm, stat.x), KVM_STAT_VM, ## __VA_ARGS__ 40 #define VCPU_STAT(x, ...) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU, ## __VA_ARGS__ 41 42 /* #define EXIT_DEBUG */ 43 44 struct kvm_stats_debugfs_item debugfs_entries[] = { 45 { "exits", VCPU_STAT(sum_exits) }, 46 { "mmio", VCPU_STAT(mmio_exits) }, 47 { "sig", VCPU_STAT(signal_exits) }, 48 { "sysc", VCPU_STAT(syscall_exits) }, 49 { "inst_emu", VCPU_STAT(emulated_inst_exits) }, 50 { "dec", VCPU_STAT(dec_exits) }, 51 { "ext_intr", VCPU_STAT(ext_intr_exits) }, 52 { "queue_intr", VCPU_STAT(queue_intr) }, 53 { "halt_poll_success_ns", VCPU_STAT(halt_poll_success_ns) }, 54 { "halt_poll_fail_ns", VCPU_STAT(halt_poll_fail_ns) }, 55 { "halt_wait_ns", VCPU_STAT(halt_wait_ns) }, 56 { "halt_successful_poll", VCPU_STAT(halt_successful_poll), }, 57 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll), }, 58 { "halt_successful_wait", VCPU_STAT(halt_successful_wait) }, 59 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) }, 60 { "halt_wakeup", VCPU_STAT(halt_wakeup) }, 61 { "pf_storage", VCPU_STAT(pf_storage) }, 62 { "sp_storage", VCPU_STAT(sp_storage) }, 63 { "pf_instruc", VCPU_STAT(pf_instruc) }, 64 { "sp_instruc", VCPU_STAT(sp_instruc) }, 65 { "ld", VCPU_STAT(ld) }, 66 { "ld_slow", VCPU_STAT(ld_slow) }, 67 { "st", VCPU_STAT(st) }, 68 { "st_slow", VCPU_STAT(st_slow) }, 69 { "pthru_all", VCPU_STAT(pthru_all) }, 70 { "pthru_host", VCPU_STAT(pthru_host) }, 71 { "pthru_bad_aff", VCPU_STAT(pthru_bad_aff) }, 72 { "largepages_2M", VM_STAT(num_2M_pages, .mode = 0444) }, 73 { "largepages_1G", VM_STAT(num_1G_pages, .mode = 0444) }, 74 { NULL } 75 }; 76 77 void kvmppc_unfixup_split_real(struct kvm_vcpu *vcpu) 78 { 79 if (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) { 80 ulong pc = kvmppc_get_pc(vcpu); 81 ulong lr = kvmppc_get_lr(vcpu); 82 if ((pc & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS) 83 kvmppc_set_pc(vcpu, pc & ~SPLIT_HACK_MASK); 84 if ((lr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS) 85 kvmppc_set_lr(vcpu, lr & ~SPLIT_HACK_MASK); 86 vcpu->arch.hflags &= ~BOOK3S_HFLAG_SPLIT_HACK; 87 } 88 } 89 EXPORT_SYMBOL_GPL(kvmppc_unfixup_split_real); 90 91 static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu) 92 { 93 if (!is_kvmppc_hv_enabled(vcpu->kvm)) 94 return to_book3s(vcpu)->hior; 95 return 0; 96 } 97 98 static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu, 99 unsigned long pending_now, unsigned long old_pending) 100 { 101 if (is_kvmppc_hv_enabled(vcpu->kvm)) 102 return; 103 if (pending_now) 104 kvmppc_set_int_pending(vcpu, 1); 105 else if (old_pending) 106 kvmppc_set_int_pending(vcpu, 0); 107 } 108 109 static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu) 110 { 111 ulong crit_raw; 112 ulong crit_r1; 113 bool crit; 114 115 if (is_kvmppc_hv_enabled(vcpu->kvm)) 116 return false; 117 118 crit_raw = kvmppc_get_critical(vcpu); 119 crit_r1 = kvmppc_get_gpr(vcpu, 1); 120 121 /* Truncate crit indicators in 32 bit mode */ 122 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) { 123 crit_raw &= 0xffffffff; 124 crit_r1 &= 0xffffffff; 125 } 126 127 /* Critical section when crit == r1 */ 128 crit = (crit_raw == crit_r1); 129 /* ... and we're in supervisor mode */ 130 crit = crit && !(kvmppc_get_msr(vcpu) & MSR_PR); 131 132 return crit; 133 } 134 135 void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags) 136 { 137 kvmppc_unfixup_split_real(vcpu); 138 kvmppc_set_srr0(vcpu, kvmppc_get_pc(vcpu)); 139 kvmppc_set_srr1(vcpu, (kvmppc_get_msr(vcpu) & ~0x783f0000ul) | flags); 140 kvmppc_set_pc(vcpu, kvmppc_interrupt_offset(vcpu) + vec); 141 vcpu->arch.mmu.reset_msr(vcpu); 142 } 143 144 static int kvmppc_book3s_vec2irqprio(unsigned int vec) 145 { 146 unsigned int prio; 147 148 switch (vec) { 149 case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET; break; 150 case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK; break; 151 case 0x300: prio = BOOK3S_IRQPRIO_DATA_STORAGE; break; 152 case 0x380: prio = BOOK3S_IRQPRIO_DATA_SEGMENT; break; 153 case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE; break; 154 case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT; break; 155 case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL; break; 156 case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT; break; 157 case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM; break; 158 case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL; break; 159 case 0x900: prio = BOOK3S_IRQPRIO_DECREMENTER; break; 160 case 0xc00: prio = BOOK3S_IRQPRIO_SYSCALL; break; 161 case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG; break; 162 case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC; break; 163 case 0xf40: prio = BOOK3S_IRQPRIO_VSX; break; 164 case 0xf60: prio = BOOK3S_IRQPRIO_FAC_UNAVAIL; break; 165 default: prio = BOOK3S_IRQPRIO_MAX; break; 166 } 167 168 return prio; 169 } 170 171 void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu, 172 unsigned int vec) 173 { 174 unsigned long old_pending = vcpu->arch.pending_exceptions; 175 176 clear_bit(kvmppc_book3s_vec2irqprio(vec), 177 &vcpu->arch.pending_exceptions); 178 179 kvmppc_update_int_pending(vcpu, vcpu->arch.pending_exceptions, 180 old_pending); 181 } 182 183 void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec) 184 { 185 vcpu->stat.queue_intr++; 186 187 set_bit(kvmppc_book3s_vec2irqprio(vec), 188 &vcpu->arch.pending_exceptions); 189 #ifdef EXIT_DEBUG 190 printk(KERN_INFO "Queueing interrupt %x\n", vec); 191 #endif 192 } 193 EXPORT_SYMBOL_GPL(kvmppc_book3s_queue_irqprio); 194 195 void kvmppc_core_queue_machine_check(struct kvm_vcpu *vcpu, ulong flags) 196 { 197 /* might as well deliver this straight away */ 198 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_MACHINE_CHECK, flags); 199 } 200 EXPORT_SYMBOL_GPL(kvmppc_core_queue_machine_check); 201 202 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags) 203 { 204 /* might as well deliver this straight away */ 205 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, flags); 206 } 207 EXPORT_SYMBOL_GPL(kvmppc_core_queue_program); 208 209 void kvmppc_core_queue_fpunavail(struct kvm_vcpu *vcpu) 210 { 211 /* might as well deliver this straight away */ 212 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, 0); 213 } 214 215 void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu) 216 { 217 /* might as well deliver this straight away */ 218 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_ALTIVEC, 0); 219 } 220 221 void kvmppc_core_queue_vsx_unavail(struct kvm_vcpu *vcpu) 222 { 223 /* might as well deliver this straight away */ 224 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_VSX, 0); 225 } 226 227 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu) 228 { 229 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER); 230 } 231 EXPORT_SYMBOL_GPL(kvmppc_core_queue_dec); 232 233 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu) 234 { 235 return test_bit(BOOK3S_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 236 } 237 EXPORT_SYMBOL_GPL(kvmppc_core_pending_dec); 238 239 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu) 240 { 241 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER); 242 } 243 EXPORT_SYMBOL_GPL(kvmppc_core_dequeue_dec); 244 245 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, 246 struct kvm_interrupt *irq) 247 { 248 /* 249 * This case (KVM_INTERRUPT_SET) should never actually arise for 250 * a pseries guest (because pseries guests expect their interrupt 251 * controllers to continue asserting an external interrupt request 252 * until it is acknowledged at the interrupt controller), but is 253 * included to avoid ABI breakage and potentially for other 254 * sorts of guest. 255 * 256 * There is a subtlety here: HV KVM does not test the 257 * external_oneshot flag in the code that synthesizes 258 * external interrupts for the guest just before entering 259 * the guest. That is OK even if userspace did do a 260 * KVM_INTERRUPT_SET on a pseries guest vcpu, because the 261 * caller (kvm_vcpu_ioctl_interrupt) does a kvm_vcpu_kick() 262 * which ends up doing a smp_send_reschedule(), which will 263 * pull the guest all the way out to the host, meaning that 264 * we will call kvmppc_core_prepare_to_enter() before entering 265 * the guest again, and that will handle the external_oneshot 266 * flag correctly. 267 */ 268 if (irq->irq == KVM_INTERRUPT_SET) 269 vcpu->arch.external_oneshot = 1; 270 271 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL); 272 } 273 274 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu) 275 { 276 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL); 277 } 278 279 void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, ulong dar, 280 ulong flags) 281 { 282 kvmppc_set_dar(vcpu, dar); 283 kvmppc_set_dsisr(vcpu, flags); 284 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE, 0); 285 } 286 EXPORT_SYMBOL_GPL(kvmppc_core_queue_data_storage); 287 288 void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong flags) 289 { 290 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_INST_STORAGE, flags); 291 } 292 EXPORT_SYMBOL_GPL(kvmppc_core_queue_inst_storage); 293 294 static int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu, 295 unsigned int priority) 296 { 297 int deliver = 1; 298 int vec = 0; 299 bool crit = kvmppc_critical_section(vcpu); 300 301 switch (priority) { 302 case BOOK3S_IRQPRIO_DECREMENTER: 303 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit; 304 vec = BOOK3S_INTERRUPT_DECREMENTER; 305 break; 306 case BOOK3S_IRQPRIO_EXTERNAL: 307 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit; 308 vec = BOOK3S_INTERRUPT_EXTERNAL; 309 break; 310 case BOOK3S_IRQPRIO_SYSTEM_RESET: 311 vec = BOOK3S_INTERRUPT_SYSTEM_RESET; 312 break; 313 case BOOK3S_IRQPRIO_MACHINE_CHECK: 314 vec = BOOK3S_INTERRUPT_MACHINE_CHECK; 315 break; 316 case BOOK3S_IRQPRIO_DATA_STORAGE: 317 vec = BOOK3S_INTERRUPT_DATA_STORAGE; 318 break; 319 case BOOK3S_IRQPRIO_INST_STORAGE: 320 vec = BOOK3S_INTERRUPT_INST_STORAGE; 321 break; 322 case BOOK3S_IRQPRIO_DATA_SEGMENT: 323 vec = BOOK3S_INTERRUPT_DATA_SEGMENT; 324 break; 325 case BOOK3S_IRQPRIO_INST_SEGMENT: 326 vec = BOOK3S_INTERRUPT_INST_SEGMENT; 327 break; 328 case BOOK3S_IRQPRIO_ALIGNMENT: 329 vec = BOOK3S_INTERRUPT_ALIGNMENT; 330 break; 331 case BOOK3S_IRQPRIO_PROGRAM: 332 vec = BOOK3S_INTERRUPT_PROGRAM; 333 break; 334 case BOOK3S_IRQPRIO_VSX: 335 vec = BOOK3S_INTERRUPT_VSX; 336 break; 337 case BOOK3S_IRQPRIO_ALTIVEC: 338 vec = BOOK3S_INTERRUPT_ALTIVEC; 339 break; 340 case BOOK3S_IRQPRIO_FP_UNAVAIL: 341 vec = BOOK3S_INTERRUPT_FP_UNAVAIL; 342 break; 343 case BOOK3S_IRQPRIO_SYSCALL: 344 vec = BOOK3S_INTERRUPT_SYSCALL; 345 break; 346 case BOOK3S_IRQPRIO_DEBUG: 347 vec = BOOK3S_INTERRUPT_TRACE; 348 break; 349 case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR: 350 vec = BOOK3S_INTERRUPT_PERFMON; 351 break; 352 case BOOK3S_IRQPRIO_FAC_UNAVAIL: 353 vec = BOOK3S_INTERRUPT_FAC_UNAVAIL; 354 break; 355 default: 356 deliver = 0; 357 printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority); 358 break; 359 } 360 361 #if 0 362 printk(KERN_INFO "Deliver interrupt 0x%x? %x\n", vec, deliver); 363 #endif 364 365 if (deliver) 366 kvmppc_inject_interrupt(vcpu, vec, 0); 367 368 return deliver; 369 } 370 371 /* 372 * This function determines if an irqprio should be cleared once issued. 373 */ 374 static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority) 375 { 376 switch (priority) { 377 case BOOK3S_IRQPRIO_DECREMENTER: 378 /* DEC interrupts get cleared by mtdec */ 379 return false; 380 case BOOK3S_IRQPRIO_EXTERNAL: 381 /* 382 * External interrupts get cleared by userspace 383 * except when set by the KVM_INTERRUPT ioctl with 384 * KVM_INTERRUPT_SET (not KVM_INTERRUPT_SET_LEVEL). 385 */ 386 if (vcpu->arch.external_oneshot) { 387 vcpu->arch.external_oneshot = 0; 388 return true; 389 } 390 return false; 391 } 392 393 return true; 394 } 395 396 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu) 397 { 398 unsigned long *pending = &vcpu->arch.pending_exceptions; 399 unsigned long old_pending = vcpu->arch.pending_exceptions; 400 unsigned int priority; 401 402 #ifdef EXIT_DEBUG 403 if (vcpu->arch.pending_exceptions) 404 printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions); 405 #endif 406 priority = __ffs(*pending); 407 while (priority < BOOK3S_IRQPRIO_MAX) { 408 if (kvmppc_book3s_irqprio_deliver(vcpu, priority) && 409 clear_irqprio(vcpu, priority)) { 410 clear_bit(priority, &vcpu->arch.pending_exceptions); 411 break; 412 } 413 414 priority = find_next_bit(pending, 415 BITS_PER_BYTE * sizeof(*pending), 416 priority + 1); 417 } 418 419 /* Tell the guest about our interrupt status */ 420 kvmppc_update_int_pending(vcpu, *pending, old_pending); 421 422 return 0; 423 } 424 EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter); 425 426 kvm_pfn_t kvmppc_gpa_to_pfn(struct kvm_vcpu *vcpu, gpa_t gpa, bool writing, 427 bool *writable) 428 { 429 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM; 430 gfn_t gfn = gpa >> PAGE_SHIFT; 431 432 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) 433 mp_pa = (uint32_t)mp_pa; 434 435 /* Magic page override */ 436 gpa &= ~0xFFFULL; 437 if (unlikely(mp_pa) && unlikely((gpa & KVM_PAM) == mp_pa)) { 438 ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK; 439 kvm_pfn_t pfn; 440 441 pfn = (kvm_pfn_t)virt_to_phys((void*)shared_page) >> PAGE_SHIFT; 442 get_page(pfn_to_page(pfn)); 443 if (writable) 444 *writable = true; 445 return pfn; 446 } 447 448 return gfn_to_pfn_prot(vcpu->kvm, gfn, writing, writable); 449 } 450 EXPORT_SYMBOL_GPL(kvmppc_gpa_to_pfn); 451 452 int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid, 453 enum xlate_readwrite xlrw, struct kvmppc_pte *pte) 454 { 455 bool data = (xlid == XLATE_DATA); 456 bool iswrite = (xlrw == XLATE_WRITE); 457 int relocated = (kvmppc_get_msr(vcpu) & (data ? MSR_DR : MSR_IR)); 458 int r; 459 460 if (relocated) { 461 r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data, iswrite); 462 } else { 463 pte->eaddr = eaddr; 464 pte->raddr = eaddr & KVM_PAM; 465 pte->vpage = VSID_REAL | eaddr >> 12; 466 pte->may_read = true; 467 pte->may_write = true; 468 pte->may_execute = true; 469 r = 0; 470 471 if ((kvmppc_get_msr(vcpu) & (MSR_IR | MSR_DR)) == MSR_DR && 472 !data) { 473 if ((vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) && 474 ((eaddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS)) 475 pte->raddr &= ~SPLIT_HACK_MASK; 476 } 477 } 478 479 return r; 480 } 481 482 int kvmppc_load_last_inst(struct kvm_vcpu *vcpu, 483 enum instruction_fetch_type type, u32 *inst) 484 { 485 ulong pc = kvmppc_get_pc(vcpu); 486 int r; 487 488 if (type == INST_SC) 489 pc -= 4; 490 491 r = kvmppc_ld(vcpu, &pc, sizeof(u32), inst, false); 492 if (r == EMULATE_DONE) 493 return r; 494 else 495 return EMULATE_AGAIN; 496 } 497 EXPORT_SYMBOL_GPL(kvmppc_load_last_inst); 498 499 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) 500 { 501 return 0; 502 } 503 504 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu) 505 { 506 return 0; 507 } 508 509 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu) 510 { 511 } 512 513 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, 514 struct kvm_sregs *sregs) 515 { 516 int ret; 517 518 vcpu_load(vcpu); 519 ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs); 520 vcpu_put(vcpu); 521 522 return ret; 523 } 524 525 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, 526 struct kvm_sregs *sregs) 527 { 528 int ret; 529 530 vcpu_load(vcpu); 531 ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs); 532 vcpu_put(vcpu); 533 534 return ret; 535 } 536 537 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 538 { 539 int i; 540 541 regs->pc = kvmppc_get_pc(vcpu); 542 regs->cr = kvmppc_get_cr(vcpu); 543 regs->ctr = kvmppc_get_ctr(vcpu); 544 regs->lr = kvmppc_get_lr(vcpu); 545 regs->xer = kvmppc_get_xer(vcpu); 546 regs->msr = kvmppc_get_msr(vcpu); 547 regs->srr0 = kvmppc_get_srr0(vcpu); 548 regs->srr1 = kvmppc_get_srr1(vcpu); 549 regs->pid = vcpu->arch.pid; 550 regs->sprg0 = kvmppc_get_sprg0(vcpu); 551 regs->sprg1 = kvmppc_get_sprg1(vcpu); 552 regs->sprg2 = kvmppc_get_sprg2(vcpu); 553 regs->sprg3 = kvmppc_get_sprg3(vcpu); 554 regs->sprg4 = kvmppc_get_sprg4(vcpu); 555 regs->sprg5 = kvmppc_get_sprg5(vcpu); 556 regs->sprg6 = kvmppc_get_sprg6(vcpu); 557 regs->sprg7 = kvmppc_get_sprg7(vcpu); 558 559 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 560 regs->gpr[i] = kvmppc_get_gpr(vcpu, i); 561 562 return 0; 563 } 564 565 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 566 { 567 int i; 568 569 kvmppc_set_pc(vcpu, regs->pc); 570 kvmppc_set_cr(vcpu, regs->cr); 571 kvmppc_set_ctr(vcpu, regs->ctr); 572 kvmppc_set_lr(vcpu, regs->lr); 573 kvmppc_set_xer(vcpu, regs->xer); 574 kvmppc_set_msr(vcpu, regs->msr); 575 kvmppc_set_srr0(vcpu, regs->srr0); 576 kvmppc_set_srr1(vcpu, regs->srr1); 577 kvmppc_set_sprg0(vcpu, regs->sprg0); 578 kvmppc_set_sprg1(vcpu, regs->sprg1); 579 kvmppc_set_sprg2(vcpu, regs->sprg2); 580 kvmppc_set_sprg3(vcpu, regs->sprg3); 581 kvmppc_set_sprg4(vcpu, regs->sprg4); 582 kvmppc_set_sprg5(vcpu, regs->sprg5); 583 kvmppc_set_sprg6(vcpu, regs->sprg6); 584 kvmppc_set_sprg7(vcpu, regs->sprg7); 585 586 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 587 kvmppc_set_gpr(vcpu, i, regs->gpr[i]); 588 589 return 0; 590 } 591 592 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 593 { 594 return -ENOTSUPP; 595 } 596 597 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 598 { 599 return -ENOTSUPP; 600 } 601 602 int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id, 603 union kvmppc_one_reg *val) 604 { 605 int r = 0; 606 long int i; 607 608 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val); 609 if (r == -EINVAL) { 610 r = 0; 611 switch (id) { 612 case KVM_REG_PPC_DAR: 613 *val = get_reg_val(id, kvmppc_get_dar(vcpu)); 614 break; 615 case KVM_REG_PPC_DSISR: 616 *val = get_reg_val(id, kvmppc_get_dsisr(vcpu)); 617 break; 618 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31: 619 i = id - KVM_REG_PPC_FPR0; 620 *val = get_reg_val(id, VCPU_FPR(vcpu, i)); 621 break; 622 case KVM_REG_PPC_FPSCR: 623 *val = get_reg_val(id, vcpu->arch.fp.fpscr); 624 break; 625 #ifdef CONFIG_VSX 626 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31: 627 if (cpu_has_feature(CPU_FTR_VSX)) { 628 i = id - KVM_REG_PPC_VSR0; 629 val->vsxval[0] = vcpu->arch.fp.fpr[i][0]; 630 val->vsxval[1] = vcpu->arch.fp.fpr[i][1]; 631 } else { 632 r = -ENXIO; 633 } 634 break; 635 #endif /* CONFIG_VSX */ 636 case KVM_REG_PPC_DEBUG_INST: 637 *val = get_reg_val(id, INS_TW); 638 break; 639 #ifdef CONFIG_KVM_XICS 640 case KVM_REG_PPC_ICP_STATE: 641 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) { 642 r = -ENXIO; 643 break; 644 } 645 if (xics_on_xive()) 646 *val = get_reg_val(id, kvmppc_xive_get_icp(vcpu)); 647 else 648 *val = get_reg_val(id, kvmppc_xics_get_icp(vcpu)); 649 break; 650 #endif /* CONFIG_KVM_XICS */ 651 #ifdef CONFIG_KVM_XIVE 652 case KVM_REG_PPC_VP_STATE: 653 if (!vcpu->arch.xive_vcpu) { 654 r = -ENXIO; 655 break; 656 } 657 if (xive_enabled()) 658 r = kvmppc_xive_native_get_vp(vcpu, val); 659 else 660 r = -ENXIO; 661 break; 662 #endif /* CONFIG_KVM_XIVE */ 663 case KVM_REG_PPC_FSCR: 664 *val = get_reg_val(id, vcpu->arch.fscr); 665 break; 666 case KVM_REG_PPC_TAR: 667 *val = get_reg_val(id, vcpu->arch.tar); 668 break; 669 case KVM_REG_PPC_EBBHR: 670 *val = get_reg_val(id, vcpu->arch.ebbhr); 671 break; 672 case KVM_REG_PPC_EBBRR: 673 *val = get_reg_val(id, vcpu->arch.ebbrr); 674 break; 675 case KVM_REG_PPC_BESCR: 676 *val = get_reg_val(id, vcpu->arch.bescr); 677 break; 678 case KVM_REG_PPC_IC: 679 *val = get_reg_val(id, vcpu->arch.ic); 680 break; 681 default: 682 r = -EINVAL; 683 break; 684 } 685 } 686 687 return r; 688 } 689 690 int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id, 691 union kvmppc_one_reg *val) 692 { 693 int r = 0; 694 long int i; 695 696 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val); 697 if (r == -EINVAL) { 698 r = 0; 699 switch (id) { 700 case KVM_REG_PPC_DAR: 701 kvmppc_set_dar(vcpu, set_reg_val(id, *val)); 702 break; 703 case KVM_REG_PPC_DSISR: 704 kvmppc_set_dsisr(vcpu, set_reg_val(id, *val)); 705 break; 706 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31: 707 i = id - KVM_REG_PPC_FPR0; 708 VCPU_FPR(vcpu, i) = set_reg_val(id, *val); 709 break; 710 case KVM_REG_PPC_FPSCR: 711 vcpu->arch.fp.fpscr = set_reg_val(id, *val); 712 break; 713 #ifdef CONFIG_VSX 714 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31: 715 if (cpu_has_feature(CPU_FTR_VSX)) { 716 i = id - KVM_REG_PPC_VSR0; 717 vcpu->arch.fp.fpr[i][0] = val->vsxval[0]; 718 vcpu->arch.fp.fpr[i][1] = val->vsxval[1]; 719 } else { 720 r = -ENXIO; 721 } 722 break; 723 #endif /* CONFIG_VSX */ 724 #ifdef CONFIG_KVM_XICS 725 case KVM_REG_PPC_ICP_STATE: 726 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) { 727 r = -ENXIO; 728 break; 729 } 730 if (xics_on_xive()) 731 r = kvmppc_xive_set_icp(vcpu, set_reg_val(id, *val)); 732 else 733 r = kvmppc_xics_set_icp(vcpu, set_reg_val(id, *val)); 734 break; 735 #endif /* CONFIG_KVM_XICS */ 736 #ifdef CONFIG_KVM_XIVE 737 case KVM_REG_PPC_VP_STATE: 738 if (!vcpu->arch.xive_vcpu) { 739 r = -ENXIO; 740 break; 741 } 742 if (xive_enabled()) 743 r = kvmppc_xive_native_set_vp(vcpu, val); 744 else 745 r = -ENXIO; 746 break; 747 #endif /* CONFIG_KVM_XIVE */ 748 case KVM_REG_PPC_FSCR: 749 vcpu->arch.fscr = set_reg_val(id, *val); 750 break; 751 case KVM_REG_PPC_TAR: 752 vcpu->arch.tar = set_reg_val(id, *val); 753 break; 754 case KVM_REG_PPC_EBBHR: 755 vcpu->arch.ebbhr = set_reg_val(id, *val); 756 break; 757 case KVM_REG_PPC_EBBRR: 758 vcpu->arch.ebbrr = set_reg_val(id, *val); 759 break; 760 case KVM_REG_PPC_BESCR: 761 vcpu->arch.bescr = set_reg_val(id, *val); 762 break; 763 case KVM_REG_PPC_IC: 764 vcpu->arch.ic = set_reg_val(id, *val); 765 break; 766 default: 767 r = -EINVAL; 768 break; 769 } 770 } 771 772 return r; 773 } 774 775 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 776 { 777 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu); 778 } 779 780 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu) 781 { 782 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu); 783 } 784 785 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr) 786 { 787 vcpu->kvm->arch.kvm_ops->set_msr(vcpu, msr); 788 } 789 EXPORT_SYMBOL_GPL(kvmppc_set_msr); 790 791 int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) 792 { 793 return vcpu->kvm->arch.kvm_ops->vcpu_run(kvm_run, vcpu); 794 } 795 796 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, 797 struct kvm_translation *tr) 798 { 799 return 0; 800 } 801 802 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu, 803 struct kvm_guest_debug *dbg) 804 { 805 vcpu_load(vcpu); 806 vcpu->guest_debug = dbg->control; 807 vcpu_put(vcpu); 808 return 0; 809 } 810 811 void kvmppc_decrementer_func(struct kvm_vcpu *vcpu) 812 { 813 kvmppc_core_queue_dec(vcpu); 814 kvm_vcpu_kick(vcpu); 815 } 816 817 struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id) 818 { 819 return kvm->arch.kvm_ops->vcpu_create(kvm, id); 820 } 821 822 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu) 823 { 824 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu); 825 } 826 827 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu) 828 { 829 return vcpu->kvm->arch.kvm_ops->check_requests(vcpu); 830 } 831 832 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log) 833 { 834 return kvm->arch.kvm_ops->get_dirty_log(kvm, log); 835 } 836 837 void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free, 838 struct kvm_memory_slot *dont) 839 { 840 kvm->arch.kvm_ops->free_memslot(free, dont); 841 } 842 843 int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot, 844 unsigned long npages) 845 { 846 return kvm->arch.kvm_ops->create_memslot(slot, npages); 847 } 848 849 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot) 850 { 851 kvm->arch.kvm_ops->flush_memslot(kvm, memslot); 852 } 853 854 int kvmppc_core_prepare_memory_region(struct kvm *kvm, 855 struct kvm_memory_slot *memslot, 856 const struct kvm_userspace_memory_region *mem) 857 { 858 return kvm->arch.kvm_ops->prepare_memory_region(kvm, memslot, mem); 859 } 860 861 void kvmppc_core_commit_memory_region(struct kvm *kvm, 862 const struct kvm_userspace_memory_region *mem, 863 const struct kvm_memory_slot *old, 864 const struct kvm_memory_slot *new, 865 enum kvm_mr_change change) 866 { 867 kvm->arch.kvm_ops->commit_memory_region(kvm, mem, old, new, change); 868 } 869 870 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end) 871 { 872 return kvm->arch.kvm_ops->unmap_hva_range(kvm, start, end); 873 } 874 875 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end) 876 { 877 return kvm->arch.kvm_ops->age_hva(kvm, start, end); 878 } 879 880 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva) 881 { 882 return kvm->arch.kvm_ops->test_age_hva(kvm, hva); 883 } 884 885 int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte) 886 { 887 kvm->arch.kvm_ops->set_spte_hva(kvm, hva, pte); 888 return 0; 889 } 890 891 void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu) 892 { 893 vcpu->kvm->arch.kvm_ops->mmu_destroy(vcpu); 894 } 895 896 int kvmppc_core_init_vm(struct kvm *kvm) 897 { 898 899 #ifdef CONFIG_PPC64 900 INIT_LIST_HEAD_RCU(&kvm->arch.spapr_tce_tables); 901 INIT_LIST_HEAD(&kvm->arch.rtas_tokens); 902 mutex_init(&kvm->arch.rtas_token_lock); 903 #endif 904 905 return kvm->arch.kvm_ops->init_vm(kvm); 906 } 907 908 void kvmppc_core_destroy_vm(struct kvm *kvm) 909 { 910 kvm->arch.kvm_ops->destroy_vm(kvm); 911 912 #ifdef CONFIG_PPC64 913 kvmppc_rtas_tokens_free(kvm); 914 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables)); 915 #endif 916 917 #ifdef CONFIG_KVM_XICS 918 /* 919 * Free the XIVE devices which are not directly freed by the 920 * device 'release' method 921 */ 922 kfree(kvm->arch.xive_devices.native); 923 kvm->arch.xive_devices.native = NULL; 924 kfree(kvm->arch.xive_devices.xics_on_xive); 925 kvm->arch.xive_devices.xics_on_xive = NULL; 926 #endif /* CONFIG_KVM_XICS */ 927 } 928 929 int kvmppc_h_logical_ci_load(struct kvm_vcpu *vcpu) 930 { 931 unsigned long size = kvmppc_get_gpr(vcpu, 4); 932 unsigned long addr = kvmppc_get_gpr(vcpu, 5); 933 u64 buf; 934 int srcu_idx; 935 int ret; 936 937 if (!is_power_of_2(size) || (size > sizeof(buf))) 938 return H_TOO_HARD; 939 940 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 941 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, size, &buf); 942 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 943 if (ret != 0) 944 return H_TOO_HARD; 945 946 switch (size) { 947 case 1: 948 kvmppc_set_gpr(vcpu, 4, *(u8 *)&buf); 949 break; 950 951 case 2: 952 kvmppc_set_gpr(vcpu, 4, be16_to_cpu(*(__be16 *)&buf)); 953 break; 954 955 case 4: 956 kvmppc_set_gpr(vcpu, 4, be32_to_cpu(*(__be32 *)&buf)); 957 break; 958 959 case 8: 960 kvmppc_set_gpr(vcpu, 4, be64_to_cpu(*(__be64 *)&buf)); 961 break; 962 963 default: 964 BUG(); 965 } 966 967 return H_SUCCESS; 968 } 969 EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_load); 970 971 int kvmppc_h_logical_ci_store(struct kvm_vcpu *vcpu) 972 { 973 unsigned long size = kvmppc_get_gpr(vcpu, 4); 974 unsigned long addr = kvmppc_get_gpr(vcpu, 5); 975 unsigned long val = kvmppc_get_gpr(vcpu, 6); 976 u64 buf; 977 int srcu_idx; 978 int ret; 979 980 switch (size) { 981 case 1: 982 *(u8 *)&buf = val; 983 break; 984 985 case 2: 986 *(__be16 *)&buf = cpu_to_be16(val); 987 break; 988 989 case 4: 990 *(__be32 *)&buf = cpu_to_be32(val); 991 break; 992 993 case 8: 994 *(__be64 *)&buf = cpu_to_be64(val); 995 break; 996 997 default: 998 return H_TOO_HARD; 999 } 1000 1001 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 1002 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, size, &buf); 1003 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 1004 if (ret != 0) 1005 return H_TOO_HARD; 1006 1007 return H_SUCCESS; 1008 } 1009 EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_store); 1010 1011 int kvmppc_core_check_processor_compat(void) 1012 { 1013 /* 1014 * We always return 0 for book3s. We check 1015 * for compatibility while loading the HV 1016 * or PR module 1017 */ 1018 return 0; 1019 } 1020 1021 int kvmppc_book3s_hcall_implemented(struct kvm *kvm, unsigned long hcall) 1022 { 1023 return kvm->arch.kvm_ops->hcall_implemented(hcall); 1024 } 1025 1026 #ifdef CONFIG_KVM_XICS 1027 int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level, 1028 bool line_status) 1029 { 1030 if (xics_on_xive()) 1031 return kvmppc_xive_set_irq(kvm, irq_source_id, irq, level, 1032 line_status); 1033 else 1034 return kvmppc_xics_set_irq(kvm, irq_source_id, irq, level, 1035 line_status); 1036 } 1037 1038 int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *irq_entry, 1039 struct kvm *kvm, int irq_source_id, 1040 int level, bool line_status) 1041 { 1042 return kvm_set_irq(kvm, irq_source_id, irq_entry->gsi, 1043 level, line_status); 1044 } 1045 static int kvmppc_book3s_set_irq(struct kvm_kernel_irq_routing_entry *e, 1046 struct kvm *kvm, int irq_source_id, int level, 1047 bool line_status) 1048 { 1049 return kvm_set_irq(kvm, irq_source_id, e->gsi, level, line_status); 1050 } 1051 1052 int kvm_irq_map_gsi(struct kvm *kvm, 1053 struct kvm_kernel_irq_routing_entry *entries, int gsi) 1054 { 1055 entries->gsi = gsi; 1056 entries->type = KVM_IRQ_ROUTING_IRQCHIP; 1057 entries->set = kvmppc_book3s_set_irq; 1058 entries->irqchip.irqchip = 0; 1059 entries->irqchip.pin = gsi; 1060 return 1; 1061 } 1062 1063 int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin) 1064 { 1065 return pin; 1066 } 1067 1068 #endif /* CONFIG_KVM_XICS */ 1069 1070 static int kvmppc_book3s_init(void) 1071 { 1072 int r; 1073 1074 r = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE); 1075 if (r) 1076 return r; 1077 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER 1078 r = kvmppc_book3s_init_pr(); 1079 #endif 1080 1081 #ifdef CONFIG_KVM_XICS 1082 #ifdef CONFIG_KVM_XIVE 1083 if (xics_on_xive()) { 1084 kvmppc_xive_init_module(); 1085 kvm_register_device_ops(&kvm_xive_ops, KVM_DEV_TYPE_XICS); 1086 if (kvmppc_xive_native_supported()) { 1087 kvmppc_xive_native_init_module(); 1088 kvm_register_device_ops(&kvm_xive_native_ops, 1089 KVM_DEV_TYPE_XIVE); 1090 } 1091 } else 1092 #endif 1093 kvm_register_device_ops(&kvm_xics_ops, KVM_DEV_TYPE_XICS); 1094 #endif 1095 return r; 1096 } 1097 1098 static void kvmppc_book3s_exit(void) 1099 { 1100 #ifdef CONFIG_KVM_XICS 1101 if (xics_on_xive()) { 1102 kvmppc_xive_exit_module(); 1103 kvmppc_xive_native_exit_module(); 1104 } 1105 #endif 1106 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER 1107 kvmppc_book3s_exit_pr(); 1108 #endif 1109 kvm_exit(); 1110 } 1111 1112 module_init(kvmppc_book3s_init); 1113 module_exit(kvmppc_book3s_exit); 1114 1115 /* On 32bit this is our one and only kernel module */ 1116 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER 1117 MODULE_ALIAS_MISCDEV(KVM_MINOR); 1118 MODULE_ALIAS("devname:kvm"); 1119 #endif 1120