1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved. 4 * 5 * Authors: 6 * Alexander Graf <agraf@suse.de> 7 * Kevin Wolf <mail@kevin-wolf.de> 8 * 9 * Description: 10 * This file is derived from arch/powerpc/kvm/44x.c, 11 * by Hollis Blanchard <hollisb@us.ibm.com>. 12 */ 13 14 #include <linux/kvm_host.h> 15 #include <linux/err.h> 16 #include <linux/export.h> 17 #include <linux/slab.h> 18 #include <linux/module.h> 19 #include <linux/miscdevice.h> 20 #include <linux/gfp.h> 21 #include <linux/sched.h> 22 #include <linux/vmalloc.h> 23 #include <linux/highmem.h> 24 25 #include <asm/reg.h> 26 #include <asm/cputable.h> 27 #include <asm/cacheflush.h> 28 #include <linux/uaccess.h> 29 #include <asm/io.h> 30 #include <asm/kvm_ppc.h> 31 #include <asm/kvm_book3s.h> 32 #include <asm/mmu_context.h> 33 #include <asm/page.h> 34 #include <asm/xive.h> 35 36 #include "book3s.h" 37 #include "trace.h" 38 39 /* #define EXIT_DEBUG */ 40 41 struct kvm_stats_debugfs_item debugfs_entries[] = { 42 VCPU_STAT("exits", sum_exits), 43 VCPU_STAT("mmio", mmio_exits), 44 VCPU_STAT("sig", signal_exits), 45 VCPU_STAT("sysc", syscall_exits), 46 VCPU_STAT("inst_emu", emulated_inst_exits), 47 VCPU_STAT("dec", dec_exits), 48 VCPU_STAT("ext_intr", ext_intr_exits), 49 VCPU_STAT("queue_intr", queue_intr), 50 VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns), 51 VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns), 52 VCPU_STAT("halt_wait_ns", halt_wait_ns), 53 VCPU_STAT("halt_successful_poll", halt_successful_poll), 54 VCPU_STAT("halt_attempted_poll", halt_attempted_poll), 55 VCPU_STAT("halt_successful_wait", halt_successful_wait), 56 VCPU_STAT("halt_poll_invalid", halt_poll_invalid), 57 VCPU_STAT("halt_wakeup", halt_wakeup), 58 VCPU_STAT("pf_storage", pf_storage), 59 VCPU_STAT("sp_storage", sp_storage), 60 VCPU_STAT("pf_instruc", pf_instruc), 61 VCPU_STAT("sp_instruc", sp_instruc), 62 VCPU_STAT("ld", ld), 63 VCPU_STAT("ld_slow", ld_slow), 64 VCPU_STAT("st", st), 65 VCPU_STAT("st_slow", st_slow), 66 VCPU_STAT("pthru_all", pthru_all), 67 VCPU_STAT("pthru_host", pthru_host), 68 VCPU_STAT("pthru_bad_aff", pthru_bad_aff), 69 VM_STAT("largepages_2M", num_2M_pages, .mode = 0444), 70 VM_STAT("largepages_1G", num_1G_pages, .mode = 0444), 71 { NULL } 72 }; 73 74 static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu, 75 unsigned long pending_now, unsigned long old_pending) 76 { 77 if (is_kvmppc_hv_enabled(vcpu->kvm)) 78 return; 79 if (pending_now) 80 kvmppc_set_int_pending(vcpu, 1); 81 else if (old_pending) 82 kvmppc_set_int_pending(vcpu, 0); 83 } 84 85 static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu) 86 { 87 ulong crit_raw; 88 ulong crit_r1; 89 bool crit; 90 91 if (is_kvmppc_hv_enabled(vcpu->kvm)) 92 return false; 93 94 crit_raw = kvmppc_get_critical(vcpu); 95 crit_r1 = kvmppc_get_gpr(vcpu, 1); 96 97 /* Truncate crit indicators in 32 bit mode */ 98 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) { 99 crit_raw &= 0xffffffff; 100 crit_r1 &= 0xffffffff; 101 } 102 103 /* Critical section when crit == r1 */ 104 crit = (crit_raw == crit_r1); 105 /* ... and we're in supervisor mode */ 106 crit = crit && !(kvmppc_get_msr(vcpu) & MSR_PR); 107 108 return crit; 109 } 110 111 void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags) 112 { 113 vcpu->kvm->arch.kvm_ops->inject_interrupt(vcpu, vec, flags); 114 } 115 116 static int kvmppc_book3s_vec2irqprio(unsigned int vec) 117 { 118 unsigned int prio; 119 120 switch (vec) { 121 case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET; break; 122 case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK; break; 123 case 0x300: prio = BOOK3S_IRQPRIO_DATA_STORAGE; break; 124 case 0x380: prio = BOOK3S_IRQPRIO_DATA_SEGMENT; break; 125 case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE; break; 126 case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT; break; 127 case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL; break; 128 case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT; break; 129 case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM; break; 130 case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL; break; 131 case 0x900: prio = BOOK3S_IRQPRIO_DECREMENTER; break; 132 case 0xc00: prio = BOOK3S_IRQPRIO_SYSCALL; break; 133 case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG; break; 134 case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC; break; 135 case 0xf40: prio = BOOK3S_IRQPRIO_VSX; break; 136 case 0xf60: prio = BOOK3S_IRQPRIO_FAC_UNAVAIL; break; 137 default: prio = BOOK3S_IRQPRIO_MAX; break; 138 } 139 140 return prio; 141 } 142 143 void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu, 144 unsigned int vec) 145 { 146 unsigned long old_pending = vcpu->arch.pending_exceptions; 147 148 clear_bit(kvmppc_book3s_vec2irqprio(vec), 149 &vcpu->arch.pending_exceptions); 150 151 kvmppc_update_int_pending(vcpu, vcpu->arch.pending_exceptions, 152 old_pending); 153 } 154 155 void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec) 156 { 157 vcpu->stat.queue_intr++; 158 159 set_bit(kvmppc_book3s_vec2irqprio(vec), 160 &vcpu->arch.pending_exceptions); 161 #ifdef EXIT_DEBUG 162 printk(KERN_INFO "Queueing interrupt %x\n", vec); 163 #endif 164 } 165 EXPORT_SYMBOL_GPL(kvmppc_book3s_queue_irqprio); 166 167 void kvmppc_core_queue_machine_check(struct kvm_vcpu *vcpu, ulong flags) 168 { 169 /* might as well deliver this straight away */ 170 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_MACHINE_CHECK, flags); 171 } 172 EXPORT_SYMBOL_GPL(kvmppc_core_queue_machine_check); 173 174 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags) 175 { 176 /* might as well deliver this straight away */ 177 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, flags); 178 } 179 EXPORT_SYMBOL_GPL(kvmppc_core_queue_program); 180 181 void kvmppc_core_queue_fpunavail(struct kvm_vcpu *vcpu) 182 { 183 /* might as well deliver this straight away */ 184 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, 0); 185 } 186 187 void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu) 188 { 189 /* might as well deliver this straight away */ 190 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_ALTIVEC, 0); 191 } 192 193 void kvmppc_core_queue_vsx_unavail(struct kvm_vcpu *vcpu) 194 { 195 /* might as well deliver this straight away */ 196 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_VSX, 0); 197 } 198 199 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu) 200 { 201 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER); 202 } 203 EXPORT_SYMBOL_GPL(kvmppc_core_queue_dec); 204 205 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu) 206 { 207 return test_bit(BOOK3S_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 208 } 209 EXPORT_SYMBOL_GPL(kvmppc_core_pending_dec); 210 211 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu) 212 { 213 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER); 214 } 215 EXPORT_SYMBOL_GPL(kvmppc_core_dequeue_dec); 216 217 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, 218 struct kvm_interrupt *irq) 219 { 220 /* 221 * This case (KVM_INTERRUPT_SET) should never actually arise for 222 * a pseries guest (because pseries guests expect their interrupt 223 * controllers to continue asserting an external interrupt request 224 * until it is acknowledged at the interrupt controller), but is 225 * included to avoid ABI breakage and potentially for other 226 * sorts of guest. 227 * 228 * There is a subtlety here: HV KVM does not test the 229 * external_oneshot flag in the code that synthesizes 230 * external interrupts for the guest just before entering 231 * the guest. That is OK even if userspace did do a 232 * KVM_INTERRUPT_SET on a pseries guest vcpu, because the 233 * caller (kvm_vcpu_ioctl_interrupt) does a kvm_vcpu_kick() 234 * which ends up doing a smp_send_reschedule(), which will 235 * pull the guest all the way out to the host, meaning that 236 * we will call kvmppc_core_prepare_to_enter() before entering 237 * the guest again, and that will handle the external_oneshot 238 * flag correctly. 239 */ 240 if (irq->irq == KVM_INTERRUPT_SET) 241 vcpu->arch.external_oneshot = 1; 242 243 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL); 244 } 245 246 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu) 247 { 248 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL); 249 } 250 251 void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, ulong dar, 252 ulong flags) 253 { 254 kvmppc_set_dar(vcpu, dar); 255 kvmppc_set_dsisr(vcpu, flags); 256 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE, 0); 257 } 258 EXPORT_SYMBOL_GPL(kvmppc_core_queue_data_storage); 259 260 void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong flags) 261 { 262 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_INST_STORAGE, flags); 263 } 264 EXPORT_SYMBOL_GPL(kvmppc_core_queue_inst_storage); 265 266 static int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu, 267 unsigned int priority) 268 { 269 int deliver = 1; 270 int vec = 0; 271 bool crit = kvmppc_critical_section(vcpu); 272 273 switch (priority) { 274 case BOOK3S_IRQPRIO_DECREMENTER: 275 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit; 276 vec = BOOK3S_INTERRUPT_DECREMENTER; 277 break; 278 case BOOK3S_IRQPRIO_EXTERNAL: 279 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit; 280 vec = BOOK3S_INTERRUPT_EXTERNAL; 281 break; 282 case BOOK3S_IRQPRIO_SYSTEM_RESET: 283 vec = BOOK3S_INTERRUPT_SYSTEM_RESET; 284 break; 285 case BOOK3S_IRQPRIO_MACHINE_CHECK: 286 vec = BOOK3S_INTERRUPT_MACHINE_CHECK; 287 break; 288 case BOOK3S_IRQPRIO_DATA_STORAGE: 289 vec = BOOK3S_INTERRUPT_DATA_STORAGE; 290 break; 291 case BOOK3S_IRQPRIO_INST_STORAGE: 292 vec = BOOK3S_INTERRUPT_INST_STORAGE; 293 break; 294 case BOOK3S_IRQPRIO_DATA_SEGMENT: 295 vec = BOOK3S_INTERRUPT_DATA_SEGMENT; 296 break; 297 case BOOK3S_IRQPRIO_INST_SEGMENT: 298 vec = BOOK3S_INTERRUPT_INST_SEGMENT; 299 break; 300 case BOOK3S_IRQPRIO_ALIGNMENT: 301 vec = BOOK3S_INTERRUPT_ALIGNMENT; 302 break; 303 case BOOK3S_IRQPRIO_PROGRAM: 304 vec = BOOK3S_INTERRUPT_PROGRAM; 305 break; 306 case BOOK3S_IRQPRIO_VSX: 307 vec = BOOK3S_INTERRUPT_VSX; 308 break; 309 case BOOK3S_IRQPRIO_ALTIVEC: 310 vec = BOOK3S_INTERRUPT_ALTIVEC; 311 break; 312 case BOOK3S_IRQPRIO_FP_UNAVAIL: 313 vec = BOOK3S_INTERRUPT_FP_UNAVAIL; 314 break; 315 case BOOK3S_IRQPRIO_SYSCALL: 316 vec = BOOK3S_INTERRUPT_SYSCALL; 317 break; 318 case BOOK3S_IRQPRIO_DEBUG: 319 vec = BOOK3S_INTERRUPT_TRACE; 320 break; 321 case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR: 322 vec = BOOK3S_INTERRUPT_PERFMON; 323 break; 324 case BOOK3S_IRQPRIO_FAC_UNAVAIL: 325 vec = BOOK3S_INTERRUPT_FAC_UNAVAIL; 326 break; 327 default: 328 deliver = 0; 329 printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority); 330 break; 331 } 332 333 #if 0 334 printk(KERN_INFO "Deliver interrupt 0x%x? %x\n", vec, deliver); 335 #endif 336 337 if (deliver) 338 kvmppc_inject_interrupt(vcpu, vec, 0); 339 340 return deliver; 341 } 342 343 /* 344 * This function determines if an irqprio should be cleared once issued. 345 */ 346 static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority) 347 { 348 switch (priority) { 349 case BOOK3S_IRQPRIO_DECREMENTER: 350 /* DEC interrupts get cleared by mtdec */ 351 return false; 352 case BOOK3S_IRQPRIO_EXTERNAL: 353 /* 354 * External interrupts get cleared by userspace 355 * except when set by the KVM_INTERRUPT ioctl with 356 * KVM_INTERRUPT_SET (not KVM_INTERRUPT_SET_LEVEL). 357 */ 358 if (vcpu->arch.external_oneshot) { 359 vcpu->arch.external_oneshot = 0; 360 return true; 361 } 362 return false; 363 } 364 365 return true; 366 } 367 368 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu) 369 { 370 unsigned long *pending = &vcpu->arch.pending_exceptions; 371 unsigned long old_pending = vcpu->arch.pending_exceptions; 372 unsigned int priority; 373 374 #ifdef EXIT_DEBUG 375 if (vcpu->arch.pending_exceptions) 376 printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions); 377 #endif 378 priority = __ffs(*pending); 379 while (priority < BOOK3S_IRQPRIO_MAX) { 380 if (kvmppc_book3s_irqprio_deliver(vcpu, priority) && 381 clear_irqprio(vcpu, priority)) { 382 clear_bit(priority, &vcpu->arch.pending_exceptions); 383 break; 384 } 385 386 priority = find_next_bit(pending, 387 BITS_PER_BYTE * sizeof(*pending), 388 priority + 1); 389 } 390 391 /* Tell the guest about our interrupt status */ 392 kvmppc_update_int_pending(vcpu, *pending, old_pending); 393 394 return 0; 395 } 396 EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter); 397 398 kvm_pfn_t kvmppc_gpa_to_pfn(struct kvm_vcpu *vcpu, gpa_t gpa, bool writing, 399 bool *writable) 400 { 401 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM; 402 gfn_t gfn = gpa >> PAGE_SHIFT; 403 404 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) 405 mp_pa = (uint32_t)mp_pa; 406 407 /* Magic page override */ 408 gpa &= ~0xFFFULL; 409 if (unlikely(mp_pa) && unlikely((gpa & KVM_PAM) == mp_pa)) { 410 ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK; 411 kvm_pfn_t pfn; 412 413 pfn = (kvm_pfn_t)virt_to_phys((void*)shared_page) >> PAGE_SHIFT; 414 get_page(pfn_to_page(pfn)); 415 if (writable) 416 *writable = true; 417 return pfn; 418 } 419 420 return gfn_to_pfn_prot(vcpu->kvm, gfn, writing, writable); 421 } 422 EXPORT_SYMBOL_GPL(kvmppc_gpa_to_pfn); 423 424 int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid, 425 enum xlate_readwrite xlrw, struct kvmppc_pte *pte) 426 { 427 bool data = (xlid == XLATE_DATA); 428 bool iswrite = (xlrw == XLATE_WRITE); 429 int relocated = (kvmppc_get_msr(vcpu) & (data ? MSR_DR : MSR_IR)); 430 int r; 431 432 if (relocated) { 433 r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data, iswrite); 434 } else { 435 pte->eaddr = eaddr; 436 pte->raddr = eaddr & KVM_PAM; 437 pte->vpage = VSID_REAL | eaddr >> 12; 438 pte->may_read = true; 439 pte->may_write = true; 440 pte->may_execute = true; 441 r = 0; 442 443 if ((kvmppc_get_msr(vcpu) & (MSR_IR | MSR_DR)) == MSR_DR && 444 !data) { 445 if ((vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) && 446 ((eaddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS)) 447 pte->raddr &= ~SPLIT_HACK_MASK; 448 } 449 } 450 451 return r; 452 } 453 454 int kvmppc_load_last_inst(struct kvm_vcpu *vcpu, 455 enum instruction_fetch_type type, u32 *inst) 456 { 457 ulong pc = kvmppc_get_pc(vcpu); 458 int r; 459 460 if (type == INST_SC) 461 pc -= 4; 462 463 r = kvmppc_ld(vcpu, &pc, sizeof(u32), inst, false); 464 if (r == EMULATE_DONE) 465 return r; 466 else 467 return EMULATE_AGAIN; 468 } 469 EXPORT_SYMBOL_GPL(kvmppc_load_last_inst); 470 471 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu) 472 { 473 return 0; 474 } 475 476 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu) 477 { 478 } 479 480 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, 481 struct kvm_sregs *sregs) 482 { 483 int ret; 484 485 vcpu_load(vcpu); 486 ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs); 487 vcpu_put(vcpu); 488 489 return ret; 490 } 491 492 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, 493 struct kvm_sregs *sregs) 494 { 495 int ret; 496 497 vcpu_load(vcpu); 498 ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs); 499 vcpu_put(vcpu); 500 501 return ret; 502 } 503 504 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 505 { 506 int i; 507 508 regs->pc = kvmppc_get_pc(vcpu); 509 regs->cr = kvmppc_get_cr(vcpu); 510 regs->ctr = kvmppc_get_ctr(vcpu); 511 regs->lr = kvmppc_get_lr(vcpu); 512 regs->xer = kvmppc_get_xer(vcpu); 513 regs->msr = kvmppc_get_msr(vcpu); 514 regs->srr0 = kvmppc_get_srr0(vcpu); 515 regs->srr1 = kvmppc_get_srr1(vcpu); 516 regs->pid = vcpu->arch.pid; 517 regs->sprg0 = kvmppc_get_sprg0(vcpu); 518 regs->sprg1 = kvmppc_get_sprg1(vcpu); 519 regs->sprg2 = kvmppc_get_sprg2(vcpu); 520 regs->sprg3 = kvmppc_get_sprg3(vcpu); 521 regs->sprg4 = kvmppc_get_sprg4(vcpu); 522 regs->sprg5 = kvmppc_get_sprg5(vcpu); 523 regs->sprg6 = kvmppc_get_sprg6(vcpu); 524 regs->sprg7 = kvmppc_get_sprg7(vcpu); 525 526 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 527 regs->gpr[i] = kvmppc_get_gpr(vcpu, i); 528 529 return 0; 530 } 531 532 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 533 { 534 int i; 535 536 kvmppc_set_pc(vcpu, regs->pc); 537 kvmppc_set_cr(vcpu, regs->cr); 538 kvmppc_set_ctr(vcpu, regs->ctr); 539 kvmppc_set_lr(vcpu, regs->lr); 540 kvmppc_set_xer(vcpu, regs->xer); 541 kvmppc_set_msr(vcpu, regs->msr); 542 kvmppc_set_srr0(vcpu, regs->srr0); 543 kvmppc_set_srr1(vcpu, regs->srr1); 544 kvmppc_set_sprg0(vcpu, regs->sprg0); 545 kvmppc_set_sprg1(vcpu, regs->sprg1); 546 kvmppc_set_sprg2(vcpu, regs->sprg2); 547 kvmppc_set_sprg3(vcpu, regs->sprg3); 548 kvmppc_set_sprg4(vcpu, regs->sprg4); 549 kvmppc_set_sprg5(vcpu, regs->sprg5); 550 kvmppc_set_sprg6(vcpu, regs->sprg6); 551 kvmppc_set_sprg7(vcpu, regs->sprg7); 552 553 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 554 kvmppc_set_gpr(vcpu, i, regs->gpr[i]); 555 556 return 0; 557 } 558 559 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 560 { 561 return -EOPNOTSUPP; 562 } 563 564 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 565 { 566 return -EOPNOTSUPP; 567 } 568 569 int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id, 570 union kvmppc_one_reg *val) 571 { 572 int r = 0; 573 long int i; 574 575 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val); 576 if (r == -EINVAL) { 577 r = 0; 578 switch (id) { 579 case KVM_REG_PPC_DAR: 580 *val = get_reg_val(id, kvmppc_get_dar(vcpu)); 581 break; 582 case KVM_REG_PPC_DSISR: 583 *val = get_reg_val(id, kvmppc_get_dsisr(vcpu)); 584 break; 585 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31: 586 i = id - KVM_REG_PPC_FPR0; 587 *val = get_reg_val(id, VCPU_FPR(vcpu, i)); 588 break; 589 case KVM_REG_PPC_FPSCR: 590 *val = get_reg_val(id, vcpu->arch.fp.fpscr); 591 break; 592 #ifdef CONFIG_VSX 593 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31: 594 if (cpu_has_feature(CPU_FTR_VSX)) { 595 i = id - KVM_REG_PPC_VSR0; 596 val->vsxval[0] = vcpu->arch.fp.fpr[i][0]; 597 val->vsxval[1] = vcpu->arch.fp.fpr[i][1]; 598 } else { 599 r = -ENXIO; 600 } 601 break; 602 #endif /* CONFIG_VSX */ 603 case KVM_REG_PPC_DEBUG_INST: 604 *val = get_reg_val(id, INS_TW); 605 break; 606 #ifdef CONFIG_KVM_XICS 607 case KVM_REG_PPC_ICP_STATE: 608 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) { 609 r = -ENXIO; 610 break; 611 } 612 if (xics_on_xive()) 613 *val = get_reg_val(id, kvmppc_xive_get_icp(vcpu)); 614 else 615 *val = get_reg_val(id, kvmppc_xics_get_icp(vcpu)); 616 break; 617 #endif /* CONFIG_KVM_XICS */ 618 #ifdef CONFIG_KVM_XIVE 619 case KVM_REG_PPC_VP_STATE: 620 if (!vcpu->arch.xive_vcpu) { 621 r = -ENXIO; 622 break; 623 } 624 if (xive_enabled()) 625 r = kvmppc_xive_native_get_vp(vcpu, val); 626 else 627 r = -ENXIO; 628 break; 629 #endif /* CONFIG_KVM_XIVE */ 630 case KVM_REG_PPC_FSCR: 631 *val = get_reg_val(id, vcpu->arch.fscr); 632 break; 633 case KVM_REG_PPC_TAR: 634 *val = get_reg_val(id, vcpu->arch.tar); 635 break; 636 case KVM_REG_PPC_EBBHR: 637 *val = get_reg_val(id, vcpu->arch.ebbhr); 638 break; 639 case KVM_REG_PPC_EBBRR: 640 *val = get_reg_val(id, vcpu->arch.ebbrr); 641 break; 642 case KVM_REG_PPC_BESCR: 643 *val = get_reg_val(id, vcpu->arch.bescr); 644 break; 645 case KVM_REG_PPC_IC: 646 *val = get_reg_val(id, vcpu->arch.ic); 647 break; 648 default: 649 r = -EINVAL; 650 break; 651 } 652 } 653 654 return r; 655 } 656 657 int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id, 658 union kvmppc_one_reg *val) 659 { 660 int r = 0; 661 long int i; 662 663 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val); 664 if (r == -EINVAL) { 665 r = 0; 666 switch (id) { 667 case KVM_REG_PPC_DAR: 668 kvmppc_set_dar(vcpu, set_reg_val(id, *val)); 669 break; 670 case KVM_REG_PPC_DSISR: 671 kvmppc_set_dsisr(vcpu, set_reg_val(id, *val)); 672 break; 673 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31: 674 i = id - KVM_REG_PPC_FPR0; 675 VCPU_FPR(vcpu, i) = set_reg_val(id, *val); 676 break; 677 case KVM_REG_PPC_FPSCR: 678 vcpu->arch.fp.fpscr = set_reg_val(id, *val); 679 break; 680 #ifdef CONFIG_VSX 681 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31: 682 if (cpu_has_feature(CPU_FTR_VSX)) { 683 i = id - KVM_REG_PPC_VSR0; 684 vcpu->arch.fp.fpr[i][0] = val->vsxval[0]; 685 vcpu->arch.fp.fpr[i][1] = val->vsxval[1]; 686 } else { 687 r = -ENXIO; 688 } 689 break; 690 #endif /* CONFIG_VSX */ 691 #ifdef CONFIG_KVM_XICS 692 case KVM_REG_PPC_ICP_STATE: 693 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) { 694 r = -ENXIO; 695 break; 696 } 697 if (xics_on_xive()) 698 r = kvmppc_xive_set_icp(vcpu, set_reg_val(id, *val)); 699 else 700 r = kvmppc_xics_set_icp(vcpu, set_reg_val(id, *val)); 701 break; 702 #endif /* CONFIG_KVM_XICS */ 703 #ifdef CONFIG_KVM_XIVE 704 case KVM_REG_PPC_VP_STATE: 705 if (!vcpu->arch.xive_vcpu) { 706 r = -ENXIO; 707 break; 708 } 709 if (xive_enabled()) 710 r = kvmppc_xive_native_set_vp(vcpu, val); 711 else 712 r = -ENXIO; 713 break; 714 #endif /* CONFIG_KVM_XIVE */ 715 case KVM_REG_PPC_FSCR: 716 vcpu->arch.fscr = set_reg_val(id, *val); 717 break; 718 case KVM_REG_PPC_TAR: 719 vcpu->arch.tar = set_reg_val(id, *val); 720 break; 721 case KVM_REG_PPC_EBBHR: 722 vcpu->arch.ebbhr = set_reg_val(id, *val); 723 break; 724 case KVM_REG_PPC_EBBRR: 725 vcpu->arch.ebbrr = set_reg_val(id, *val); 726 break; 727 case KVM_REG_PPC_BESCR: 728 vcpu->arch.bescr = set_reg_val(id, *val); 729 break; 730 case KVM_REG_PPC_IC: 731 vcpu->arch.ic = set_reg_val(id, *val); 732 break; 733 default: 734 r = -EINVAL; 735 break; 736 } 737 } 738 739 return r; 740 } 741 742 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 743 { 744 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu); 745 } 746 747 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu) 748 { 749 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu); 750 } 751 752 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr) 753 { 754 vcpu->kvm->arch.kvm_ops->set_msr(vcpu, msr); 755 } 756 EXPORT_SYMBOL_GPL(kvmppc_set_msr); 757 758 int kvmppc_vcpu_run(struct kvm_vcpu *vcpu) 759 { 760 return vcpu->kvm->arch.kvm_ops->vcpu_run(vcpu); 761 } 762 763 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, 764 struct kvm_translation *tr) 765 { 766 return 0; 767 } 768 769 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu, 770 struct kvm_guest_debug *dbg) 771 { 772 vcpu_load(vcpu); 773 vcpu->guest_debug = dbg->control; 774 vcpu_put(vcpu); 775 return 0; 776 } 777 778 void kvmppc_decrementer_func(struct kvm_vcpu *vcpu) 779 { 780 kvmppc_core_queue_dec(vcpu); 781 kvm_vcpu_kick(vcpu); 782 } 783 784 int kvmppc_core_vcpu_create(struct kvm_vcpu *vcpu) 785 { 786 return vcpu->kvm->arch.kvm_ops->vcpu_create(vcpu); 787 } 788 789 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu) 790 { 791 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu); 792 } 793 794 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu) 795 { 796 return vcpu->kvm->arch.kvm_ops->check_requests(vcpu); 797 } 798 799 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot) 800 { 801 802 } 803 804 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log) 805 { 806 return kvm->arch.kvm_ops->get_dirty_log(kvm, log); 807 } 808 809 void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot) 810 { 811 kvm->arch.kvm_ops->free_memslot(slot); 812 } 813 814 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot) 815 { 816 kvm->arch.kvm_ops->flush_memslot(kvm, memslot); 817 } 818 819 int kvmppc_core_prepare_memory_region(struct kvm *kvm, 820 struct kvm_memory_slot *memslot, 821 const struct kvm_userspace_memory_region *mem, 822 enum kvm_mr_change change) 823 { 824 return kvm->arch.kvm_ops->prepare_memory_region(kvm, memslot, mem, 825 change); 826 } 827 828 void kvmppc_core_commit_memory_region(struct kvm *kvm, 829 const struct kvm_userspace_memory_region *mem, 830 const struct kvm_memory_slot *old, 831 const struct kvm_memory_slot *new, 832 enum kvm_mr_change change) 833 { 834 kvm->arch.kvm_ops->commit_memory_region(kvm, mem, old, new, change); 835 } 836 837 bool kvm_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range) 838 { 839 return kvm->arch.kvm_ops->unmap_gfn_range(kvm, range); 840 } 841 842 bool kvm_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range) 843 { 844 return kvm->arch.kvm_ops->age_gfn(kvm, range); 845 } 846 847 bool kvm_test_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range) 848 { 849 return kvm->arch.kvm_ops->test_age_gfn(kvm, range); 850 } 851 852 bool kvm_set_spte_gfn(struct kvm *kvm, struct kvm_gfn_range *range) 853 { 854 return kvm->arch.kvm_ops->set_spte_gfn(kvm, range); 855 } 856 857 int kvmppc_core_init_vm(struct kvm *kvm) 858 { 859 860 #ifdef CONFIG_PPC64 861 INIT_LIST_HEAD_RCU(&kvm->arch.spapr_tce_tables); 862 INIT_LIST_HEAD(&kvm->arch.rtas_tokens); 863 mutex_init(&kvm->arch.rtas_token_lock); 864 #endif 865 866 return kvm->arch.kvm_ops->init_vm(kvm); 867 } 868 869 void kvmppc_core_destroy_vm(struct kvm *kvm) 870 { 871 kvm->arch.kvm_ops->destroy_vm(kvm); 872 873 #ifdef CONFIG_PPC64 874 kvmppc_rtas_tokens_free(kvm); 875 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables)); 876 #endif 877 878 #ifdef CONFIG_KVM_XICS 879 /* 880 * Free the XIVE and XICS devices which are not directly freed by the 881 * device 'release' method 882 */ 883 kfree(kvm->arch.xive_devices.native); 884 kvm->arch.xive_devices.native = NULL; 885 kfree(kvm->arch.xive_devices.xics_on_xive); 886 kvm->arch.xive_devices.xics_on_xive = NULL; 887 kfree(kvm->arch.xics_device); 888 kvm->arch.xics_device = NULL; 889 #endif /* CONFIG_KVM_XICS */ 890 } 891 892 int kvmppc_h_logical_ci_load(struct kvm_vcpu *vcpu) 893 { 894 unsigned long size = kvmppc_get_gpr(vcpu, 4); 895 unsigned long addr = kvmppc_get_gpr(vcpu, 5); 896 u64 buf; 897 int srcu_idx; 898 int ret; 899 900 if (!is_power_of_2(size) || (size > sizeof(buf))) 901 return H_TOO_HARD; 902 903 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 904 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, size, &buf); 905 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 906 if (ret != 0) 907 return H_TOO_HARD; 908 909 switch (size) { 910 case 1: 911 kvmppc_set_gpr(vcpu, 4, *(u8 *)&buf); 912 break; 913 914 case 2: 915 kvmppc_set_gpr(vcpu, 4, be16_to_cpu(*(__be16 *)&buf)); 916 break; 917 918 case 4: 919 kvmppc_set_gpr(vcpu, 4, be32_to_cpu(*(__be32 *)&buf)); 920 break; 921 922 case 8: 923 kvmppc_set_gpr(vcpu, 4, be64_to_cpu(*(__be64 *)&buf)); 924 break; 925 926 default: 927 BUG(); 928 } 929 930 return H_SUCCESS; 931 } 932 EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_load); 933 934 int kvmppc_h_logical_ci_store(struct kvm_vcpu *vcpu) 935 { 936 unsigned long size = kvmppc_get_gpr(vcpu, 4); 937 unsigned long addr = kvmppc_get_gpr(vcpu, 5); 938 unsigned long val = kvmppc_get_gpr(vcpu, 6); 939 u64 buf; 940 int srcu_idx; 941 int ret; 942 943 switch (size) { 944 case 1: 945 *(u8 *)&buf = val; 946 break; 947 948 case 2: 949 *(__be16 *)&buf = cpu_to_be16(val); 950 break; 951 952 case 4: 953 *(__be32 *)&buf = cpu_to_be32(val); 954 break; 955 956 case 8: 957 *(__be64 *)&buf = cpu_to_be64(val); 958 break; 959 960 default: 961 return H_TOO_HARD; 962 } 963 964 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 965 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, size, &buf); 966 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 967 if (ret != 0) 968 return H_TOO_HARD; 969 970 return H_SUCCESS; 971 } 972 EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_store); 973 974 int kvmppc_core_check_processor_compat(void) 975 { 976 /* 977 * We always return 0 for book3s. We check 978 * for compatibility while loading the HV 979 * or PR module 980 */ 981 return 0; 982 } 983 984 int kvmppc_book3s_hcall_implemented(struct kvm *kvm, unsigned long hcall) 985 { 986 return kvm->arch.kvm_ops->hcall_implemented(hcall); 987 } 988 989 #ifdef CONFIG_KVM_XICS 990 int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level, 991 bool line_status) 992 { 993 if (xics_on_xive()) 994 return kvmppc_xive_set_irq(kvm, irq_source_id, irq, level, 995 line_status); 996 else 997 return kvmppc_xics_set_irq(kvm, irq_source_id, irq, level, 998 line_status); 999 } 1000 1001 int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *irq_entry, 1002 struct kvm *kvm, int irq_source_id, 1003 int level, bool line_status) 1004 { 1005 return kvm_set_irq(kvm, irq_source_id, irq_entry->gsi, 1006 level, line_status); 1007 } 1008 static int kvmppc_book3s_set_irq(struct kvm_kernel_irq_routing_entry *e, 1009 struct kvm *kvm, int irq_source_id, int level, 1010 bool line_status) 1011 { 1012 return kvm_set_irq(kvm, irq_source_id, e->gsi, level, line_status); 1013 } 1014 1015 int kvm_irq_map_gsi(struct kvm *kvm, 1016 struct kvm_kernel_irq_routing_entry *entries, int gsi) 1017 { 1018 entries->gsi = gsi; 1019 entries->type = KVM_IRQ_ROUTING_IRQCHIP; 1020 entries->set = kvmppc_book3s_set_irq; 1021 entries->irqchip.irqchip = 0; 1022 entries->irqchip.pin = gsi; 1023 return 1; 1024 } 1025 1026 int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin) 1027 { 1028 return pin; 1029 } 1030 1031 #endif /* CONFIG_KVM_XICS */ 1032 1033 static int kvmppc_book3s_init(void) 1034 { 1035 int r; 1036 1037 r = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE); 1038 if (r) 1039 return r; 1040 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER 1041 r = kvmppc_book3s_init_pr(); 1042 #endif 1043 1044 #ifdef CONFIG_KVM_XICS 1045 #ifdef CONFIG_KVM_XIVE 1046 if (xics_on_xive()) { 1047 kvmppc_xive_init_module(); 1048 kvm_register_device_ops(&kvm_xive_ops, KVM_DEV_TYPE_XICS); 1049 if (kvmppc_xive_native_supported()) { 1050 kvmppc_xive_native_init_module(); 1051 kvm_register_device_ops(&kvm_xive_native_ops, 1052 KVM_DEV_TYPE_XIVE); 1053 } 1054 } else 1055 #endif 1056 kvm_register_device_ops(&kvm_xics_ops, KVM_DEV_TYPE_XICS); 1057 #endif 1058 return r; 1059 } 1060 1061 static void kvmppc_book3s_exit(void) 1062 { 1063 #ifdef CONFIG_KVM_XICS 1064 if (xics_on_xive()) { 1065 kvmppc_xive_exit_module(); 1066 kvmppc_xive_native_exit_module(); 1067 } 1068 #endif 1069 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER 1070 kvmppc_book3s_exit_pr(); 1071 #endif 1072 kvm_exit(); 1073 } 1074 1075 module_init(kvmppc_book3s_init); 1076 module_exit(kvmppc_book3s_exit); 1077 1078 /* On 32bit this is our one and only kernel module */ 1079 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER 1080 MODULE_ALIAS_MISCDEV(KVM_MINOR); 1081 MODULE_ALIAS("devname:kvm"); 1082 #endif 1083