xref: /openbmc/linux/arch/powerpc/kvm/book3s.c (revision 3b23dc52)
1 /*
2  * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
3  *
4  * Authors:
5  *    Alexander Graf <agraf@suse.de>
6  *    Kevin Wolf <mail@kevin-wolf.de>
7  *
8  * Description:
9  * This file is derived from arch/powerpc/kvm/44x.c,
10  * by Hollis Blanchard <hollisb@us.ibm.com>.
11  *
12  * This program is free software; you can redistribute it and/or modify
13  * it under the terms of the GNU General Public License, version 2, as
14  * published by the Free Software Foundation.
15  */
16 
17 #include <linux/kvm_host.h>
18 #include <linux/err.h>
19 #include <linux/export.h>
20 #include <linux/slab.h>
21 #include <linux/module.h>
22 #include <linux/miscdevice.h>
23 #include <linux/gfp.h>
24 #include <linux/sched.h>
25 #include <linux/vmalloc.h>
26 #include <linux/highmem.h>
27 
28 #include <asm/reg.h>
29 #include <asm/cputable.h>
30 #include <asm/cacheflush.h>
31 #include <asm/tlbflush.h>
32 #include <linux/uaccess.h>
33 #include <asm/io.h>
34 #include <asm/kvm_ppc.h>
35 #include <asm/kvm_book3s.h>
36 #include <asm/mmu_context.h>
37 #include <asm/page.h>
38 #include <asm/xive.h>
39 
40 #include "book3s.h"
41 #include "trace.h"
42 
43 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
44 
45 /* #define EXIT_DEBUG */
46 
47 struct kvm_stats_debugfs_item debugfs_entries[] = {
48 	{ "exits",       VCPU_STAT(sum_exits) },
49 	{ "mmio",        VCPU_STAT(mmio_exits) },
50 	{ "sig",         VCPU_STAT(signal_exits) },
51 	{ "sysc",        VCPU_STAT(syscall_exits) },
52 	{ "inst_emu",    VCPU_STAT(emulated_inst_exits) },
53 	{ "dec",         VCPU_STAT(dec_exits) },
54 	{ "ext_intr",    VCPU_STAT(ext_intr_exits) },
55 	{ "queue_intr",  VCPU_STAT(queue_intr) },
56 	{ "halt_poll_success_ns",	VCPU_STAT(halt_poll_success_ns) },
57 	{ "halt_poll_fail_ns",		VCPU_STAT(halt_poll_fail_ns) },
58 	{ "halt_wait_ns",		VCPU_STAT(halt_wait_ns) },
59 	{ "halt_successful_poll", VCPU_STAT(halt_successful_poll), },
60 	{ "halt_attempted_poll", VCPU_STAT(halt_attempted_poll), },
61 	{ "halt_successful_wait",	VCPU_STAT(halt_successful_wait) },
62 	{ "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
63 	{ "halt_wakeup", VCPU_STAT(halt_wakeup) },
64 	{ "pf_storage",  VCPU_STAT(pf_storage) },
65 	{ "sp_storage",  VCPU_STAT(sp_storage) },
66 	{ "pf_instruc",  VCPU_STAT(pf_instruc) },
67 	{ "sp_instruc",  VCPU_STAT(sp_instruc) },
68 	{ "ld",          VCPU_STAT(ld) },
69 	{ "ld_slow",     VCPU_STAT(ld_slow) },
70 	{ "st",          VCPU_STAT(st) },
71 	{ "st_slow",     VCPU_STAT(st_slow) },
72 	{ "pthru_all",       VCPU_STAT(pthru_all) },
73 	{ "pthru_host",      VCPU_STAT(pthru_host) },
74 	{ "pthru_bad_aff",   VCPU_STAT(pthru_bad_aff) },
75 	{ NULL }
76 };
77 
78 void kvmppc_unfixup_split_real(struct kvm_vcpu *vcpu)
79 {
80 	if (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) {
81 		ulong pc = kvmppc_get_pc(vcpu);
82 		if ((pc & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS)
83 			kvmppc_set_pc(vcpu, pc & ~SPLIT_HACK_MASK);
84 		vcpu->arch.hflags &= ~BOOK3S_HFLAG_SPLIT_HACK;
85 	}
86 }
87 EXPORT_SYMBOL_GPL(kvmppc_unfixup_split_real);
88 
89 static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
90 {
91 	if (!is_kvmppc_hv_enabled(vcpu->kvm))
92 		return to_book3s(vcpu)->hior;
93 	return 0;
94 }
95 
96 static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
97 			unsigned long pending_now, unsigned long old_pending)
98 {
99 	if (is_kvmppc_hv_enabled(vcpu->kvm))
100 		return;
101 	if (pending_now)
102 		kvmppc_set_int_pending(vcpu, 1);
103 	else if (old_pending)
104 		kvmppc_set_int_pending(vcpu, 0);
105 }
106 
107 static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
108 {
109 	ulong crit_raw;
110 	ulong crit_r1;
111 	bool crit;
112 
113 	if (is_kvmppc_hv_enabled(vcpu->kvm))
114 		return false;
115 
116 	crit_raw = kvmppc_get_critical(vcpu);
117 	crit_r1 = kvmppc_get_gpr(vcpu, 1);
118 
119 	/* Truncate crit indicators in 32 bit mode */
120 	if (!(kvmppc_get_msr(vcpu) & MSR_SF)) {
121 		crit_raw &= 0xffffffff;
122 		crit_r1 &= 0xffffffff;
123 	}
124 
125 	/* Critical section when crit == r1 */
126 	crit = (crit_raw == crit_r1);
127 	/* ... and we're in supervisor mode */
128 	crit = crit && !(kvmppc_get_msr(vcpu) & MSR_PR);
129 
130 	return crit;
131 }
132 
133 void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags)
134 {
135 	kvmppc_unfixup_split_real(vcpu);
136 	kvmppc_set_srr0(vcpu, kvmppc_get_pc(vcpu));
137 	kvmppc_set_srr1(vcpu, (kvmppc_get_msr(vcpu) & ~0x783f0000ul) | flags);
138 	kvmppc_set_pc(vcpu, kvmppc_interrupt_offset(vcpu) + vec);
139 	vcpu->arch.mmu.reset_msr(vcpu);
140 }
141 
142 static int kvmppc_book3s_vec2irqprio(unsigned int vec)
143 {
144 	unsigned int prio;
145 
146 	switch (vec) {
147 	case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET;		break;
148 	case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK;	break;
149 	case 0x300: prio = BOOK3S_IRQPRIO_DATA_STORAGE;		break;
150 	case 0x380: prio = BOOK3S_IRQPRIO_DATA_SEGMENT;		break;
151 	case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE;		break;
152 	case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT;		break;
153 	case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL;		break;
154 	case 0x501: prio = BOOK3S_IRQPRIO_EXTERNAL_LEVEL;	break;
155 	case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT;		break;
156 	case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM;		break;
157 	case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL;		break;
158 	case 0x900: prio = BOOK3S_IRQPRIO_DECREMENTER;		break;
159 	case 0xc00: prio = BOOK3S_IRQPRIO_SYSCALL;		break;
160 	case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG;		break;
161 	case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC;		break;
162 	case 0xf40: prio = BOOK3S_IRQPRIO_VSX;			break;
163 	case 0xf60: prio = BOOK3S_IRQPRIO_FAC_UNAVAIL;		break;
164 	default:    prio = BOOK3S_IRQPRIO_MAX;			break;
165 	}
166 
167 	return prio;
168 }
169 
170 void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu,
171 					  unsigned int vec)
172 {
173 	unsigned long old_pending = vcpu->arch.pending_exceptions;
174 
175 	clear_bit(kvmppc_book3s_vec2irqprio(vec),
176 		  &vcpu->arch.pending_exceptions);
177 
178 	kvmppc_update_int_pending(vcpu, vcpu->arch.pending_exceptions,
179 				  old_pending);
180 }
181 
182 void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec)
183 {
184 	vcpu->stat.queue_intr++;
185 
186 	set_bit(kvmppc_book3s_vec2irqprio(vec),
187 		&vcpu->arch.pending_exceptions);
188 #ifdef EXIT_DEBUG
189 	printk(KERN_INFO "Queueing interrupt %x\n", vec);
190 #endif
191 }
192 EXPORT_SYMBOL_GPL(kvmppc_book3s_queue_irqprio);
193 
194 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags)
195 {
196 	/* might as well deliver this straight away */
197 	kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, flags);
198 }
199 EXPORT_SYMBOL_GPL(kvmppc_core_queue_program);
200 
201 void kvmppc_core_queue_fpunavail(struct kvm_vcpu *vcpu)
202 {
203 	/* might as well deliver this straight away */
204 	kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, 0);
205 }
206 
207 void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu)
208 {
209 	/* might as well deliver this straight away */
210 	kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_ALTIVEC, 0);
211 }
212 
213 void kvmppc_core_queue_vsx_unavail(struct kvm_vcpu *vcpu)
214 {
215 	/* might as well deliver this straight away */
216 	kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_VSX, 0);
217 }
218 
219 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
220 {
221 	kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
222 }
223 EXPORT_SYMBOL_GPL(kvmppc_core_queue_dec);
224 
225 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
226 {
227 	return test_bit(BOOK3S_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
228 }
229 EXPORT_SYMBOL_GPL(kvmppc_core_pending_dec);
230 
231 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
232 {
233 	kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
234 }
235 EXPORT_SYMBOL_GPL(kvmppc_core_dequeue_dec);
236 
237 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
238                                 struct kvm_interrupt *irq)
239 {
240 	unsigned int vec = BOOK3S_INTERRUPT_EXTERNAL;
241 
242 	if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
243 		vec = BOOK3S_INTERRUPT_EXTERNAL_LEVEL;
244 
245 	kvmppc_book3s_queue_irqprio(vcpu, vec);
246 }
247 
248 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
249 {
250 	kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
251 	kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL_LEVEL);
252 }
253 
254 void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, ulong dar,
255 				    ulong flags)
256 {
257 	kvmppc_set_dar(vcpu, dar);
258 	kvmppc_set_dsisr(vcpu, flags);
259 	kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE, 0);
260 }
261 EXPORT_SYMBOL_GPL(kvmppc_core_queue_data_storage);
262 
263 void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong flags)
264 {
265 	kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_INST_STORAGE, flags);
266 }
267 EXPORT_SYMBOL_GPL(kvmppc_core_queue_inst_storage);
268 
269 static int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu,
270 					 unsigned int priority)
271 {
272 	int deliver = 1;
273 	int vec = 0;
274 	bool crit = kvmppc_critical_section(vcpu);
275 
276 	switch (priority) {
277 	case BOOK3S_IRQPRIO_DECREMENTER:
278 		deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
279 		vec = BOOK3S_INTERRUPT_DECREMENTER;
280 		break;
281 	case BOOK3S_IRQPRIO_EXTERNAL:
282 	case BOOK3S_IRQPRIO_EXTERNAL_LEVEL:
283 		deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
284 		vec = BOOK3S_INTERRUPT_EXTERNAL;
285 		break;
286 	case BOOK3S_IRQPRIO_SYSTEM_RESET:
287 		vec = BOOK3S_INTERRUPT_SYSTEM_RESET;
288 		break;
289 	case BOOK3S_IRQPRIO_MACHINE_CHECK:
290 		vec = BOOK3S_INTERRUPT_MACHINE_CHECK;
291 		break;
292 	case BOOK3S_IRQPRIO_DATA_STORAGE:
293 		vec = BOOK3S_INTERRUPT_DATA_STORAGE;
294 		break;
295 	case BOOK3S_IRQPRIO_INST_STORAGE:
296 		vec = BOOK3S_INTERRUPT_INST_STORAGE;
297 		break;
298 	case BOOK3S_IRQPRIO_DATA_SEGMENT:
299 		vec = BOOK3S_INTERRUPT_DATA_SEGMENT;
300 		break;
301 	case BOOK3S_IRQPRIO_INST_SEGMENT:
302 		vec = BOOK3S_INTERRUPT_INST_SEGMENT;
303 		break;
304 	case BOOK3S_IRQPRIO_ALIGNMENT:
305 		vec = BOOK3S_INTERRUPT_ALIGNMENT;
306 		break;
307 	case BOOK3S_IRQPRIO_PROGRAM:
308 		vec = BOOK3S_INTERRUPT_PROGRAM;
309 		break;
310 	case BOOK3S_IRQPRIO_VSX:
311 		vec = BOOK3S_INTERRUPT_VSX;
312 		break;
313 	case BOOK3S_IRQPRIO_ALTIVEC:
314 		vec = BOOK3S_INTERRUPT_ALTIVEC;
315 		break;
316 	case BOOK3S_IRQPRIO_FP_UNAVAIL:
317 		vec = BOOK3S_INTERRUPT_FP_UNAVAIL;
318 		break;
319 	case BOOK3S_IRQPRIO_SYSCALL:
320 		vec = BOOK3S_INTERRUPT_SYSCALL;
321 		break;
322 	case BOOK3S_IRQPRIO_DEBUG:
323 		vec = BOOK3S_INTERRUPT_TRACE;
324 		break;
325 	case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR:
326 		vec = BOOK3S_INTERRUPT_PERFMON;
327 		break;
328 	case BOOK3S_IRQPRIO_FAC_UNAVAIL:
329 		vec = BOOK3S_INTERRUPT_FAC_UNAVAIL;
330 		break;
331 	default:
332 		deliver = 0;
333 		printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority);
334 		break;
335 	}
336 
337 #if 0
338 	printk(KERN_INFO "Deliver interrupt 0x%x? %x\n", vec, deliver);
339 #endif
340 
341 	if (deliver)
342 		kvmppc_inject_interrupt(vcpu, vec, 0);
343 
344 	return deliver;
345 }
346 
347 /*
348  * This function determines if an irqprio should be cleared once issued.
349  */
350 static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority)
351 {
352 	switch (priority) {
353 		case BOOK3S_IRQPRIO_DECREMENTER:
354 			/* DEC interrupts get cleared by mtdec */
355 			return false;
356 		case BOOK3S_IRQPRIO_EXTERNAL_LEVEL:
357 			/* External interrupts get cleared by userspace */
358 			return false;
359 	}
360 
361 	return true;
362 }
363 
364 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
365 {
366 	unsigned long *pending = &vcpu->arch.pending_exceptions;
367 	unsigned long old_pending = vcpu->arch.pending_exceptions;
368 	unsigned int priority;
369 
370 #ifdef EXIT_DEBUG
371 	if (vcpu->arch.pending_exceptions)
372 		printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions);
373 #endif
374 	priority = __ffs(*pending);
375 	while (priority < BOOK3S_IRQPRIO_MAX) {
376 		if (kvmppc_book3s_irqprio_deliver(vcpu, priority) &&
377 		    clear_irqprio(vcpu, priority)) {
378 			clear_bit(priority, &vcpu->arch.pending_exceptions);
379 			break;
380 		}
381 
382 		priority = find_next_bit(pending,
383 					 BITS_PER_BYTE * sizeof(*pending),
384 					 priority + 1);
385 	}
386 
387 	/* Tell the guest about our interrupt status */
388 	kvmppc_update_int_pending(vcpu, *pending, old_pending);
389 
390 	return 0;
391 }
392 EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter);
393 
394 kvm_pfn_t kvmppc_gpa_to_pfn(struct kvm_vcpu *vcpu, gpa_t gpa, bool writing,
395 			bool *writable)
396 {
397 	ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM;
398 	gfn_t gfn = gpa >> PAGE_SHIFT;
399 
400 	if (!(kvmppc_get_msr(vcpu) & MSR_SF))
401 		mp_pa = (uint32_t)mp_pa;
402 
403 	/* Magic page override */
404 	gpa &= ~0xFFFULL;
405 	if (unlikely(mp_pa) && unlikely((gpa & KVM_PAM) == mp_pa)) {
406 		ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK;
407 		kvm_pfn_t pfn;
408 
409 		pfn = (kvm_pfn_t)virt_to_phys((void*)shared_page) >> PAGE_SHIFT;
410 		get_page(pfn_to_page(pfn));
411 		if (writable)
412 			*writable = true;
413 		return pfn;
414 	}
415 
416 	return gfn_to_pfn_prot(vcpu->kvm, gfn, writing, writable);
417 }
418 EXPORT_SYMBOL_GPL(kvmppc_gpa_to_pfn);
419 
420 int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid,
421 		 enum xlate_readwrite xlrw, struct kvmppc_pte *pte)
422 {
423 	bool data = (xlid == XLATE_DATA);
424 	bool iswrite = (xlrw == XLATE_WRITE);
425 	int relocated = (kvmppc_get_msr(vcpu) & (data ? MSR_DR : MSR_IR));
426 	int r;
427 
428 	if (relocated) {
429 		r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data, iswrite);
430 	} else {
431 		pte->eaddr = eaddr;
432 		pte->raddr = eaddr & KVM_PAM;
433 		pte->vpage = VSID_REAL | eaddr >> 12;
434 		pte->may_read = true;
435 		pte->may_write = true;
436 		pte->may_execute = true;
437 		r = 0;
438 
439 		if ((kvmppc_get_msr(vcpu) & (MSR_IR | MSR_DR)) == MSR_DR &&
440 		    !data) {
441 			if ((vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) &&
442 			    ((eaddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS))
443 			pte->raddr &= ~SPLIT_HACK_MASK;
444 		}
445 	}
446 
447 	return r;
448 }
449 
450 int kvmppc_load_last_inst(struct kvm_vcpu *vcpu,
451 		enum instruction_fetch_type type, u32 *inst)
452 {
453 	ulong pc = kvmppc_get_pc(vcpu);
454 	int r;
455 
456 	if (type == INST_SC)
457 		pc -= 4;
458 
459 	r = kvmppc_ld(vcpu, &pc, sizeof(u32), inst, false);
460 	if (r == EMULATE_DONE)
461 		return r;
462 	else
463 		return EMULATE_AGAIN;
464 }
465 EXPORT_SYMBOL_GPL(kvmppc_load_last_inst);
466 
467 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
468 {
469 	return 0;
470 }
471 
472 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
473 {
474 	return 0;
475 }
476 
477 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
478 {
479 }
480 
481 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
482 				  struct kvm_sregs *sregs)
483 {
484 	int ret;
485 
486 	vcpu_load(vcpu);
487 	ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
488 	vcpu_put(vcpu);
489 
490 	return ret;
491 }
492 
493 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
494 				  struct kvm_sregs *sregs)
495 {
496 	int ret;
497 
498 	vcpu_load(vcpu);
499 	ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
500 	vcpu_put(vcpu);
501 
502 	return ret;
503 }
504 
505 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
506 {
507 	int i;
508 
509 	regs->pc = kvmppc_get_pc(vcpu);
510 	regs->cr = kvmppc_get_cr(vcpu);
511 	regs->ctr = kvmppc_get_ctr(vcpu);
512 	regs->lr = kvmppc_get_lr(vcpu);
513 	regs->xer = kvmppc_get_xer(vcpu);
514 	regs->msr = kvmppc_get_msr(vcpu);
515 	regs->srr0 = kvmppc_get_srr0(vcpu);
516 	regs->srr1 = kvmppc_get_srr1(vcpu);
517 	regs->pid = vcpu->arch.pid;
518 	regs->sprg0 = kvmppc_get_sprg0(vcpu);
519 	regs->sprg1 = kvmppc_get_sprg1(vcpu);
520 	regs->sprg2 = kvmppc_get_sprg2(vcpu);
521 	regs->sprg3 = kvmppc_get_sprg3(vcpu);
522 	regs->sprg4 = kvmppc_get_sprg4(vcpu);
523 	regs->sprg5 = kvmppc_get_sprg5(vcpu);
524 	regs->sprg6 = kvmppc_get_sprg6(vcpu);
525 	regs->sprg7 = kvmppc_get_sprg7(vcpu);
526 
527 	for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
528 		regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
529 
530 	return 0;
531 }
532 
533 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
534 {
535 	int i;
536 
537 	kvmppc_set_pc(vcpu, regs->pc);
538 	kvmppc_set_cr(vcpu, regs->cr);
539 	kvmppc_set_ctr(vcpu, regs->ctr);
540 	kvmppc_set_lr(vcpu, regs->lr);
541 	kvmppc_set_xer(vcpu, regs->xer);
542 	kvmppc_set_msr(vcpu, regs->msr);
543 	kvmppc_set_srr0(vcpu, regs->srr0);
544 	kvmppc_set_srr1(vcpu, regs->srr1);
545 	kvmppc_set_sprg0(vcpu, regs->sprg0);
546 	kvmppc_set_sprg1(vcpu, regs->sprg1);
547 	kvmppc_set_sprg2(vcpu, regs->sprg2);
548 	kvmppc_set_sprg3(vcpu, regs->sprg3);
549 	kvmppc_set_sprg4(vcpu, regs->sprg4);
550 	kvmppc_set_sprg5(vcpu, regs->sprg5);
551 	kvmppc_set_sprg6(vcpu, regs->sprg6);
552 	kvmppc_set_sprg7(vcpu, regs->sprg7);
553 
554 	for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
555 		kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
556 
557 	return 0;
558 }
559 
560 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
561 {
562 	return -ENOTSUPP;
563 }
564 
565 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
566 {
567 	return -ENOTSUPP;
568 }
569 
570 int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id,
571 			union kvmppc_one_reg *val)
572 {
573 	int r = 0;
574 	long int i;
575 
576 	r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val);
577 	if (r == -EINVAL) {
578 		r = 0;
579 		switch (id) {
580 		case KVM_REG_PPC_DAR:
581 			*val = get_reg_val(id, kvmppc_get_dar(vcpu));
582 			break;
583 		case KVM_REG_PPC_DSISR:
584 			*val = get_reg_val(id, kvmppc_get_dsisr(vcpu));
585 			break;
586 		case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
587 			i = id - KVM_REG_PPC_FPR0;
588 			*val = get_reg_val(id, VCPU_FPR(vcpu, i));
589 			break;
590 		case KVM_REG_PPC_FPSCR:
591 			*val = get_reg_val(id, vcpu->arch.fp.fpscr);
592 			break;
593 #ifdef CONFIG_VSX
594 		case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
595 			if (cpu_has_feature(CPU_FTR_VSX)) {
596 				i = id - KVM_REG_PPC_VSR0;
597 				val->vsxval[0] = vcpu->arch.fp.fpr[i][0];
598 				val->vsxval[1] = vcpu->arch.fp.fpr[i][1];
599 			} else {
600 				r = -ENXIO;
601 			}
602 			break;
603 #endif /* CONFIG_VSX */
604 		case KVM_REG_PPC_DEBUG_INST:
605 			*val = get_reg_val(id, INS_TW);
606 			break;
607 #ifdef CONFIG_KVM_XICS
608 		case KVM_REG_PPC_ICP_STATE:
609 			if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) {
610 				r = -ENXIO;
611 				break;
612 			}
613 			if (xive_enabled())
614 				*val = get_reg_val(id, kvmppc_xive_get_icp(vcpu));
615 			else
616 				*val = get_reg_val(id, kvmppc_xics_get_icp(vcpu));
617 			break;
618 #endif /* CONFIG_KVM_XICS */
619 		case KVM_REG_PPC_FSCR:
620 			*val = get_reg_val(id, vcpu->arch.fscr);
621 			break;
622 		case KVM_REG_PPC_TAR:
623 			*val = get_reg_val(id, vcpu->arch.tar);
624 			break;
625 		case KVM_REG_PPC_EBBHR:
626 			*val = get_reg_val(id, vcpu->arch.ebbhr);
627 			break;
628 		case KVM_REG_PPC_EBBRR:
629 			*val = get_reg_val(id, vcpu->arch.ebbrr);
630 			break;
631 		case KVM_REG_PPC_BESCR:
632 			*val = get_reg_val(id, vcpu->arch.bescr);
633 			break;
634 		case KVM_REG_PPC_IC:
635 			*val = get_reg_val(id, vcpu->arch.ic);
636 			break;
637 		default:
638 			r = -EINVAL;
639 			break;
640 		}
641 	}
642 
643 	return r;
644 }
645 
646 int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id,
647 			union kvmppc_one_reg *val)
648 {
649 	int r = 0;
650 	long int i;
651 
652 	r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val);
653 	if (r == -EINVAL) {
654 		r = 0;
655 		switch (id) {
656 		case KVM_REG_PPC_DAR:
657 			kvmppc_set_dar(vcpu, set_reg_val(id, *val));
658 			break;
659 		case KVM_REG_PPC_DSISR:
660 			kvmppc_set_dsisr(vcpu, set_reg_val(id, *val));
661 			break;
662 		case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
663 			i = id - KVM_REG_PPC_FPR0;
664 			VCPU_FPR(vcpu, i) = set_reg_val(id, *val);
665 			break;
666 		case KVM_REG_PPC_FPSCR:
667 			vcpu->arch.fp.fpscr = set_reg_val(id, *val);
668 			break;
669 #ifdef CONFIG_VSX
670 		case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
671 			if (cpu_has_feature(CPU_FTR_VSX)) {
672 				i = id - KVM_REG_PPC_VSR0;
673 				vcpu->arch.fp.fpr[i][0] = val->vsxval[0];
674 				vcpu->arch.fp.fpr[i][1] = val->vsxval[1];
675 			} else {
676 				r = -ENXIO;
677 			}
678 			break;
679 #endif /* CONFIG_VSX */
680 #ifdef CONFIG_KVM_XICS
681 		case KVM_REG_PPC_ICP_STATE:
682 			if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) {
683 				r = -ENXIO;
684 				break;
685 			}
686 			if (xive_enabled())
687 				r = kvmppc_xive_set_icp(vcpu, set_reg_val(id, *val));
688 			else
689 				r = kvmppc_xics_set_icp(vcpu, set_reg_val(id, *val));
690 			break;
691 #endif /* CONFIG_KVM_XICS */
692 		case KVM_REG_PPC_FSCR:
693 			vcpu->arch.fscr = set_reg_val(id, *val);
694 			break;
695 		case KVM_REG_PPC_TAR:
696 			vcpu->arch.tar = set_reg_val(id, *val);
697 			break;
698 		case KVM_REG_PPC_EBBHR:
699 			vcpu->arch.ebbhr = set_reg_val(id, *val);
700 			break;
701 		case KVM_REG_PPC_EBBRR:
702 			vcpu->arch.ebbrr = set_reg_val(id, *val);
703 			break;
704 		case KVM_REG_PPC_BESCR:
705 			vcpu->arch.bescr = set_reg_val(id, *val);
706 			break;
707 		case KVM_REG_PPC_IC:
708 			vcpu->arch.ic = set_reg_val(id, *val);
709 			break;
710 		default:
711 			r = -EINVAL;
712 			break;
713 		}
714 	}
715 
716 	return r;
717 }
718 
719 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
720 {
721 	vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
722 }
723 
724 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
725 {
726 	vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);
727 }
728 
729 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)
730 {
731 	vcpu->kvm->arch.kvm_ops->set_msr(vcpu, msr);
732 }
733 EXPORT_SYMBOL_GPL(kvmppc_set_msr);
734 
735 int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
736 {
737 	return vcpu->kvm->arch.kvm_ops->vcpu_run(kvm_run, vcpu);
738 }
739 
740 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
741                                   struct kvm_translation *tr)
742 {
743 	return 0;
744 }
745 
746 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
747 					struct kvm_guest_debug *dbg)
748 {
749 	vcpu_load(vcpu);
750 	vcpu->guest_debug = dbg->control;
751 	vcpu_put(vcpu);
752 	return 0;
753 }
754 
755 void kvmppc_decrementer_func(struct kvm_vcpu *vcpu)
756 {
757 	kvmppc_core_queue_dec(vcpu);
758 	kvm_vcpu_kick(vcpu);
759 }
760 
761 struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
762 {
763 	return kvm->arch.kvm_ops->vcpu_create(kvm, id);
764 }
765 
766 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
767 {
768 	vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
769 }
770 
771 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
772 {
773 	return vcpu->kvm->arch.kvm_ops->check_requests(vcpu);
774 }
775 
776 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
777 {
778 	return kvm->arch.kvm_ops->get_dirty_log(kvm, log);
779 }
780 
781 void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
782 			      struct kvm_memory_slot *dont)
783 {
784 	kvm->arch.kvm_ops->free_memslot(free, dont);
785 }
786 
787 int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
788 			       unsigned long npages)
789 {
790 	return kvm->arch.kvm_ops->create_memslot(slot, npages);
791 }
792 
793 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
794 {
795 	kvm->arch.kvm_ops->flush_memslot(kvm, memslot);
796 }
797 
798 int kvmppc_core_prepare_memory_region(struct kvm *kvm,
799 				struct kvm_memory_slot *memslot,
800 				const struct kvm_userspace_memory_region *mem)
801 {
802 	return kvm->arch.kvm_ops->prepare_memory_region(kvm, memslot, mem);
803 }
804 
805 void kvmppc_core_commit_memory_region(struct kvm *kvm,
806 				const struct kvm_userspace_memory_region *mem,
807 				const struct kvm_memory_slot *old,
808 				const struct kvm_memory_slot *new)
809 {
810 	kvm->arch.kvm_ops->commit_memory_region(kvm, mem, old, new);
811 }
812 
813 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
814 {
815 	return kvm->arch.kvm_ops->unmap_hva_range(kvm, start, end);
816 }
817 
818 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
819 {
820 	return kvm->arch.kvm_ops->age_hva(kvm, start, end);
821 }
822 
823 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
824 {
825 	return kvm->arch.kvm_ops->test_age_hva(kvm, hva);
826 }
827 
828 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
829 {
830 	kvm->arch.kvm_ops->set_spte_hva(kvm, hva, pte);
831 }
832 
833 void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
834 {
835 	vcpu->kvm->arch.kvm_ops->mmu_destroy(vcpu);
836 }
837 
838 int kvmppc_core_init_vm(struct kvm *kvm)
839 {
840 
841 #ifdef CONFIG_PPC64
842 	INIT_LIST_HEAD_RCU(&kvm->arch.spapr_tce_tables);
843 	INIT_LIST_HEAD(&kvm->arch.rtas_tokens);
844 #endif
845 
846 	return kvm->arch.kvm_ops->init_vm(kvm);
847 }
848 
849 void kvmppc_core_destroy_vm(struct kvm *kvm)
850 {
851 	kvm->arch.kvm_ops->destroy_vm(kvm);
852 
853 #ifdef CONFIG_PPC64
854 	kvmppc_rtas_tokens_free(kvm);
855 	WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
856 #endif
857 }
858 
859 int kvmppc_h_logical_ci_load(struct kvm_vcpu *vcpu)
860 {
861 	unsigned long size = kvmppc_get_gpr(vcpu, 4);
862 	unsigned long addr = kvmppc_get_gpr(vcpu, 5);
863 	u64 buf;
864 	int srcu_idx;
865 	int ret;
866 
867 	if (!is_power_of_2(size) || (size > sizeof(buf)))
868 		return H_TOO_HARD;
869 
870 	srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
871 	ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, size, &buf);
872 	srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
873 	if (ret != 0)
874 		return H_TOO_HARD;
875 
876 	switch (size) {
877 	case 1:
878 		kvmppc_set_gpr(vcpu, 4, *(u8 *)&buf);
879 		break;
880 
881 	case 2:
882 		kvmppc_set_gpr(vcpu, 4, be16_to_cpu(*(__be16 *)&buf));
883 		break;
884 
885 	case 4:
886 		kvmppc_set_gpr(vcpu, 4, be32_to_cpu(*(__be32 *)&buf));
887 		break;
888 
889 	case 8:
890 		kvmppc_set_gpr(vcpu, 4, be64_to_cpu(*(__be64 *)&buf));
891 		break;
892 
893 	default:
894 		BUG();
895 	}
896 
897 	return H_SUCCESS;
898 }
899 EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_load);
900 
901 int kvmppc_h_logical_ci_store(struct kvm_vcpu *vcpu)
902 {
903 	unsigned long size = kvmppc_get_gpr(vcpu, 4);
904 	unsigned long addr = kvmppc_get_gpr(vcpu, 5);
905 	unsigned long val = kvmppc_get_gpr(vcpu, 6);
906 	u64 buf;
907 	int srcu_idx;
908 	int ret;
909 
910 	switch (size) {
911 	case 1:
912 		*(u8 *)&buf = val;
913 		break;
914 
915 	case 2:
916 		*(__be16 *)&buf = cpu_to_be16(val);
917 		break;
918 
919 	case 4:
920 		*(__be32 *)&buf = cpu_to_be32(val);
921 		break;
922 
923 	case 8:
924 		*(__be64 *)&buf = cpu_to_be64(val);
925 		break;
926 
927 	default:
928 		return H_TOO_HARD;
929 	}
930 
931 	srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
932 	ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, size, &buf);
933 	srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
934 	if (ret != 0)
935 		return H_TOO_HARD;
936 
937 	return H_SUCCESS;
938 }
939 EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_store);
940 
941 int kvmppc_core_check_processor_compat(void)
942 {
943 	/*
944 	 * We always return 0 for book3s. We check
945 	 * for compatibility while loading the HV
946 	 * or PR module
947 	 */
948 	return 0;
949 }
950 
951 int kvmppc_book3s_hcall_implemented(struct kvm *kvm, unsigned long hcall)
952 {
953 	return kvm->arch.kvm_ops->hcall_implemented(hcall);
954 }
955 
956 #ifdef CONFIG_KVM_XICS
957 int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level,
958 		bool line_status)
959 {
960 	if (xive_enabled())
961 		return kvmppc_xive_set_irq(kvm, irq_source_id, irq, level,
962 					   line_status);
963 	else
964 		return kvmppc_xics_set_irq(kvm, irq_source_id, irq, level,
965 					   line_status);
966 }
967 
968 int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *irq_entry,
969 			      struct kvm *kvm, int irq_source_id,
970 			      int level, bool line_status)
971 {
972 	return kvm_set_irq(kvm, irq_source_id, irq_entry->gsi,
973 			   level, line_status);
974 }
975 static int kvmppc_book3s_set_irq(struct kvm_kernel_irq_routing_entry *e,
976 				 struct kvm *kvm, int irq_source_id, int level,
977 				 bool line_status)
978 {
979 	return kvm_set_irq(kvm, irq_source_id, e->gsi, level, line_status);
980 }
981 
982 int kvm_irq_map_gsi(struct kvm *kvm,
983 		    struct kvm_kernel_irq_routing_entry *entries, int gsi)
984 {
985 	entries->gsi = gsi;
986 	entries->type = KVM_IRQ_ROUTING_IRQCHIP;
987 	entries->set = kvmppc_book3s_set_irq;
988 	entries->irqchip.irqchip = 0;
989 	entries->irqchip.pin = gsi;
990 	return 1;
991 }
992 
993 int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin)
994 {
995 	return pin;
996 }
997 
998 #endif /* CONFIG_KVM_XICS */
999 
1000 static int kvmppc_book3s_init(void)
1001 {
1002 	int r;
1003 
1004 	r = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
1005 	if (r)
1006 		return r;
1007 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1008 	r = kvmppc_book3s_init_pr();
1009 #endif
1010 
1011 #ifdef CONFIG_KVM_XICS
1012 #ifdef CONFIG_KVM_XIVE
1013 	if (xive_enabled()) {
1014 		kvmppc_xive_init_module();
1015 		kvm_register_device_ops(&kvm_xive_ops, KVM_DEV_TYPE_XICS);
1016 	} else
1017 #endif
1018 		kvm_register_device_ops(&kvm_xics_ops, KVM_DEV_TYPE_XICS);
1019 #endif
1020 	return r;
1021 }
1022 
1023 static void kvmppc_book3s_exit(void)
1024 {
1025 #ifdef CONFIG_KVM_XICS
1026 	if (xive_enabled())
1027 		kvmppc_xive_exit_module();
1028 #endif
1029 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1030 	kvmppc_book3s_exit_pr();
1031 #endif
1032 	kvm_exit();
1033 }
1034 
1035 module_init(kvmppc_book3s_init);
1036 module_exit(kvmppc_book3s_exit);
1037 
1038 /* On 32bit this is our one and only kernel module */
1039 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1040 MODULE_ALIAS_MISCDEV(KVM_MINOR);
1041 MODULE_ALIAS("devname:kvm");
1042 #endif
1043