1 /* 2 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved. 3 * 4 * Authors: 5 * Alexander Graf <agraf@suse.de> 6 * Kevin Wolf <mail@kevin-wolf.de> 7 * 8 * Description: 9 * This file is derived from arch/powerpc/kvm/44x.c, 10 * by Hollis Blanchard <hollisb@us.ibm.com>. 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License, version 2, as 14 * published by the Free Software Foundation. 15 */ 16 17 #include <linux/kvm_host.h> 18 #include <linux/err.h> 19 #include <linux/export.h> 20 #include <linux/slab.h> 21 #include <linux/module.h> 22 #include <linux/miscdevice.h> 23 24 #include <asm/reg.h> 25 #include <asm/cputable.h> 26 #include <asm/cacheflush.h> 27 #include <asm/tlbflush.h> 28 #include <asm/uaccess.h> 29 #include <asm/io.h> 30 #include <asm/kvm_ppc.h> 31 #include <asm/kvm_book3s.h> 32 #include <asm/mmu_context.h> 33 #include <asm/page.h> 34 #include <linux/gfp.h> 35 #include <linux/sched.h> 36 #include <linux/vmalloc.h> 37 #include <linux/highmem.h> 38 39 #include "book3s.h" 40 #include "trace.h" 41 42 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU 43 44 /* #define EXIT_DEBUG */ 45 46 struct kvm_stats_debugfs_item debugfs_entries[] = { 47 { "exits", VCPU_STAT(sum_exits) }, 48 { "mmio", VCPU_STAT(mmio_exits) }, 49 { "sig", VCPU_STAT(signal_exits) }, 50 { "sysc", VCPU_STAT(syscall_exits) }, 51 { "inst_emu", VCPU_STAT(emulated_inst_exits) }, 52 { "dec", VCPU_STAT(dec_exits) }, 53 { "ext_intr", VCPU_STAT(ext_intr_exits) }, 54 { "queue_intr", VCPU_STAT(queue_intr) }, 55 { "halt_poll_success_ns", VCPU_STAT(halt_poll_success_ns) }, 56 { "halt_poll_fail_ns", VCPU_STAT(halt_poll_fail_ns) }, 57 { "halt_wait_ns", VCPU_STAT(halt_wait_ns) }, 58 { "halt_successful_poll", VCPU_STAT(halt_successful_poll), }, 59 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll), }, 60 { "halt_successful_wait", VCPU_STAT(halt_successful_wait) }, 61 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) }, 62 { "halt_wakeup", VCPU_STAT(halt_wakeup) }, 63 { "pf_storage", VCPU_STAT(pf_storage) }, 64 { "sp_storage", VCPU_STAT(sp_storage) }, 65 { "pf_instruc", VCPU_STAT(pf_instruc) }, 66 { "sp_instruc", VCPU_STAT(sp_instruc) }, 67 { "ld", VCPU_STAT(ld) }, 68 { "ld_slow", VCPU_STAT(ld_slow) }, 69 { "st", VCPU_STAT(st) }, 70 { "st_slow", VCPU_STAT(st_slow) }, 71 { NULL } 72 }; 73 74 void kvmppc_unfixup_split_real(struct kvm_vcpu *vcpu) 75 { 76 if (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) { 77 ulong pc = kvmppc_get_pc(vcpu); 78 if ((pc & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS) 79 kvmppc_set_pc(vcpu, pc & ~SPLIT_HACK_MASK); 80 vcpu->arch.hflags &= ~BOOK3S_HFLAG_SPLIT_HACK; 81 } 82 } 83 EXPORT_SYMBOL_GPL(kvmppc_unfixup_split_real); 84 85 static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu) 86 { 87 if (!is_kvmppc_hv_enabled(vcpu->kvm)) 88 return to_book3s(vcpu)->hior; 89 return 0; 90 } 91 92 static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu, 93 unsigned long pending_now, unsigned long old_pending) 94 { 95 if (is_kvmppc_hv_enabled(vcpu->kvm)) 96 return; 97 if (pending_now) 98 kvmppc_set_int_pending(vcpu, 1); 99 else if (old_pending) 100 kvmppc_set_int_pending(vcpu, 0); 101 } 102 103 static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu) 104 { 105 ulong crit_raw; 106 ulong crit_r1; 107 bool crit; 108 109 if (is_kvmppc_hv_enabled(vcpu->kvm)) 110 return false; 111 112 crit_raw = kvmppc_get_critical(vcpu); 113 crit_r1 = kvmppc_get_gpr(vcpu, 1); 114 115 /* Truncate crit indicators in 32 bit mode */ 116 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) { 117 crit_raw &= 0xffffffff; 118 crit_r1 &= 0xffffffff; 119 } 120 121 /* Critical section when crit == r1 */ 122 crit = (crit_raw == crit_r1); 123 /* ... and we're in supervisor mode */ 124 crit = crit && !(kvmppc_get_msr(vcpu) & MSR_PR); 125 126 return crit; 127 } 128 129 void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags) 130 { 131 kvmppc_unfixup_split_real(vcpu); 132 kvmppc_set_srr0(vcpu, kvmppc_get_pc(vcpu)); 133 kvmppc_set_srr1(vcpu, kvmppc_get_msr(vcpu) | flags); 134 kvmppc_set_pc(vcpu, kvmppc_interrupt_offset(vcpu) + vec); 135 vcpu->arch.mmu.reset_msr(vcpu); 136 } 137 138 static int kvmppc_book3s_vec2irqprio(unsigned int vec) 139 { 140 unsigned int prio; 141 142 switch (vec) { 143 case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET; break; 144 case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK; break; 145 case 0x300: prio = BOOK3S_IRQPRIO_DATA_STORAGE; break; 146 case 0x380: prio = BOOK3S_IRQPRIO_DATA_SEGMENT; break; 147 case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE; break; 148 case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT; break; 149 case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL; break; 150 case 0x501: prio = BOOK3S_IRQPRIO_EXTERNAL_LEVEL; break; 151 case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT; break; 152 case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM; break; 153 case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL; break; 154 case 0x900: prio = BOOK3S_IRQPRIO_DECREMENTER; break; 155 case 0xc00: prio = BOOK3S_IRQPRIO_SYSCALL; break; 156 case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG; break; 157 case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC; break; 158 case 0xf40: prio = BOOK3S_IRQPRIO_VSX; break; 159 case 0xf60: prio = BOOK3S_IRQPRIO_FAC_UNAVAIL; break; 160 default: prio = BOOK3S_IRQPRIO_MAX; break; 161 } 162 163 return prio; 164 } 165 166 void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu, 167 unsigned int vec) 168 { 169 unsigned long old_pending = vcpu->arch.pending_exceptions; 170 171 clear_bit(kvmppc_book3s_vec2irqprio(vec), 172 &vcpu->arch.pending_exceptions); 173 174 kvmppc_update_int_pending(vcpu, vcpu->arch.pending_exceptions, 175 old_pending); 176 } 177 178 void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec) 179 { 180 vcpu->stat.queue_intr++; 181 182 set_bit(kvmppc_book3s_vec2irqprio(vec), 183 &vcpu->arch.pending_exceptions); 184 #ifdef EXIT_DEBUG 185 printk(KERN_INFO "Queueing interrupt %x\n", vec); 186 #endif 187 } 188 EXPORT_SYMBOL_GPL(kvmppc_book3s_queue_irqprio); 189 190 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags) 191 { 192 /* might as well deliver this straight away */ 193 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, flags); 194 } 195 EXPORT_SYMBOL_GPL(kvmppc_core_queue_program); 196 197 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu) 198 { 199 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER); 200 } 201 EXPORT_SYMBOL_GPL(kvmppc_core_queue_dec); 202 203 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu) 204 { 205 return test_bit(BOOK3S_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 206 } 207 EXPORT_SYMBOL_GPL(kvmppc_core_pending_dec); 208 209 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu) 210 { 211 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER); 212 } 213 EXPORT_SYMBOL_GPL(kvmppc_core_dequeue_dec); 214 215 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, 216 struct kvm_interrupt *irq) 217 { 218 unsigned int vec = BOOK3S_INTERRUPT_EXTERNAL; 219 220 if (irq->irq == KVM_INTERRUPT_SET_LEVEL) 221 vec = BOOK3S_INTERRUPT_EXTERNAL_LEVEL; 222 223 kvmppc_book3s_queue_irqprio(vcpu, vec); 224 } 225 226 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu) 227 { 228 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL); 229 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL_LEVEL); 230 } 231 232 void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, ulong dar, 233 ulong flags) 234 { 235 kvmppc_set_dar(vcpu, dar); 236 kvmppc_set_dsisr(vcpu, flags); 237 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE); 238 } 239 240 void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong flags) 241 { 242 u64 msr = kvmppc_get_msr(vcpu); 243 msr &= ~(SRR1_ISI_NOPT | SRR1_ISI_N_OR_G | SRR1_ISI_PROT); 244 msr |= flags & (SRR1_ISI_NOPT | SRR1_ISI_N_OR_G | SRR1_ISI_PROT); 245 kvmppc_set_msr_fast(vcpu, msr); 246 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_INST_STORAGE); 247 } 248 249 static int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu, 250 unsigned int priority) 251 { 252 int deliver = 1; 253 int vec = 0; 254 bool crit = kvmppc_critical_section(vcpu); 255 256 switch (priority) { 257 case BOOK3S_IRQPRIO_DECREMENTER: 258 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit; 259 vec = BOOK3S_INTERRUPT_DECREMENTER; 260 break; 261 case BOOK3S_IRQPRIO_EXTERNAL: 262 case BOOK3S_IRQPRIO_EXTERNAL_LEVEL: 263 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit; 264 vec = BOOK3S_INTERRUPT_EXTERNAL; 265 break; 266 case BOOK3S_IRQPRIO_SYSTEM_RESET: 267 vec = BOOK3S_INTERRUPT_SYSTEM_RESET; 268 break; 269 case BOOK3S_IRQPRIO_MACHINE_CHECK: 270 vec = BOOK3S_INTERRUPT_MACHINE_CHECK; 271 break; 272 case BOOK3S_IRQPRIO_DATA_STORAGE: 273 vec = BOOK3S_INTERRUPT_DATA_STORAGE; 274 break; 275 case BOOK3S_IRQPRIO_INST_STORAGE: 276 vec = BOOK3S_INTERRUPT_INST_STORAGE; 277 break; 278 case BOOK3S_IRQPRIO_DATA_SEGMENT: 279 vec = BOOK3S_INTERRUPT_DATA_SEGMENT; 280 break; 281 case BOOK3S_IRQPRIO_INST_SEGMENT: 282 vec = BOOK3S_INTERRUPT_INST_SEGMENT; 283 break; 284 case BOOK3S_IRQPRIO_ALIGNMENT: 285 vec = BOOK3S_INTERRUPT_ALIGNMENT; 286 break; 287 case BOOK3S_IRQPRIO_PROGRAM: 288 vec = BOOK3S_INTERRUPT_PROGRAM; 289 break; 290 case BOOK3S_IRQPRIO_VSX: 291 vec = BOOK3S_INTERRUPT_VSX; 292 break; 293 case BOOK3S_IRQPRIO_ALTIVEC: 294 vec = BOOK3S_INTERRUPT_ALTIVEC; 295 break; 296 case BOOK3S_IRQPRIO_FP_UNAVAIL: 297 vec = BOOK3S_INTERRUPT_FP_UNAVAIL; 298 break; 299 case BOOK3S_IRQPRIO_SYSCALL: 300 vec = BOOK3S_INTERRUPT_SYSCALL; 301 break; 302 case BOOK3S_IRQPRIO_DEBUG: 303 vec = BOOK3S_INTERRUPT_TRACE; 304 break; 305 case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR: 306 vec = BOOK3S_INTERRUPT_PERFMON; 307 break; 308 case BOOK3S_IRQPRIO_FAC_UNAVAIL: 309 vec = BOOK3S_INTERRUPT_FAC_UNAVAIL; 310 break; 311 default: 312 deliver = 0; 313 printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority); 314 break; 315 } 316 317 #if 0 318 printk(KERN_INFO "Deliver interrupt 0x%x? %x\n", vec, deliver); 319 #endif 320 321 if (deliver) 322 kvmppc_inject_interrupt(vcpu, vec, 0); 323 324 return deliver; 325 } 326 327 /* 328 * This function determines if an irqprio should be cleared once issued. 329 */ 330 static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority) 331 { 332 switch (priority) { 333 case BOOK3S_IRQPRIO_DECREMENTER: 334 /* DEC interrupts get cleared by mtdec */ 335 return false; 336 case BOOK3S_IRQPRIO_EXTERNAL_LEVEL: 337 /* External interrupts get cleared by userspace */ 338 return false; 339 } 340 341 return true; 342 } 343 344 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu) 345 { 346 unsigned long *pending = &vcpu->arch.pending_exceptions; 347 unsigned long old_pending = vcpu->arch.pending_exceptions; 348 unsigned int priority; 349 350 #ifdef EXIT_DEBUG 351 if (vcpu->arch.pending_exceptions) 352 printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions); 353 #endif 354 priority = __ffs(*pending); 355 while (priority < BOOK3S_IRQPRIO_MAX) { 356 if (kvmppc_book3s_irqprio_deliver(vcpu, priority) && 357 clear_irqprio(vcpu, priority)) { 358 clear_bit(priority, &vcpu->arch.pending_exceptions); 359 break; 360 } 361 362 priority = find_next_bit(pending, 363 BITS_PER_BYTE * sizeof(*pending), 364 priority + 1); 365 } 366 367 /* Tell the guest about our interrupt status */ 368 kvmppc_update_int_pending(vcpu, *pending, old_pending); 369 370 return 0; 371 } 372 EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter); 373 374 kvm_pfn_t kvmppc_gpa_to_pfn(struct kvm_vcpu *vcpu, gpa_t gpa, bool writing, 375 bool *writable) 376 { 377 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM; 378 gfn_t gfn = gpa >> PAGE_SHIFT; 379 380 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) 381 mp_pa = (uint32_t)mp_pa; 382 383 /* Magic page override */ 384 gpa &= ~0xFFFULL; 385 if (unlikely(mp_pa) && unlikely((gpa & KVM_PAM) == mp_pa)) { 386 ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK; 387 kvm_pfn_t pfn; 388 389 pfn = (kvm_pfn_t)virt_to_phys((void*)shared_page) >> PAGE_SHIFT; 390 get_page(pfn_to_page(pfn)); 391 if (writable) 392 *writable = true; 393 return pfn; 394 } 395 396 return gfn_to_pfn_prot(vcpu->kvm, gfn, writing, writable); 397 } 398 EXPORT_SYMBOL_GPL(kvmppc_gpa_to_pfn); 399 400 int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid, 401 enum xlate_readwrite xlrw, struct kvmppc_pte *pte) 402 { 403 bool data = (xlid == XLATE_DATA); 404 bool iswrite = (xlrw == XLATE_WRITE); 405 int relocated = (kvmppc_get_msr(vcpu) & (data ? MSR_DR : MSR_IR)); 406 int r; 407 408 if (relocated) { 409 r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data, iswrite); 410 } else { 411 pte->eaddr = eaddr; 412 pte->raddr = eaddr & KVM_PAM; 413 pte->vpage = VSID_REAL | eaddr >> 12; 414 pte->may_read = true; 415 pte->may_write = true; 416 pte->may_execute = true; 417 r = 0; 418 419 if ((kvmppc_get_msr(vcpu) & (MSR_IR | MSR_DR)) == MSR_DR && 420 !data) { 421 if ((vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) && 422 ((eaddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS)) 423 pte->raddr &= ~SPLIT_HACK_MASK; 424 } 425 } 426 427 return r; 428 } 429 430 int kvmppc_load_last_inst(struct kvm_vcpu *vcpu, enum instruction_type type, 431 u32 *inst) 432 { 433 ulong pc = kvmppc_get_pc(vcpu); 434 int r; 435 436 if (type == INST_SC) 437 pc -= 4; 438 439 r = kvmppc_ld(vcpu, &pc, sizeof(u32), inst, false); 440 if (r == EMULATE_DONE) 441 return r; 442 else 443 return EMULATE_AGAIN; 444 } 445 EXPORT_SYMBOL_GPL(kvmppc_load_last_inst); 446 447 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) 448 { 449 return 0; 450 } 451 452 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu) 453 { 454 return 0; 455 } 456 457 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu) 458 { 459 } 460 461 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, 462 struct kvm_sregs *sregs) 463 { 464 return vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs); 465 } 466 467 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, 468 struct kvm_sregs *sregs) 469 { 470 return vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs); 471 } 472 473 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 474 { 475 int i; 476 477 regs->pc = kvmppc_get_pc(vcpu); 478 regs->cr = kvmppc_get_cr(vcpu); 479 regs->ctr = kvmppc_get_ctr(vcpu); 480 regs->lr = kvmppc_get_lr(vcpu); 481 regs->xer = kvmppc_get_xer(vcpu); 482 regs->msr = kvmppc_get_msr(vcpu); 483 regs->srr0 = kvmppc_get_srr0(vcpu); 484 regs->srr1 = kvmppc_get_srr1(vcpu); 485 regs->pid = vcpu->arch.pid; 486 regs->sprg0 = kvmppc_get_sprg0(vcpu); 487 regs->sprg1 = kvmppc_get_sprg1(vcpu); 488 regs->sprg2 = kvmppc_get_sprg2(vcpu); 489 regs->sprg3 = kvmppc_get_sprg3(vcpu); 490 regs->sprg4 = kvmppc_get_sprg4(vcpu); 491 regs->sprg5 = kvmppc_get_sprg5(vcpu); 492 regs->sprg6 = kvmppc_get_sprg6(vcpu); 493 regs->sprg7 = kvmppc_get_sprg7(vcpu); 494 495 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 496 regs->gpr[i] = kvmppc_get_gpr(vcpu, i); 497 498 return 0; 499 } 500 501 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 502 { 503 int i; 504 505 kvmppc_set_pc(vcpu, regs->pc); 506 kvmppc_set_cr(vcpu, regs->cr); 507 kvmppc_set_ctr(vcpu, regs->ctr); 508 kvmppc_set_lr(vcpu, regs->lr); 509 kvmppc_set_xer(vcpu, regs->xer); 510 kvmppc_set_msr(vcpu, regs->msr); 511 kvmppc_set_srr0(vcpu, regs->srr0); 512 kvmppc_set_srr1(vcpu, regs->srr1); 513 kvmppc_set_sprg0(vcpu, regs->sprg0); 514 kvmppc_set_sprg1(vcpu, regs->sprg1); 515 kvmppc_set_sprg2(vcpu, regs->sprg2); 516 kvmppc_set_sprg3(vcpu, regs->sprg3); 517 kvmppc_set_sprg4(vcpu, regs->sprg4); 518 kvmppc_set_sprg5(vcpu, regs->sprg5); 519 kvmppc_set_sprg6(vcpu, regs->sprg6); 520 kvmppc_set_sprg7(vcpu, regs->sprg7); 521 522 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 523 kvmppc_set_gpr(vcpu, i, regs->gpr[i]); 524 525 return 0; 526 } 527 528 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 529 { 530 return -ENOTSUPP; 531 } 532 533 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 534 { 535 return -ENOTSUPP; 536 } 537 538 int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id, 539 union kvmppc_one_reg *val) 540 { 541 int r = 0; 542 long int i; 543 544 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val); 545 if (r == -EINVAL) { 546 r = 0; 547 switch (id) { 548 case KVM_REG_PPC_DAR: 549 *val = get_reg_val(id, kvmppc_get_dar(vcpu)); 550 break; 551 case KVM_REG_PPC_DSISR: 552 *val = get_reg_val(id, kvmppc_get_dsisr(vcpu)); 553 break; 554 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31: 555 i = id - KVM_REG_PPC_FPR0; 556 *val = get_reg_val(id, VCPU_FPR(vcpu, i)); 557 break; 558 case KVM_REG_PPC_FPSCR: 559 *val = get_reg_val(id, vcpu->arch.fp.fpscr); 560 break; 561 #ifdef CONFIG_VSX 562 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31: 563 if (cpu_has_feature(CPU_FTR_VSX)) { 564 i = id - KVM_REG_PPC_VSR0; 565 val->vsxval[0] = vcpu->arch.fp.fpr[i][0]; 566 val->vsxval[1] = vcpu->arch.fp.fpr[i][1]; 567 } else { 568 r = -ENXIO; 569 } 570 break; 571 #endif /* CONFIG_VSX */ 572 case KVM_REG_PPC_DEBUG_INST: 573 *val = get_reg_val(id, INS_TW); 574 break; 575 #ifdef CONFIG_KVM_XICS 576 case KVM_REG_PPC_ICP_STATE: 577 if (!vcpu->arch.icp) { 578 r = -ENXIO; 579 break; 580 } 581 *val = get_reg_val(id, kvmppc_xics_get_icp(vcpu)); 582 break; 583 #endif /* CONFIG_KVM_XICS */ 584 case KVM_REG_PPC_FSCR: 585 *val = get_reg_val(id, vcpu->arch.fscr); 586 break; 587 case KVM_REG_PPC_TAR: 588 *val = get_reg_val(id, vcpu->arch.tar); 589 break; 590 case KVM_REG_PPC_EBBHR: 591 *val = get_reg_val(id, vcpu->arch.ebbhr); 592 break; 593 case KVM_REG_PPC_EBBRR: 594 *val = get_reg_val(id, vcpu->arch.ebbrr); 595 break; 596 case KVM_REG_PPC_BESCR: 597 *val = get_reg_val(id, vcpu->arch.bescr); 598 break; 599 case KVM_REG_PPC_VTB: 600 *val = get_reg_val(id, vcpu->arch.vtb); 601 break; 602 case KVM_REG_PPC_IC: 603 *val = get_reg_val(id, vcpu->arch.ic); 604 break; 605 default: 606 r = -EINVAL; 607 break; 608 } 609 } 610 611 return r; 612 } 613 614 int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id, 615 union kvmppc_one_reg *val) 616 { 617 int r = 0; 618 long int i; 619 620 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val); 621 if (r == -EINVAL) { 622 r = 0; 623 switch (id) { 624 case KVM_REG_PPC_DAR: 625 kvmppc_set_dar(vcpu, set_reg_val(id, *val)); 626 break; 627 case KVM_REG_PPC_DSISR: 628 kvmppc_set_dsisr(vcpu, set_reg_val(id, *val)); 629 break; 630 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31: 631 i = id - KVM_REG_PPC_FPR0; 632 VCPU_FPR(vcpu, i) = set_reg_val(id, *val); 633 break; 634 case KVM_REG_PPC_FPSCR: 635 vcpu->arch.fp.fpscr = set_reg_val(id, *val); 636 break; 637 #ifdef CONFIG_VSX 638 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31: 639 if (cpu_has_feature(CPU_FTR_VSX)) { 640 i = id - KVM_REG_PPC_VSR0; 641 vcpu->arch.fp.fpr[i][0] = val->vsxval[0]; 642 vcpu->arch.fp.fpr[i][1] = val->vsxval[1]; 643 } else { 644 r = -ENXIO; 645 } 646 break; 647 #endif /* CONFIG_VSX */ 648 #ifdef CONFIG_KVM_XICS 649 case KVM_REG_PPC_ICP_STATE: 650 if (!vcpu->arch.icp) { 651 r = -ENXIO; 652 break; 653 } 654 r = kvmppc_xics_set_icp(vcpu, 655 set_reg_val(id, *val)); 656 break; 657 #endif /* CONFIG_KVM_XICS */ 658 case KVM_REG_PPC_FSCR: 659 vcpu->arch.fscr = set_reg_val(id, *val); 660 break; 661 case KVM_REG_PPC_TAR: 662 vcpu->arch.tar = set_reg_val(id, *val); 663 break; 664 case KVM_REG_PPC_EBBHR: 665 vcpu->arch.ebbhr = set_reg_val(id, *val); 666 break; 667 case KVM_REG_PPC_EBBRR: 668 vcpu->arch.ebbrr = set_reg_val(id, *val); 669 break; 670 case KVM_REG_PPC_BESCR: 671 vcpu->arch.bescr = set_reg_val(id, *val); 672 break; 673 case KVM_REG_PPC_VTB: 674 vcpu->arch.vtb = set_reg_val(id, *val); 675 break; 676 case KVM_REG_PPC_IC: 677 vcpu->arch.ic = set_reg_val(id, *val); 678 break; 679 default: 680 r = -EINVAL; 681 break; 682 } 683 } 684 685 return r; 686 } 687 688 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 689 { 690 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu); 691 } 692 693 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu) 694 { 695 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu); 696 } 697 698 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr) 699 { 700 vcpu->kvm->arch.kvm_ops->set_msr(vcpu, msr); 701 } 702 EXPORT_SYMBOL_GPL(kvmppc_set_msr); 703 704 int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) 705 { 706 return vcpu->kvm->arch.kvm_ops->vcpu_run(kvm_run, vcpu); 707 } 708 709 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, 710 struct kvm_translation *tr) 711 { 712 return 0; 713 } 714 715 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu, 716 struct kvm_guest_debug *dbg) 717 { 718 vcpu->guest_debug = dbg->control; 719 return 0; 720 } 721 722 void kvmppc_decrementer_func(struct kvm_vcpu *vcpu) 723 { 724 kvmppc_core_queue_dec(vcpu); 725 kvm_vcpu_kick(vcpu); 726 } 727 728 struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id) 729 { 730 return kvm->arch.kvm_ops->vcpu_create(kvm, id); 731 } 732 733 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu) 734 { 735 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu); 736 } 737 738 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu) 739 { 740 return vcpu->kvm->arch.kvm_ops->check_requests(vcpu); 741 } 742 743 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log) 744 { 745 return kvm->arch.kvm_ops->get_dirty_log(kvm, log); 746 } 747 748 void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free, 749 struct kvm_memory_slot *dont) 750 { 751 kvm->arch.kvm_ops->free_memslot(free, dont); 752 } 753 754 int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot, 755 unsigned long npages) 756 { 757 return kvm->arch.kvm_ops->create_memslot(slot, npages); 758 } 759 760 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot) 761 { 762 kvm->arch.kvm_ops->flush_memslot(kvm, memslot); 763 } 764 765 int kvmppc_core_prepare_memory_region(struct kvm *kvm, 766 struct kvm_memory_slot *memslot, 767 const struct kvm_userspace_memory_region *mem) 768 { 769 return kvm->arch.kvm_ops->prepare_memory_region(kvm, memslot, mem); 770 } 771 772 void kvmppc_core_commit_memory_region(struct kvm *kvm, 773 const struct kvm_userspace_memory_region *mem, 774 const struct kvm_memory_slot *old, 775 const struct kvm_memory_slot *new) 776 { 777 kvm->arch.kvm_ops->commit_memory_region(kvm, mem, old, new); 778 } 779 780 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva) 781 { 782 return kvm->arch.kvm_ops->unmap_hva(kvm, hva); 783 } 784 EXPORT_SYMBOL_GPL(kvm_unmap_hva); 785 786 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end) 787 { 788 return kvm->arch.kvm_ops->unmap_hva_range(kvm, start, end); 789 } 790 791 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end) 792 { 793 return kvm->arch.kvm_ops->age_hva(kvm, start, end); 794 } 795 796 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva) 797 { 798 return kvm->arch.kvm_ops->test_age_hva(kvm, hva); 799 } 800 801 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte) 802 { 803 kvm->arch.kvm_ops->set_spte_hva(kvm, hva, pte); 804 } 805 806 void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu) 807 { 808 vcpu->kvm->arch.kvm_ops->mmu_destroy(vcpu); 809 } 810 811 int kvmppc_core_init_vm(struct kvm *kvm) 812 { 813 814 #ifdef CONFIG_PPC64 815 INIT_LIST_HEAD_RCU(&kvm->arch.spapr_tce_tables); 816 INIT_LIST_HEAD(&kvm->arch.rtas_tokens); 817 #endif 818 819 return kvm->arch.kvm_ops->init_vm(kvm); 820 } 821 822 void kvmppc_core_destroy_vm(struct kvm *kvm) 823 { 824 kvm->arch.kvm_ops->destroy_vm(kvm); 825 826 #ifdef CONFIG_PPC64 827 kvmppc_rtas_tokens_free(kvm); 828 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables)); 829 #endif 830 } 831 832 int kvmppc_h_logical_ci_load(struct kvm_vcpu *vcpu) 833 { 834 unsigned long size = kvmppc_get_gpr(vcpu, 4); 835 unsigned long addr = kvmppc_get_gpr(vcpu, 5); 836 u64 buf; 837 int srcu_idx; 838 int ret; 839 840 if (!is_power_of_2(size) || (size > sizeof(buf))) 841 return H_TOO_HARD; 842 843 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 844 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, size, &buf); 845 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 846 if (ret != 0) 847 return H_TOO_HARD; 848 849 switch (size) { 850 case 1: 851 kvmppc_set_gpr(vcpu, 4, *(u8 *)&buf); 852 break; 853 854 case 2: 855 kvmppc_set_gpr(vcpu, 4, be16_to_cpu(*(__be16 *)&buf)); 856 break; 857 858 case 4: 859 kvmppc_set_gpr(vcpu, 4, be32_to_cpu(*(__be32 *)&buf)); 860 break; 861 862 case 8: 863 kvmppc_set_gpr(vcpu, 4, be64_to_cpu(*(__be64 *)&buf)); 864 break; 865 866 default: 867 BUG(); 868 } 869 870 return H_SUCCESS; 871 } 872 EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_load); 873 874 int kvmppc_h_logical_ci_store(struct kvm_vcpu *vcpu) 875 { 876 unsigned long size = kvmppc_get_gpr(vcpu, 4); 877 unsigned long addr = kvmppc_get_gpr(vcpu, 5); 878 unsigned long val = kvmppc_get_gpr(vcpu, 6); 879 u64 buf; 880 int srcu_idx; 881 int ret; 882 883 switch (size) { 884 case 1: 885 *(u8 *)&buf = val; 886 break; 887 888 case 2: 889 *(__be16 *)&buf = cpu_to_be16(val); 890 break; 891 892 case 4: 893 *(__be32 *)&buf = cpu_to_be32(val); 894 break; 895 896 case 8: 897 *(__be64 *)&buf = cpu_to_be64(val); 898 break; 899 900 default: 901 return H_TOO_HARD; 902 } 903 904 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 905 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, size, &buf); 906 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 907 if (ret != 0) 908 return H_TOO_HARD; 909 910 return H_SUCCESS; 911 } 912 EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_store); 913 914 int kvmppc_core_check_processor_compat(void) 915 { 916 /* 917 * We always return 0 for book3s. We check 918 * for compatibility while loading the HV 919 * or PR module 920 */ 921 return 0; 922 } 923 924 int kvmppc_book3s_hcall_implemented(struct kvm *kvm, unsigned long hcall) 925 { 926 return kvm->arch.kvm_ops->hcall_implemented(hcall); 927 } 928 929 static int kvmppc_book3s_init(void) 930 { 931 int r; 932 933 r = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE); 934 if (r) 935 return r; 936 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER 937 r = kvmppc_book3s_init_pr(); 938 #endif 939 return r; 940 941 } 942 943 static void kvmppc_book3s_exit(void) 944 { 945 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER 946 kvmppc_book3s_exit_pr(); 947 #endif 948 kvm_exit(); 949 } 950 951 module_init(kvmppc_book3s_init); 952 module_exit(kvmppc_book3s_exit); 953 954 /* On 32bit this is our one and only kernel module */ 955 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER 956 MODULE_ALIAS_MISCDEV(KVM_MINOR); 957 MODULE_ALIAS("devname:kvm"); 958 #endif 959