1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved. 4 * 5 * Authors: 6 * Alexander Graf <agraf@suse.de> 7 * Kevin Wolf <mail@kevin-wolf.de> 8 * 9 * Description: 10 * This file is derived from arch/powerpc/kvm/44x.c, 11 * by Hollis Blanchard <hollisb@us.ibm.com>. 12 */ 13 14 #include <linux/kvm_host.h> 15 #include <linux/err.h> 16 #include <linux/export.h> 17 #include <linux/slab.h> 18 #include <linux/module.h> 19 #include <linux/miscdevice.h> 20 #include <linux/gfp.h> 21 #include <linux/sched.h> 22 #include <linux/vmalloc.h> 23 #include <linux/highmem.h> 24 25 #include <asm/reg.h> 26 #include <asm/cputable.h> 27 #include <asm/cacheflush.h> 28 #include <linux/uaccess.h> 29 #include <asm/io.h> 30 #include <asm/kvm_ppc.h> 31 #include <asm/kvm_book3s.h> 32 #include <asm/mmu_context.h> 33 #include <asm/page.h> 34 #include <asm/xive.h> 35 36 #include "book3s.h" 37 #include "trace.h" 38 39 /* #define EXIT_DEBUG */ 40 41 const struct _kvm_stats_desc kvm_vm_stats_desc[] = { 42 KVM_GENERIC_VM_STATS(), 43 STATS_DESC_ICOUNTER(VM, num_2M_pages), 44 STATS_DESC_ICOUNTER(VM, num_1G_pages) 45 }; 46 47 const struct kvm_stats_header kvm_vm_stats_header = { 48 .name_size = KVM_STATS_NAME_SIZE, 49 .num_desc = ARRAY_SIZE(kvm_vm_stats_desc), 50 .id_offset = sizeof(struct kvm_stats_header), 51 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE, 52 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE + 53 sizeof(kvm_vm_stats_desc), 54 }; 55 56 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = { 57 KVM_GENERIC_VCPU_STATS(), 58 STATS_DESC_COUNTER(VCPU, sum_exits), 59 STATS_DESC_COUNTER(VCPU, mmio_exits), 60 STATS_DESC_COUNTER(VCPU, signal_exits), 61 STATS_DESC_COUNTER(VCPU, light_exits), 62 STATS_DESC_COUNTER(VCPU, itlb_real_miss_exits), 63 STATS_DESC_COUNTER(VCPU, itlb_virt_miss_exits), 64 STATS_DESC_COUNTER(VCPU, dtlb_real_miss_exits), 65 STATS_DESC_COUNTER(VCPU, dtlb_virt_miss_exits), 66 STATS_DESC_COUNTER(VCPU, syscall_exits), 67 STATS_DESC_COUNTER(VCPU, isi_exits), 68 STATS_DESC_COUNTER(VCPU, dsi_exits), 69 STATS_DESC_COUNTER(VCPU, emulated_inst_exits), 70 STATS_DESC_COUNTER(VCPU, dec_exits), 71 STATS_DESC_COUNTER(VCPU, ext_intr_exits), 72 STATS_DESC_COUNTER(VCPU, halt_successful_wait), 73 STATS_DESC_COUNTER(VCPU, dbell_exits), 74 STATS_DESC_COUNTER(VCPU, gdbell_exits), 75 STATS_DESC_COUNTER(VCPU, ld), 76 STATS_DESC_COUNTER(VCPU, st), 77 STATS_DESC_COUNTER(VCPU, pf_storage), 78 STATS_DESC_COUNTER(VCPU, pf_instruc), 79 STATS_DESC_COUNTER(VCPU, sp_storage), 80 STATS_DESC_COUNTER(VCPU, sp_instruc), 81 STATS_DESC_COUNTER(VCPU, queue_intr), 82 STATS_DESC_COUNTER(VCPU, ld_slow), 83 STATS_DESC_COUNTER(VCPU, st_slow), 84 STATS_DESC_COUNTER(VCPU, pthru_all), 85 STATS_DESC_COUNTER(VCPU, pthru_host), 86 STATS_DESC_COUNTER(VCPU, pthru_bad_aff) 87 }; 88 89 const struct kvm_stats_header kvm_vcpu_stats_header = { 90 .name_size = KVM_STATS_NAME_SIZE, 91 .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc), 92 .id_offset = sizeof(struct kvm_stats_header), 93 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE, 94 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE + 95 sizeof(kvm_vcpu_stats_desc), 96 }; 97 98 static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu, 99 unsigned long pending_now, unsigned long old_pending) 100 { 101 if (is_kvmppc_hv_enabled(vcpu->kvm)) 102 return; 103 if (pending_now) 104 kvmppc_set_int_pending(vcpu, 1); 105 else if (old_pending) 106 kvmppc_set_int_pending(vcpu, 0); 107 } 108 109 static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu) 110 { 111 ulong crit_raw; 112 ulong crit_r1; 113 bool crit; 114 115 if (is_kvmppc_hv_enabled(vcpu->kvm)) 116 return false; 117 118 crit_raw = kvmppc_get_critical(vcpu); 119 crit_r1 = kvmppc_get_gpr(vcpu, 1); 120 121 /* Truncate crit indicators in 32 bit mode */ 122 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) { 123 crit_raw &= 0xffffffff; 124 crit_r1 &= 0xffffffff; 125 } 126 127 /* Critical section when crit == r1 */ 128 crit = (crit_raw == crit_r1); 129 /* ... and we're in supervisor mode */ 130 crit = crit && !(kvmppc_get_msr(vcpu) & MSR_PR); 131 132 return crit; 133 } 134 135 void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags) 136 { 137 vcpu->kvm->arch.kvm_ops->inject_interrupt(vcpu, vec, flags); 138 } 139 140 static int kvmppc_book3s_vec2irqprio(unsigned int vec) 141 { 142 unsigned int prio; 143 144 switch (vec) { 145 case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET; break; 146 case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK; break; 147 case 0x300: prio = BOOK3S_IRQPRIO_DATA_STORAGE; break; 148 case 0x380: prio = BOOK3S_IRQPRIO_DATA_SEGMENT; break; 149 case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE; break; 150 case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT; break; 151 case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL; break; 152 case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT; break; 153 case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM; break; 154 case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL; break; 155 case 0x900: prio = BOOK3S_IRQPRIO_DECREMENTER; break; 156 case 0xc00: prio = BOOK3S_IRQPRIO_SYSCALL; break; 157 case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG; break; 158 case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC; break; 159 case 0xf40: prio = BOOK3S_IRQPRIO_VSX; break; 160 case 0xf60: prio = BOOK3S_IRQPRIO_FAC_UNAVAIL; break; 161 default: prio = BOOK3S_IRQPRIO_MAX; break; 162 } 163 164 return prio; 165 } 166 167 void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu, 168 unsigned int vec) 169 { 170 unsigned long old_pending = vcpu->arch.pending_exceptions; 171 172 clear_bit(kvmppc_book3s_vec2irqprio(vec), 173 &vcpu->arch.pending_exceptions); 174 175 kvmppc_update_int_pending(vcpu, vcpu->arch.pending_exceptions, 176 old_pending); 177 } 178 179 void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec) 180 { 181 vcpu->stat.queue_intr++; 182 183 set_bit(kvmppc_book3s_vec2irqprio(vec), 184 &vcpu->arch.pending_exceptions); 185 #ifdef EXIT_DEBUG 186 printk(KERN_INFO "Queueing interrupt %x\n", vec); 187 #endif 188 } 189 EXPORT_SYMBOL_GPL(kvmppc_book3s_queue_irqprio); 190 191 void kvmppc_core_queue_machine_check(struct kvm_vcpu *vcpu, ulong srr1_flags) 192 { 193 /* might as well deliver this straight away */ 194 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_MACHINE_CHECK, srr1_flags); 195 } 196 EXPORT_SYMBOL_GPL(kvmppc_core_queue_machine_check); 197 198 void kvmppc_core_queue_syscall(struct kvm_vcpu *vcpu) 199 { 200 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_SYSCALL, 0); 201 } 202 EXPORT_SYMBOL(kvmppc_core_queue_syscall); 203 204 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong srr1_flags) 205 { 206 /* might as well deliver this straight away */ 207 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, srr1_flags); 208 } 209 EXPORT_SYMBOL_GPL(kvmppc_core_queue_program); 210 211 void kvmppc_core_queue_fpunavail(struct kvm_vcpu *vcpu, ulong srr1_flags) 212 { 213 /* might as well deliver this straight away */ 214 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, srr1_flags); 215 } 216 217 void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu, ulong srr1_flags) 218 { 219 /* might as well deliver this straight away */ 220 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_ALTIVEC, srr1_flags); 221 } 222 223 void kvmppc_core_queue_vsx_unavail(struct kvm_vcpu *vcpu, ulong srr1_flags) 224 { 225 /* might as well deliver this straight away */ 226 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_VSX, srr1_flags); 227 } 228 229 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu) 230 { 231 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER); 232 } 233 EXPORT_SYMBOL_GPL(kvmppc_core_queue_dec); 234 235 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu) 236 { 237 return test_bit(BOOK3S_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 238 } 239 EXPORT_SYMBOL_GPL(kvmppc_core_pending_dec); 240 241 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu) 242 { 243 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER); 244 } 245 EXPORT_SYMBOL_GPL(kvmppc_core_dequeue_dec); 246 247 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, 248 struct kvm_interrupt *irq) 249 { 250 /* 251 * This case (KVM_INTERRUPT_SET) should never actually arise for 252 * a pseries guest (because pseries guests expect their interrupt 253 * controllers to continue asserting an external interrupt request 254 * until it is acknowledged at the interrupt controller), but is 255 * included to avoid ABI breakage and potentially for other 256 * sorts of guest. 257 * 258 * There is a subtlety here: HV KVM does not test the 259 * external_oneshot flag in the code that synthesizes 260 * external interrupts for the guest just before entering 261 * the guest. That is OK even if userspace did do a 262 * KVM_INTERRUPT_SET on a pseries guest vcpu, because the 263 * caller (kvm_vcpu_ioctl_interrupt) does a kvm_vcpu_kick() 264 * which ends up doing a smp_send_reschedule(), which will 265 * pull the guest all the way out to the host, meaning that 266 * we will call kvmppc_core_prepare_to_enter() before entering 267 * the guest again, and that will handle the external_oneshot 268 * flag correctly. 269 */ 270 if (irq->irq == KVM_INTERRUPT_SET) 271 vcpu->arch.external_oneshot = 1; 272 273 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL); 274 } 275 276 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu) 277 { 278 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL); 279 } 280 281 void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, ulong srr1_flags, 282 ulong dar, ulong dsisr) 283 { 284 kvmppc_set_dar(vcpu, dar); 285 kvmppc_set_dsisr(vcpu, dsisr); 286 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE, srr1_flags); 287 } 288 EXPORT_SYMBOL_GPL(kvmppc_core_queue_data_storage); 289 290 void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong srr1_flags) 291 { 292 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_INST_STORAGE, srr1_flags); 293 } 294 EXPORT_SYMBOL_GPL(kvmppc_core_queue_inst_storage); 295 296 static int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu, 297 unsigned int priority) 298 { 299 int deliver = 1; 300 int vec = 0; 301 bool crit = kvmppc_critical_section(vcpu); 302 303 switch (priority) { 304 case BOOK3S_IRQPRIO_DECREMENTER: 305 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit; 306 vec = BOOK3S_INTERRUPT_DECREMENTER; 307 break; 308 case BOOK3S_IRQPRIO_EXTERNAL: 309 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit; 310 vec = BOOK3S_INTERRUPT_EXTERNAL; 311 break; 312 case BOOK3S_IRQPRIO_SYSTEM_RESET: 313 vec = BOOK3S_INTERRUPT_SYSTEM_RESET; 314 break; 315 case BOOK3S_IRQPRIO_MACHINE_CHECK: 316 vec = BOOK3S_INTERRUPT_MACHINE_CHECK; 317 break; 318 case BOOK3S_IRQPRIO_DATA_STORAGE: 319 vec = BOOK3S_INTERRUPT_DATA_STORAGE; 320 break; 321 case BOOK3S_IRQPRIO_INST_STORAGE: 322 vec = BOOK3S_INTERRUPT_INST_STORAGE; 323 break; 324 case BOOK3S_IRQPRIO_DATA_SEGMENT: 325 vec = BOOK3S_INTERRUPT_DATA_SEGMENT; 326 break; 327 case BOOK3S_IRQPRIO_INST_SEGMENT: 328 vec = BOOK3S_INTERRUPT_INST_SEGMENT; 329 break; 330 case BOOK3S_IRQPRIO_ALIGNMENT: 331 vec = BOOK3S_INTERRUPT_ALIGNMENT; 332 break; 333 case BOOK3S_IRQPRIO_PROGRAM: 334 vec = BOOK3S_INTERRUPT_PROGRAM; 335 break; 336 case BOOK3S_IRQPRIO_VSX: 337 vec = BOOK3S_INTERRUPT_VSX; 338 break; 339 case BOOK3S_IRQPRIO_ALTIVEC: 340 vec = BOOK3S_INTERRUPT_ALTIVEC; 341 break; 342 case BOOK3S_IRQPRIO_FP_UNAVAIL: 343 vec = BOOK3S_INTERRUPT_FP_UNAVAIL; 344 break; 345 case BOOK3S_IRQPRIO_SYSCALL: 346 vec = BOOK3S_INTERRUPT_SYSCALL; 347 break; 348 case BOOK3S_IRQPRIO_DEBUG: 349 vec = BOOK3S_INTERRUPT_TRACE; 350 break; 351 case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR: 352 vec = BOOK3S_INTERRUPT_PERFMON; 353 break; 354 case BOOK3S_IRQPRIO_FAC_UNAVAIL: 355 vec = BOOK3S_INTERRUPT_FAC_UNAVAIL; 356 break; 357 default: 358 deliver = 0; 359 printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority); 360 break; 361 } 362 363 #if 0 364 printk(KERN_INFO "Deliver interrupt 0x%x? %x\n", vec, deliver); 365 #endif 366 367 if (deliver) 368 kvmppc_inject_interrupt(vcpu, vec, 0); 369 370 return deliver; 371 } 372 373 /* 374 * This function determines if an irqprio should be cleared once issued. 375 */ 376 static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority) 377 { 378 switch (priority) { 379 case BOOK3S_IRQPRIO_DECREMENTER: 380 /* DEC interrupts get cleared by mtdec */ 381 return false; 382 case BOOK3S_IRQPRIO_EXTERNAL: 383 /* 384 * External interrupts get cleared by userspace 385 * except when set by the KVM_INTERRUPT ioctl with 386 * KVM_INTERRUPT_SET (not KVM_INTERRUPT_SET_LEVEL). 387 */ 388 if (vcpu->arch.external_oneshot) { 389 vcpu->arch.external_oneshot = 0; 390 return true; 391 } 392 return false; 393 } 394 395 return true; 396 } 397 398 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu) 399 { 400 unsigned long *pending = &vcpu->arch.pending_exceptions; 401 unsigned long old_pending = vcpu->arch.pending_exceptions; 402 unsigned int priority; 403 404 #ifdef EXIT_DEBUG 405 if (vcpu->arch.pending_exceptions) 406 printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions); 407 #endif 408 priority = __ffs(*pending); 409 while (priority < BOOK3S_IRQPRIO_MAX) { 410 if (kvmppc_book3s_irqprio_deliver(vcpu, priority) && 411 clear_irqprio(vcpu, priority)) { 412 clear_bit(priority, &vcpu->arch.pending_exceptions); 413 break; 414 } 415 416 priority = find_next_bit(pending, 417 BITS_PER_BYTE * sizeof(*pending), 418 priority + 1); 419 } 420 421 /* Tell the guest about our interrupt status */ 422 kvmppc_update_int_pending(vcpu, *pending, old_pending); 423 424 return 0; 425 } 426 EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter); 427 428 kvm_pfn_t kvmppc_gpa_to_pfn(struct kvm_vcpu *vcpu, gpa_t gpa, bool writing, 429 bool *writable) 430 { 431 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM; 432 gfn_t gfn = gpa >> PAGE_SHIFT; 433 434 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) 435 mp_pa = (uint32_t)mp_pa; 436 437 /* Magic page override */ 438 gpa &= ~0xFFFULL; 439 if (unlikely(mp_pa) && unlikely((gpa & KVM_PAM) == mp_pa)) { 440 ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK; 441 kvm_pfn_t pfn; 442 443 pfn = (kvm_pfn_t)virt_to_phys((void*)shared_page) >> PAGE_SHIFT; 444 get_page(pfn_to_page(pfn)); 445 if (writable) 446 *writable = true; 447 return pfn; 448 } 449 450 return gfn_to_pfn_prot(vcpu->kvm, gfn, writing, writable); 451 } 452 EXPORT_SYMBOL_GPL(kvmppc_gpa_to_pfn); 453 454 int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid, 455 enum xlate_readwrite xlrw, struct kvmppc_pte *pte) 456 { 457 bool data = (xlid == XLATE_DATA); 458 bool iswrite = (xlrw == XLATE_WRITE); 459 int relocated = (kvmppc_get_msr(vcpu) & (data ? MSR_DR : MSR_IR)); 460 int r; 461 462 if (relocated) { 463 r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data, iswrite); 464 } else { 465 pte->eaddr = eaddr; 466 pte->raddr = eaddr & KVM_PAM; 467 pte->vpage = VSID_REAL | eaddr >> 12; 468 pte->may_read = true; 469 pte->may_write = true; 470 pte->may_execute = true; 471 r = 0; 472 473 if ((kvmppc_get_msr(vcpu) & (MSR_IR | MSR_DR)) == MSR_DR && 474 !data) { 475 if ((vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) && 476 ((eaddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS)) 477 pte->raddr &= ~SPLIT_HACK_MASK; 478 } 479 } 480 481 return r; 482 } 483 484 /* 485 * Returns prefixed instructions with the prefix in the high 32 bits 486 * of *inst and suffix in the low 32 bits. This is the same convention 487 * as used in HEIR, vcpu->arch.last_inst and vcpu->arch.emul_inst. 488 * Like vcpu->arch.last_inst but unlike vcpu->arch.emul_inst, each 489 * half of the value needs byte-swapping if the guest endianness is 490 * different from the host endianness. 491 */ 492 int kvmppc_load_last_inst(struct kvm_vcpu *vcpu, 493 enum instruction_fetch_type type, unsigned long *inst) 494 { 495 ulong pc = kvmppc_get_pc(vcpu); 496 int r; 497 u32 iw; 498 499 if (type == INST_SC) 500 pc -= 4; 501 502 r = kvmppc_ld(vcpu, &pc, sizeof(u32), &iw, false); 503 if (r != EMULATE_DONE) 504 return EMULATE_AGAIN; 505 /* 506 * If [H]SRR1 indicates that the instruction that caused the 507 * current interrupt is a prefixed instruction, get the suffix. 508 */ 509 if (kvmppc_get_msr(vcpu) & SRR1_PREFIXED) { 510 u32 suffix; 511 pc += 4; 512 r = kvmppc_ld(vcpu, &pc, sizeof(u32), &suffix, false); 513 if (r != EMULATE_DONE) 514 return EMULATE_AGAIN; 515 *inst = ((u64)iw << 32) | suffix; 516 } else { 517 *inst = iw; 518 } 519 return r; 520 } 521 EXPORT_SYMBOL_GPL(kvmppc_load_last_inst); 522 523 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu) 524 { 525 return 0; 526 } 527 528 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu) 529 { 530 } 531 532 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, 533 struct kvm_sregs *sregs) 534 { 535 int ret; 536 537 vcpu_load(vcpu); 538 ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs); 539 vcpu_put(vcpu); 540 541 return ret; 542 } 543 544 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, 545 struct kvm_sregs *sregs) 546 { 547 int ret; 548 549 vcpu_load(vcpu); 550 ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs); 551 vcpu_put(vcpu); 552 553 return ret; 554 } 555 556 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 557 { 558 int i; 559 560 regs->pc = kvmppc_get_pc(vcpu); 561 regs->cr = kvmppc_get_cr(vcpu); 562 regs->ctr = kvmppc_get_ctr(vcpu); 563 regs->lr = kvmppc_get_lr(vcpu); 564 regs->xer = kvmppc_get_xer(vcpu); 565 regs->msr = kvmppc_get_msr(vcpu); 566 regs->srr0 = kvmppc_get_srr0(vcpu); 567 regs->srr1 = kvmppc_get_srr1(vcpu); 568 regs->pid = vcpu->arch.pid; 569 regs->sprg0 = kvmppc_get_sprg0(vcpu); 570 regs->sprg1 = kvmppc_get_sprg1(vcpu); 571 regs->sprg2 = kvmppc_get_sprg2(vcpu); 572 regs->sprg3 = kvmppc_get_sprg3(vcpu); 573 regs->sprg4 = kvmppc_get_sprg4(vcpu); 574 regs->sprg5 = kvmppc_get_sprg5(vcpu); 575 regs->sprg6 = kvmppc_get_sprg6(vcpu); 576 regs->sprg7 = kvmppc_get_sprg7(vcpu); 577 578 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 579 regs->gpr[i] = kvmppc_get_gpr(vcpu, i); 580 581 return 0; 582 } 583 584 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 585 { 586 int i; 587 588 kvmppc_set_pc(vcpu, regs->pc); 589 kvmppc_set_cr(vcpu, regs->cr); 590 kvmppc_set_ctr(vcpu, regs->ctr); 591 kvmppc_set_lr(vcpu, regs->lr); 592 kvmppc_set_xer(vcpu, regs->xer); 593 kvmppc_set_msr(vcpu, regs->msr); 594 kvmppc_set_srr0(vcpu, regs->srr0); 595 kvmppc_set_srr1(vcpu, regs->srr1); 596 kvmppc_set_sprg0(vcpu, regs->sprg0); 597 kvmppc_set_sprg1(vcpu, regs->sprg1); 598 kvmppc_set_sprg2(vcpu, regs->sprg2); 599 kvmppc_set_sprg3(vcpu, regs->sprg3); 600 kvmppc_set_sprg4(vcpu, regs->sprg4); 601 kvmppc_set_sprg5(vcpu, regs->sprg5); 602 kvmppc_set_sprg6(vcpu, regs->sprg6); 603 kvmppc_set_sprg7(vcpu, regs->sprg7); 604 605 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 606 kvmppc_set_gpr(vcpu, i, regs->gpr[i]); 607 608 return 0; 609 } 610 611 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 612 { 613 return -EOPNOTSUPP; 614 } 615 616 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 617 { 618 return -EOPNOTSUPP; 619 } 620 621 int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id, 622 union kvmppc_one_reg *val) 623 { 624 int r = 0; 625 long int i; 626 627 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val); 628 if (r == -EINVAL) { 629 r = 0; 630 switch (id) { 631 case KVM_REG_PPC_DAR: 632 *val = get_reg_val(id, kvmppc_get_dar(vcpu)); 633 break; 634 case KVM_REG_PPC_DSISR: 635 *val = get_reg_val(id, kvmppc_get_dsisr(vcpu)); 636 break; 637 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31: 638 i = id - KVM_REG_PPC_FPR0; 639 *val = get_reg_val(id, VCPU_FPR(vcpu, i)); 640 break; 641 case KVM_REG_PPC_FPSCR: 642 *val = get_reg_val(id, vcpu->arch.fp.fpscr); 643 break; 644 #ifdef CONFIG_VSX 645 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31: 646 if (cpu_has_feature(CPU_FTR_VSX)) { 647 i = id - KVM_REG_PPC_VSR0; 648 val->vsxval[0] = vcpu->arch.fp.fpr[i][0]; 649 val->vsxval[1] = vcpu->arch.fp.fpr[i][1]; 650 } else { 651 r = -ENXIO; 652 } 653 break; 654 #endif /* CONFIG_VSX */ 655 case KVM_REG_PPC_DEBUG_INST: 656 *val = get_reg_val(id, INS_TW); 657 break; 658 #ifdef CONFIG_KVM_XICS 659 case KVM_REG_PPC_ICP_STATE: 660 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) { 661 r = -ENXIO; 662 break; 663 } 664 if (xics_on_xive()) 665 *val = get_reg_val(id, kvmppc_xive_get_icp(vcpu)); 666 else 667 *val = get_reg_val(id, kvmppc_xics_get_icp(vcpu)); 668 break; 669 #endif /* CONFIG_KVM_XICS */ 670 #ifdef CONFIG_KVM_XIVE 671 case KVM_REG_PPC_VP_STATE: 672 if (!vcpu->arch.xive_vcpu) { 673 r = -ENXIO; 674 break; 675 } 676 if (xive_enabled()) 677 r = kvmppc_xive_native_get_vp(vcpu, val); 678 else 679 r = -ENXIO; 680 break; 681 #endif /* CONFIG_KVM_XIVE */ 682 case KVM_REG_PPC_FSCR: 683 *val = get_reg_val(id, vcpu->arch.fscr); 684 break; 685 case KVM_REG_PPC_TAR: 686 *val = get_reg_val(id, vcpu->arch.tar); 687 break; 688 case KVM_REG_PPC_EBBHR: 689 *val = get_reg_val(id, vcpu->arch.ebbhr); 690 break; 691 case KVM_REG_PPC_EBBRR: 692 *val = get_reg_val(id, vcpu->arch.ebbrr); 693 break; 694 case KVM_REG_PPC_BESCR: 695 *val = get_reg_val(id, vcpu->arch.bescr); 696 break; 697 case KVM_REG_PPC_IC: 698 *val = get_reg_val(id, vcpu->arch.ic); 699 break; 700 default: 701 r = -EINVAL; 702 break; 703 } 704 } 705 706 return r; 707 } 708 709 int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id, 710 union kvmppc_one_reg *val) 711 { 712 int r = 0; 713 long int i; 714 715 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val); 716 if (r == -EINVAL) { 717 r = 0; 718 switch (id) { 719 case KVM_REG_PPC_DAR: 720 kvmppc_set_dar(vcpu, set_reg_val(id, *val)); 721 break; 722 case KVM_REG_PPC_DSISR: 723 kvmppc_set_dsisr(vcpu, set_reg_val(id, *val)); 724 break; 725 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31: 726 i = id - KVM_REG_PPC_FPR0; 727 VCPU_FPR(vcpu, i) = set_reg_val(id, *val); 728 break; 729 case KVM_REG_PPC_FPSCR: 730 vcpu->arch.fp.fpscr = set_reg_val(id, *val); 731 break; 732 #ifdef CONFIG_VSX 733 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31: 734 if (cpu_has_feature(CPU_FTR_VSX)) { 735 i = id - KVM_REG_PPC_VSR0; 736 vcpu->arch.fp.fpr[i][0] = val->vsxval[0]; 737 vcpu->arch.fp.fpr[i][1] = val->vsxval[1]; 738 } else { 739 r = -ENXIO; 740 } 741 break; 742 #endif /* CONFIG_VSX */ 743 #ifdef CONFIG_KVM_XICS 744 case KVM_REG_PPC_ICP_STATE: 745 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) { 746 r = -ENXIO; 747 break; 748 } 749 if (xics_on_xive()) 750 r = kvmppc_xive_set_icp(vcpu, set_reg_val(id, *val)); 751 else 752 r = kvmppc_xics_set_icp(vcpu, set_reg_val(id, *val)); 753 break; 754 #endif /* CONFIG_KVM_XICS */ 755 #ifdef CONFIG_KVM_XIVE 756 case KVM_REG_PPC_VP_STATE: 757 if (!vcpu->arch.xive_vcpu) { 758 r = -ENXIO; 759 break; 760 } 761 if (xive_enabled()) 762 r = kvmppc_xive_native_set_vp(vcpu, val); 763 else 764 r = -ENXIO; 765 break; 766 #endif /* CONFIG_KVM_XIVE */ 767 case KVM_REG_PPC_FSCR: 768 vcpu->arch.fscr = set_reg_val(id, *val); 769 break; 770 case KVM_REG_PPC_TAR: 771 vcpu->arch.tar = set_reg_val(id, *val); 772 break; 773 case KVM_REG_PPC_EBBHR: 774 vcpu->arch.ebbhr = set_reg_val(id, *val); 775 break; 776 case KVM_REG_PPC_EBBRR: 777 vcpu->arch.ebbrr = set_reg_val(id, *val); 778 break; 779 case KVM_REG_PPC_BESCR: 780 vcpu->arch.bescr = set_reg_val(id, *val); 781 break; 782 case KVM_REG_PPC_IC: 783 vcpu->arch.ic = set_reg_val(id, *val); 784 break; 785 default: 786 r = -EINVAL; 787 break; 788 } 789 } 790 791 return r; 792 } 793 794 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 795 { 796 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu); 797 } 798 799 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu) 800 { 801 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu); 802 } 803 804 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr) 805 { 806 vcpu->kvm->arch.kvm_ops->set_msr(vcpu, msr); 807 } 808 EXPORT_SYMBOL_GPL(kvmppc_set_msr); 809 810 int kvmppc_vcpu_run(struct kvm_vcpu *vcpu) 811 { 812 return vcpu->kvm->arch.kvm_ops->vcpu_run(vcpu); 813 } 814 815 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, 816 struct kvm_translation *tr) 817 { 818 return 0; 819 } 820 821 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu, 822 struct kvm_guest_debug *dbg) 823 { 824 vcpu_load(vcpu); 825 vcpu->guest_debug = dbg->control; 826 vcpu_put(vcpu); 827 return 0; 828 } 829 830 void kvmppc_decrementer_func(struct kvm_vcpu *vcpu) 831 { 832 kvmppc_core_queue_dec(vcpu); 833 kvm_vcpu_kick(vcpu); 834 } 835 836 int kvmppc_core_vcpu_create(struct kvm_vcpu *vcpu) 837 { 838 return vcpu->kvm->arch.kvm_ops->vcpu_create(vcpu); 839 } 840 841 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu) 842 { 843 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu); 844 } 845 846 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu) 847 { 848 return vcpu->kvm->arch.kvm_ops->check_requests(vcpu); 849 } 850 851 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot) 852 { 853 854 } 855 856 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log) 857 { 858 return kvm->arch.kvm_ops->get_dirty_log(kvm, log); 859 } 860 861 void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot) 862 { 863 kvm->arch.kvm_ops->free_memslot(slot); 864 } 865 866 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot) 867 { 868 kvm->arch.kvm_ops->flush_memslot(kvm, memslot); 869 } 870 871 int kvmppc_core_prepare_memory_region(struct kvm *kvm, 872 const struct kvm_memory_slot *old, 873 struct kvm_memory_slot *new, 874 enum kvm_mr_change change) 875 { 876 return kvm->arch.kvm_ops->prepare_memory_region(kvm, old, new, change); 877 } 878 879 void kvmppc_core_commit_memory_region(struct kvm *kvm, 880 struct kvm_memory_slot *old, 881 const struct kvm_memory_slot *new, 882 enum kvm_mr_change change) 883 { 884 kvm->arch.kvm_ops->commit_memory_region(kvm, old, new, change); 885 } 886 887 bool kvm_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range) 888 { 889 return kvm->arch.kvm_ops->unmap_gfn_range(kvm, range); 890 } 891 892 bool kvm_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range) 893 { 894 return kvm->arch.kvm_ops->age_gfn(kvm, range); 895 } 896 897 bool kvm_test_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range) 898 { 899 return kvm->arch.kvm_ops->test_age_gfn(kvm, range); 900 } 901 902 bool kvm_set_spte_gfn(struct kvm *kvm, struct kvm_gfn_range *range) 903 { 904 return kvm->arch.kvm_ops->set_spte_gfn(kvm, range); 905 } 906 907 int kvmppc_core_init_vm(struct kvm *kvm) 908 { 909 910 #ifdef CONFIG_PPC64 911 INIT_LIST_HEAD_RCU(&kvm->arch.spapr_tce_tables); 912 INIT_LIST_HEAD(&kvm->arch.rtas_tokens); 913 mutex_init(&kvm->arch.rtas_token_lock); 914 #endif 915 916 return kvm->arch.kvm_ops->init_vm(kvm); 917 } 918 919 void kvmppc_core_destroy_vm(struct kvm *kvm) 920 { 921 kvm->arch.kvm_ops->destroy_vm(kvm); 922 923 #ifdef CONFIG_PPC64 924 kvmppc_rtas_tokens_free(kvm); 925 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables)); 926 #endif 927 928 #ifdef CONFIG_KVM_XICS 929 /* 930 * Free the XIVE and XICS devices which are not directly freed by the 931 * device 'release' method 932 */ 933 kfree(kvm->arch.xive_devices.native); 934 kvm->arch.xive_devices.native = NULL; 935 kfree(kvm->arch.xive_devices.xics_on_xive); 936 kvm->arch.xive_devices.xics_on_xive = NULL; 937 kfree(kvm->arch.xics_device); 938 kvm->arch.xics_device = NULL; 939 #endif /* CONFIG_KVM_XICS */ 940 } 941 942 int kvmppc_h_logical_ci_load(struct kvm_vcpu *vcpu) 943 { 944 unsigned long size = kvmppc_get_gpr(vcpu, 4); 945 unsigned long addr = kvmppc_get_gpr(vcpu, 5); 946 u64 buf; 947 int srcu_idx; 948 int ret; 949 950 if (!is_power_of_2(size) || (size > sizeof(buf))) 951 return H_TOO_HARD; 952 953 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 954 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, size, &buf); 955 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 956 if (ret != 0) 957 return H_TOO_HARD; 958 959 switch (size) { 960 case 1: 961 kvmppc_set_gpr(vcpu, 4, *(u8 *)&buf); 962 break; 963 964 case 2: 965 kvmppc_set_gpr(vcpu, 4, be16_to_cpu(*(__be16 *)&buf)); 966 break; 967 968 case 4: 969 kvmppc_set_gpr(vcpu, 4, be32_to_cpu(*(__be32 *)&buf)); 970 break; 971 972 case 8: 973 kvmppc_set_gpr(vcpu, 4, be64_to_cpu(*(__be64 *)&buf)); 974 break; 975 976 default: 977 BUG(); 978 } 979 980 return H_SUCCESS; 981 } 982 EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_load); 983 984 int kvmppc_h_logical_ci_store(struct kvm_vcpu *vcpu) 985 { 986 unsigned long size = kvmppc_get_gpr(vcpu, 4); 987 unsigned long addr = kvmppc_get_gpr(vcpu, 5); 988 unsigned long val = kvmppc_get_gpr(vcpu, 6); 989 u64 buf; 990 int srcu_idx; 991 int ret; 992 993 switch (size) { 994 case 1: 995 *(u8 *)&buf = val; 996 break; 997 998 case 2: 999 *(__be16 *)&buf = cpu_to_be16(val); 1000 break; 1001 1002 case 4: 1003 *(__be32 *)&buf = cpu_to_be32(val); 1004 break; 1005 1006 case 8: 1007 *(__be64 *)&buf = cpu_to_be64(val); 1008 break; 1009 1010 default: 1011 return H_TOO_HARD; 1012 } 1013 1014 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 1015 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, size, &buf); 1016 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 1017 if (ret != 0) 1018 return H_TOO_HARD; 1019 1020 return H_SUCCESS; 1021 } 1022 EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_store); 1023 1024 int kvmppc_book3s_hcall_implemented(struct kvm *kvm, unsigned long hcall) 1025 { 1026 return kvm->arch.kvm_ops->hcall_implemented(hcall); 1027 } 1028 1029 #ifdef CONFIG_KVM_XICS 1030 int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level, 1031 bool line_status) 1032 { 1033 if (xics_on_xive()) 1034 return kvmppc_xive_set_irq(kvm, irq_source_id, irq, level, 1035 line_status); 1036 else 1037 return kvmppc_xics_set_irq(kvm, irq_source_id, irq, level, 1038 line_status); 1039 } 1040 1041 int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *irq_entry, 1042 struct kvm *kvm, int irq_source_id, 1043 int level, bool line_status) 1044 { 1045 return kvm_set_irq(kvm, irq_source_id, irq_entry->gsi, 1046 level, line_status); 1047 } 1048 static int kvmppc_book3s_set_irq(struct kvm_kernel_irq_routing_entry *e, 1049 struct kvm *kvm, int irq_source_id, int level, 1050 bool line_status) 1051 { 1052 return kvm_set_irq(kvm, irq_source_id, e->gsi, level, line_status); 1053 } 1054 1055 int kvm_irq_map_gsi(struct kvm *kvm, 1056 struct kvm_kernel_irq_routing_entry *entries, int gsi) 1057 { 1058 entries->gsi = gsi; 1059 entries->type = KVM_IRQ_ROUTING_IRQCHIP; 1060 entries->set = kvmppc_book3s_set_irq; 1061 entries->irqchip.irqchip = 0; 1062 entries->irqchip.pin = gsi; 1063 return 1; 1064 } 1065 1066 int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin) 1067 { 1068 return pin; 1069 } 1070 1071 #endif /* CONFIG_KVM_XICS */ 1072 1073 static int kvmppc_book3s_init(void) 1074 { 1075 int r; 1076 1077 r = kvm_init(sizeof(struct kvm_vcpu), 0, THIS_MODULE); 1078 if (r) 1079 return r; 1080 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER 1081 r = kvmppc_book3s_init_pr(); 1082 #endif 1083 1084 #ifdef CONFIG_KVM_XICS 1085 #ifdef CONFIG_KVM_XIVE 1086 if (xics_on_xive()) { 1087 kvm_register_device_ops(&kvm_xive_ops, KVM_DEV_TYPE_XICS); 1088 if (kvmppc_xive_native_supported()) 1089 kvm_register_device_ops(&kvm_xive_native_ops, 1090 KVM_DEV_TYPE_XIVE); 1091 } else 1092 #endif 1093 kvm_register_device_ops(&kvm_xics_ops, KVM_DEV_TYPE_XICS); 1094 #endif 1095 return r; 1096 } 1097 1098 static void kvmppc_book3s_exit(void) 1099 { 1100 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER 1101 kvmppc_book3s_exit_pr(); 1102 #endif 1103 kvm_exit(); 1104 } 1105 1106 module_init(kvmppc_book3s_init); 1107 module_exit(kvmppc_book3s_exit); 1108 1109 /* On 32bit this is our one and only kernel module */ 1110 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER 1111 MODULE_ALIAS_MISCDEV(KVM_MINOR); 1112 MODULE_ALIAS("devname:kvm"); 1113 #endif 1114