1c3617f72SDavid Howells #ifndef _ASM_POWERPC_AUXVEC_H 2c3617f72SDavid Howells #define _ASM_POWERPC_AUXVEC_H 3c3617f72SDavid Howells 4c3617f72SDavid Howells /* 5c3617f72SDavid Howells * We need to put in some extra aux table entries to tell glibc what 6c3617f72SDavid Howells * the cache block size is, so it can use the dcbz instruction safely. 7c3617f72SDavid Howells */ 8c3617f72SDavid Howells #define AT_DCACHEBSIZE 19 9c3617f72SDavid Howells #define AT_ICACHEBSIZE 20 10c3617f72SDavid Howells #define AT_UCACHEBSIZE 21 11c3617f72SDavid Howells /* A special ignored type value for PPC, for glibc compatibility. */ 12c3617f72SDavid Howells #define AT_IGNOREPPC 22 13c3617f72SDavid Howells 14c3617f72SDavid Howells /* The vDSO location. We have to use the same value as x86 for glibc's 15c3617f72SDavid Howells * sake :-) 16c3617f72SDavid Howells */ 17c3617f72SDavid Howells #define AT_SYSINFO_EHDR 33 18c3617f72SDavid Howells 19c3617f72SDavid Howells #define AT_VECTOR_SIZE_ARCH 6 /* entries in ARCH_DLINFO */ 20c3617f72SDavid Howells 21c3617f72SDavid Howells #endif 22