1 #ifndef _ASM_POWERPC_EXCEPTION_H 2 #define _ASM_POWERPC_EXCEPTION_H 3 /* 4 * Extracted from head_64.S 5 * 6 * PowerPC version 7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 8 * 9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP 10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> 11 * Adapted for Power Macintosh by Paul Mackerras. 12 * Low-level exception handlers and MMU support 13 * rewritten by Paul Mackerras. 14 * Copyright (C) 1996 Paul Mackerras. 15 * 16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and 17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com 18 * 19 * This file contains the low-level support and setup for the 20 * PowerPC-64 platform, including trap and interrupt dispatch. 21 * 22 * This program is free software; you can redistribute it and/or 23 * modify it under the terms of the GNU General Public License 24 * as published by the Free Software Foundation; either version 25 * 2 of the License, or (at your option) any later version. 26 */ 27 /* 28 * The following macros define the code that appears as 29 * the prologue to each of the exception handlers. They 30 * are split into two parts to allow a single kernel binary 31 * to be used for pSeries and iSeries. 32 * 33 * We make as much of the exception code common between native 34 * exception handlers (including pSeries LPAR) and iSeries LPAR 35 * implementations as possible. 36 */ 37 #include <asm/head-64.h> 38 39 #define EX_R9 0 40 #define EX_R10 8 41 #define EX_R11 16 42 #define EX_R12 24 43 #define EX_R13 32 44 #define EX_SRR0 40 45 #define EX_DAR 48 46 #define EX_DSISR 56 47 #define EX_CCR 60 48 #define EX_R3 64 49 #define EX_LR 72 50 #define EX_CFAR 80 51 #define EX_PPR 88 /* SMT thread status register (priority) */ 52 #define EX_CTR 96 53 54 #ifdef CONFIG_RELOCATABLE 55 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 56 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 57 LOAD_HANDLER(r12,label); \ 58 mtctr r12; \ 59 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 60 li r10,MSR_RI; \ 61 mtmsrd r10,1; /* Set RI (EE=0) */ \ 62 bctr; 63 #else 64 /* If not relocatable, we can jump directly -- and save messing with LR */ 65 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 66 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 67 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 68 li r10,MSR_RI; \ 69 mtmsrd r10,1; /* Set RI (EE=0) */ \ 70 b label; 71 #endif 72 #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 73 __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 74 75 /* 76 * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on 77 * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which 78 * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr. 79 */ 80 #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \ 81 EXCEPTION_PROLOG_0(area); \ 82 EXCEPTION_PROLOG_1(area, extra, vec); \ 83 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 84 85 /* 86 * We're short on space and time in the exception prolog, so we can't 87 * use the normal LOAD_REG_IMMEDIATE macro to load the address of label. 88 * Instead we get the base of the kernel from paca->kernelbase and or in the low 89 * part of label. This requires that the label be within 64KB of kernelbase, and 90 * that kernelbase be 64K aligned. 91 */ 92 #define LOAD_HANDLER(reg, label) \ 93 ld reg,PACAKBASE(r13); /* get high part of &label */ \ 94 ori reg,reg,(FIXED_SYMBOL_ABS_ADDR(label))@l; 95 96 #define __LOAD_HANDLER(reg, label) \ 97 ld reg,PACAKBASE(r13); \ 98 ori reg,reg,(ABS_ADDR(label))@l; 99 100 /* Exception register prefixes */ 101 #define EXC_HV H 102 #define EXC_STD 103 104 #if defined(CONFIG_RELOCATABLE) 105 /* 106 * If we support interrupts with relocation on AND we're a relocatable kernel, 107 * we need to use CTR to get to the 2nd level handler. So, save/restore it 108 * when required. 109 */ 110 #define SAVE_CTR(reg, area) mfctr reg ; std reg,area+EX_CTR(r13) 111 #define GET_CTR(reg, area) ld reg,area+EX_CTR(r13) 112 #define RESTORE_CTR(reg, area) ld reg,area+EX_CTR(r13) ; mtctr reg 113 #else 114 /* ...else CTR is unused and in register. */ 115 #define SAVE_CTR(reg, area) 116 #define GET_CTR(reg, area) mfctr reg 117 #define RESTORE_CTR(reg, area) 118 #endif 119 120 /* 121 * PPR save/restore macros used in exceptions_64s.S 122 * Used for P7 or later processors 123 */ 124 #define SAVE_PPR(area, ra, rb) \ 125 BEGIN_FTR_SECTION_NESTED(940) \ 126 ld ra,PACACURRENT(r13); \ 127 ld rb,area+EX_PPR(r13); /* Read PPR from paca */ \ 128 std rb,TASKTHREADPPR(ra); \ 129 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940) 130 131 #define RESTORE_PPR_PACA(area, ra) \ 132 BEGIN_FTR_SECTION_NESTED(941) \ 133 ld ra,area+EX_PPR(r13); \ 134 mtspr SPRN_PPR,ra; \ 135 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941) 136 137 /* 138 * Get an SPR into a register if the CPU has the given feature 139 */ 140 #define OPT_GET_SPR(ra, spr, ftr) \ 141 BEGIN_FTR_SECTION_NESTED(943) \ 142 mfspr ra,spr; \ 143 END_FTR_SECTION_NESTED(ftr,ftr,943) 144 145 /* 146 * Set an SPR from a register if the CPU has the given feature 147 */ 148 #define OPT_SET_SPR(ra, spr, ftr) \ 149 BEGIN_FTR_SECTION_NESTED(943) \ 150 mtspr spr,ra; \ 151 END_FTR_SECTION_NESTED(ftr,ftr,943) 152 153 /* 154 * Save a register to the PACA if the CPU has the given feature 155 */ 156 #define OPT_SAVE_REG_TO_PACA(offset, ra, ftr) \ 157 BEGIN_FTR_SECTION_NESTED(943) \ 158 std ra,offset(r13); \ 159 END_FTR_SECTION_NESTED(ftr,ftr,943) 160 161 #define EXCEPTION_PROLOG_0_PACA(area) \ 162 std r9,area+EX_R9(r13); /* save r9 */ \ 163 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \ 164 HMT_MEDIUM; \ 165 std r10,area+EX_R10(r13); /* save r10 - r12 */ \ 166 OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR) 167 168 #define EXCEPTION_PROLOG_0(area) \ 169 GET_PACA(r13); \ 170 EXCEPTION_PROLOG_0_PACA(area) 171 172 #define __EXCEPTION_PROLOG_1(area, extra, vec) \ 173 OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \ 174 OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \ 175 SAVE_CTR(r10, area); \ 176 mfcr r9; \ 177 extra(vec); \ 178 std r11,area+EX_R11(r13); \ 179 std r12,area+EX_R12(r13); \ 180 GET_SCRATCH0(r10); \ 181 std r10,area+EX_R13(r13) 182 #define EXCEPTION_PROLOG_1(area, extra, vec) \ 183 __EXCEPTION_PROLOG_1(area, extra, vec) 184 185 #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \ 186 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 187 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 188 LOAD_HANDLER(r12,label) \ 189 mtspr SPRN_##h##SRR0,r12; \ 190 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 191 mtspr SPRN_##h##SRR1,r10; \ 192 h##rfid; \ 193 b . /* prevent speculative execution */ 194 #define EXCEPTION_PROLOG_PSERIES_1(label, h) \ 195 __EXCEPTION_PROLOG_PSERIES_1(label, h) 196 197 #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \ 198 EXCEPTION_PROLOG_0(area); \ 199 EXCEPTION_PROLOG_1(area, extra, vec); \ 200 EXCEPTION_PROLOG_PSERIES_1(label, h); 201 202 /* Have the PACA in r13 already */ 203 #define EXCEPTION_PROLOG_PSERIES_PACA(area, label, h, extra, vec) \ 204 EXCEPTION_PROLOG_0_PACA(area); \ 205 EXCEPTION_PROLOG_1(area, extra, vec); \ 206 EXCEPTION_PROLOG_PSERIES_1(label, h); 207 208 #define __KVMTEST(h, n) \ 209 lbz r10,HSTATE_IN_GUEST(r13); \ 210 cmpwi r10,0; \ 211 bne do_kvm_##h##n 212 213 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 214 /* 215 * If hv is possible, interrupts come into to the hv version 216 * of the kvmppc_interrupt code, which then jumps to the PR handler, 217 * kvmppc_interrupt_pr, if the guest is a PR guest. 218 */ 219 #define kvmppc_interrupt kvmppc_interrupt_hv 220 #else 221 #define kvmppc_interrupt kvmppc_interrupt_pr 222 #endif 223 224 #ifdef CONFIG_RELOCATABLE 225 #define BRANCH_TO_COMMON(reg, label) \ 226 __LOAD_HANDLER(reg, label); \ 227 mtctr reg; \ 228 bctr 229 230 #else 231 #define BRANCH_TO_COMMON(reg, label) \ 232 b label 233 234 #endif 235 236 #define __KVM_HANDLER_PROLOG(area, n) \ 237 BEGIN_FTR_SECTION_NESTED(947) \ 238 ld r10,area+EX_CFAR(r13); \ 239 std r10,HSTATE_CFAR(r13); \ 240 END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947); \ 241 BEGIN_FTR_SECTION_NESTED(948) \ 242 ld r10,area+EX_PPR(r13); \ 243 std r10,HSTATE_PPR(r13); \ 244 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 245 ld r10,area+EX_R10(r13); \ 246 stw r9,HSTATE_SCRATCH1(r13); \ 247 ld r9,area+EX_R9(r13); \ 248 std r12,HSTATE_SCRATCH0(r13); \ 249 250 #define __KVM_HANDLER(area, h, n) \ 251 __KVM_HANDLER_PROLOG(area, n) \ 252 li r12,n; \ 253 b kvmppc_interrupt 254 255 #define __KVM_HANDLER_SKIP(area, h, n) \ 256 cmpwi r10,KVM_GUEST_MODE_SKIP; \ 257 ld r10,area+EX_R10(r13); \ 258 beq 89f; \ 259 stw r9,HSTATE_SCRATCH1(r13); \ 260 BEGIN_FTR_SECTION_NESTED(948) \ 261 ld r9,area+EX_PPR(r13); \ 262 std r9,HSTATE_PPR(r13); \ 263 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 264 ld r9,area+EX_R9(r13); \ 265 std r12,HSTATE_SCRATCH0(r13); \ 266 li r12,n; \ 267 b kvmppc_interrupt; \ 268 89: mtocrf 0x80,r9; \ 269 ld r9,area+EX_R9(r13); \ 270 b kvmppc_skip_##h##interrupt 271 272 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER 273 #define KVMTEST(h, n) __KVMTEST(h, n) 274 #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n) 275 #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n) 276 277 #else 278 #define KVMTEST(h, n) 279 #define KVM_HANDLER(area, h, n) 280 #define KVM_HANDLER_SKIP(area, h, n) 281 #endif 282 283 #define NOTEST(n) 284 285 /* 286 * The common exception prolog is used for all except a few exceptions 287 * such as a segment miss on a kernel address. We have to be prepared 288 * to take another exception from the point where we first touch the 289 * kernel stack onwards. 290 * 291 * On entry r13 points to the paca, r9-r13 are saved in the paca, 292 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and 293 * SRR1, and relocation is on. 294 */ 295 #define EXCEPTION_PROLOG_COMMON(n, area) \ 296 andi. r10,r12,MSR_PR; /* See if coming from user */ \ 297 mr r10,r1; /* Save r1 */ \ 298 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \ 299 beq- 1f; \ 300 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \ 301 1: cmpdi cr1,r1,-INT_FRAME_SIZE; /* check if r1 is in userspace */ \ 302 blt+ cr1,3f; /* abort if it is */ \ 303 li r1,(n); /* will be reloaded later */ \ 304 sth r1,PACA_TRAP_SAVE(r13); \ 305 std r3,area+EX_R3(r13); \ 306 addi r3,r13,area; /* r3 -> where regs are saved*/ \ 307 RESTORE_CTR(r1, area); \ 308 b bad_stack; \ 309 3: std r9,_CCR(r1); /* save CR in stackframe */ \ 310 std r11,_NIP(r1); /* save SRR0 in stackframe */ \ 311 std r12,_MSR(r1); /* save SRR1 in stackframe */ \ 312 std r10,0(r1); /* make stack chain pointer */ \ 313 std r0,GPR0(r1); /* save r0 in stackframe */ \ 314 std r10,GPR1(r1); /* save r1 in stackframe */ \ 315 beq 4f; /* if from kernel mode */ \ 316 ACCOUNT_CPU_USER_ENTRY(r13, r9, r10); \ 317 SAVE_PPR(area, r9, r10); \ 318 4: EXCEPTION_PROLOG_COMMON_2(area) \ 319 EXCEPTION_PROLOG_COMMON_3(n) \ 320 ACCOUNT_STOLEN_TIME 321 322 /* Save original regs values from save area to stack frame. */ 323 #define EXCEPTION_PROLOG_COMMON_2(area) \ 324 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \ 325 ld r10,area+EX_R10(r13); \ 326 std r9,GPR9(r1); \ 327 std r10,GPR10(r1); \ 328 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \ 329 ld r10,area+EX_R12(r13); \ 330 ld r11,area+EX_R13(r13); \ 331 std r9,GPR11(r1); \ 332 std r10,GPR12(r1); \ 333 std r11,GPR13(r1); \ 334 BEGIN_FTR_SECTION_NESTED(66); \ 335 ld r10,area+EX_CFAR(r13); \ 336 std r10,ORIG_GPR3(r1); \ 337 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \ 338 GET_CTR(r10, area); \ 339 std r10,_CTR(r1); 340 341 #define EXCEPTION_PROLOG_COMMON_3(n) \ 342 std r2,GPR2(r1); /* save r2 in stackframe */ \ 343 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \ 344 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \ 345 mflr r9; /* Get LR, later save to stack */ \ 346 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \ 347 std r9,_LINK(r1); \ 348 lbz r10,PACASOFTIRQEN(r13); \ 349 mfspr r11,SPRN_XER; /* save XER in stackframe */ \ 350 std r10,SOFTE(r1); \ 351 std r11,_XER(r1); \ 352 li r9,(n)+1; \ 353 std r9,_TRAP(r1); /* set trap number */ \ 354 li r10,0; \ 355 ld r11,exception_marker@toc(r2); \ 356 std r10,RESULT(r1); /* clear regs->result */ \ 357 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ 358 359 /* 360 * Exception vectors. 361 */ 362 #define STD_EXCEPTION_PSERIES(vec, label) \ 363 SET_SCRATCH0(r13); /* save r13 */ \ 364 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \ 365 EXC_STD, KVMTEST_PR, vec); \ 366 367 /* Version of above for when we have to branch out-of-line */ 368 #define __OOL_EXCEPTION(vec, label, hdlr) \ 369 SET_SCRATCH0(r13) \ 370 EXCEPTION_PROLOG_0(PACA_EXGEN) \ 371 b hdlr; 372 373 #define STD_EXCEPTION_PSERIES_OOL(vec, label) \ 374 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \ 375 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD) 376 377 #define STD_EXCEPTION_HV(loc, vec, label) \ 378 SET_SCRATCH0(r13); /* save r13 */ \ 379 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \ 380 EXC_HV, KVMTEST_HV, vec); 381 382 #define STD_EXCEPTION_HV_OOL(vec, label) \ 383 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \ 384 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) 385 386 #define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 387 /* No guest interrupts come through here */ \ 388 SET_SCRATCH0(r13); /* save r13 */ \ 389 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, EXC_STD, NOTEST, vec); 390 391 #define STD_RELON_EXCEPTION_PSERIES_OOL(vec, label) \ 392 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \ 393 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_STD) 394 395 #define STD_RELON_EXCEPTION_HV(loc, vec, label) \ 396 /* No guest interrupts come through here */ \ 397 SET_SCRATCH0(r13); /* save r13 */ \ 398 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, EXC_HV, NOTEST, vec); 399 400 #define STD_RELON_EXCEPTION_HV_OOL(vec, label) \ 401 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \ 402 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV) 403 404 /* This associate vector numbers with bits in paca->irq_happened */ 405 #define SOFTEN_VALUE_0x500 PACA_IRQ_EE 406 #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC 407 #define SOFTEN_VALUE_0x980 PACA_IRQ_DEC 408 #define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL 409 #define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL 410 #define SOFTEN_VALUE_0xe60 PACA_IRQ_HMI 411 #define SOFTEN_VALUE_0xea0 PACA_IRQ_EE 412 413 #define __SOFTEN_TEST(h, vec) \ 414 lbz r10,PACASOFTIRQEN(r13); \ 415 cmpwi r10,0; \ 416 li r10,SOFTEN_VALUE_##vec; \ 417 beq masked_##h##interrupt 418 419 #define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec) 420 421 #define SOFTEN_TEST_PR(vec) \ 422 KVMTEST(EXC_STD, vec); \ 423 _SOFTEN_TEST(EXC_STD, vec) 424 425 #define SOFTEN_TEST_HV(vec) \ 426 KVMTEST(EXC_HV, vec); \ 427 _SOFTEN_TEST(EXC_HV, vec) 428 429 #define KVMTEST_PR(vec) \ 430 KVMTEST(EXC_STD, vec) 431 432 #define KVMTEST_HV(vec) \ 433 KVMTEST(EXC_HV, vec) 434 435 #define SOFTEN_NOTEST_PR(vec) _SOFTEN_TEST(EXC_STD, vec) 436 #define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec) 437 438 #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 439 SET_SCRATCH0(r13); /* save r13 */ \ 440 EXCEPTION_PROLOG_0(PACA_EXGEN); \ 441 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 442 EXCEPTION_PROLOG_PSERIES_1(label, h); 443 444 #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 445 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) 446 447 #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \ 448 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 449 EXC_STD, SOFTEN_TEST_PR) 450 451 #define MASKABLE_EXCEPTION_PSERIES_OOL(vec, label) \ 452 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, vec); \ 453 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD) 454 455 #define MASKABLE_EXCEPTION_HV(loc, vec, label) \ 456 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 457 EXC_HV, SOFTEN_TEST_HV) 458 459 #define MASKABLE_EXCEPTION_HV_OOL(vec, label) \ 460 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \ 461 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) 462 463 #define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 464 SET_SCRATCH0(r13); /* save r13 */ \ 465 EXCEPTION_PROLOG_0(PACA_EXGEN); \ 466 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 467 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 468 469 #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 470 __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) 471 472 #define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 473 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 474 EXC_STD, SOFTEN_NOTEST_PR) 475 476 #define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label) \ 477 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 478 EXC_HV, SOFTEN_NOTEST_HV) 479 480 #define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label) \ 481 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_NOTEST_HV, vec); \ 482 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) 483 484 /* 485 * Our exception common code can be passed various "additions" 486 * to specify the behaviour of interrupts, whether to kick the 487 * runlatch, etc... 488 */ 489 490 /* 491 * This addition reconciles our actual IRQ state with the various software 492 * flags that track it. This may call C code. 493 */ 494 #define ADD_RECONCILE RECONCILE_IRQ_STATE(r10,r11) 495 496 #define ADD_NVGPRS \ 497 bl save_nvgprs 498 499 #define RUNLATCH_ON \ 500 BEGIN_FTR_SECTION \ 501 CURRENT_THREAD_INFO(r3, r1); \ 502 ld r4,TI_LOCAL_FLAGS(r3); \ 503 andi. r0,r4,_TLF_RUNLATCH; \ 504 beql ppc64_runlatch_on_trampoline; \ 505 END_FTR_SECTION_IFSET(CPU_FTR_CTRL) 506 507 #define EXCEPTION_COMMON(trap, label, hdlr, ret, additions) \ 508 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \ 509 /* Volatile regs are potentially clobbered here */ \ 510 additions; \ 511 addi r3,r1,STACK_FRAME_OVERHEAD; \ 512 bl hdlr; \ 513 b ret 514 515 #define STD_EXCEPTION_COMMON(trap, label, hdlr) \ 516 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except, \ 517 ADD_NVGPRS;ADD_RECONCILE) 518 519 /* 520 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur 521 * in the idle task and therefore need the special idle handling 522 * (finish nap and runlatch) 523 */ 524 #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \ 525 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except_lite, \ 526 FINISH_NAP;ADD_RECONCILE;RUNLATCH_ON) 527 528 /* 529 * When the idle code in power4_idle puts the CPU into NAP mode, 530 * it has to do so in a loop, and relies on the external interrupt 531 * and decrementer interrupt entry code to get it out of the loop. 532 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags 533 * to signal that it is in the loop and needs help to get out. 534 */ 535 #ifdef CONFIG_PPC_970_NAP 536 #define FINISH_NAP \ 537 BEGIN_FTR_SECTION \ 538 CURRENT_THREAD_INFO(r11, r1); \ 539 ld r9,TI_LOCAL_FLAGS(r11); \ 540 andi. r10,r9,_TLF_NAPPING; \ 541 bnel power4_fixup_nap; \ 542 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) 543 #else 544 #define FINISH_NAP 545 #endif 546 547 #endif /* _ASM_POWERPC_EXCEPTION_H */ 548