1 #ifndef _ASM_POWERPC_EXCEPTION_H
2 #define _ASM_POWERPC_EXCEPTION_H
3 /*
4  * Extracted from head_64.S
5  *
6  *  PowerPC version
7  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
8  *
9  *  Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
10  *    Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
11  *  Adapted for Power Macintosh by Paul Mackerras.
12  *  Low-level exception handlers and MMU support
13  *  rewritten by Paul Mackerras.
14  *    Copyright (C) 1996 Paul Mackerras.
15  *
16  *  Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
17  *    Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
18  *
19  *  This file contains the low-level support and setup for the
20  *  PowerPC-64 platform, including trap and interrupt dispatch.
21  *
22  *  This program is free software; you can redistribute it and/or
23  *  modify it under the terms of the GNU General Public License
24  *  as published by the Free Software Foundation; either version
25  *  2 of the License, or (at your option) any later version.
26  */
27 /*
28  * The following macros define the code that appears as
29  * the prologue to each of the exception handlers.  They
30  * are split into two parts to allow a single kernel binary
31  * to be used for pSeries and iSeries.
32  *
33  * We make as much of the exception code common between native
34  * exception handlers (including pSeries LPAR) and iSeries LPAR
35  * implementations as possible.
36  */
37 
38 #define EX_R9		0
39 #define EX_R10		8
40 #define EX_R11		16
41 #define EX_R12		24
42 #define EX_R13		32
43 #define EX_SRR0		40
44 #define EX_DAR		48
45 #define EX_DSISR	56
46 #define EX_CCR		60
47 #define EX_R3		64
48 #define EX_LR		72
49 #define EX_CFAR		80
50 #define EX_PPR		88	/* SMT thread status register (priority) */
51 #define EX_CTR		96
52 
53 #ifdef CONFIG_RELOCATABLE
54 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)			\
55 	ld	r12,PACAKBASE(r13);	/* get high part of &label */	\
56 	mfspr	r11,SPRN_##h##SRR0;	/* save SRR0 */			\
57 	LOAD_HANDLER(r12,label);					\
58 	mtctr	r12;							\
59 	mfspr	r12,SPRN_##h##SRR1;	/* and SRR1 */			\
60 	li	r10,MSR_RI;						\
61 	mtmsrd 	r10,1;			/* Set RI (EE=0) */		\
62 	bctr;
63 #else
64 /* If not relocatable, we can jump directly -- and save messing with LR */
65 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)			\
66 	mfspr	r11,SPRN_##h##SRR0;	/* save SRR0 */			\
67 	mfspr	r12,SPRN_##h##SRR1;	/* and SRR1 */			\
68 	li	r10,MSR_RI;						\
69 	mtmsrd 	r10,1;			/* Set RI (EE=0) */		\
70 	b	label;
71 #endif
72 #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)			\
73 	__EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)			\
74 
75 /*
76  * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on
77  * so no need to rfid.  Save lr in case we're CONFIG_RELOCATABLE, in which
78  * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr.
79  */
80 #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec)	\
81 	EXCEPTION_PROLOG_0(area);					\
82 	EXCEPTION_PROLOG_1(area, extra, vec);				\
83 	EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)
84 
85 /*
86  * We're short on space and time in the exception prolog, so we can't
87  * use the normal SET_REG_IMMEDIATE macro. Normally we just need the
88  * low halfword of the address, but for Kdump we need the whole low
89  * word.
90  */
91 #define LOAD_HANDLER(reg, label)					\
92 	/* Handlers must be within 64K of kbase, which must be 64k aligned */ \
93 	ori	reg,reg,(label)-_stext;	/* virt addr of handler ... */
94 
95 /* Exception register prefixes */
96 #define EXC_HV	H
97 #define EXC_STD
98 
99 #if defined(CONFIG_RELOCATABLE)
100 /*
101  * If we support interrupts with relocation on AND we're a relocatable kernel,
102  * we need to use CTR to get to the 2nd level handler.  So, save/restore it
103  * when required.
104  */
105 #define SAVE_CTR(reg, area)	mfctr	reg ; 	std	reg,area+EX_CTR(r13)
106 #define GET_CTR(reg, area) 			ld	reg,area+EX_CTR(r13)
107 #define RESTORE_CTR(reg, area)	ld	reg,area+EX_CTR(r13) ; mtctr reg
108 #else
109 /* ...else CTR is unused and in register. */
110 #define SAVE_CTR(reg, area)
111 #define GET_CTR(reg, area) 	mfctr	reg
112 #define RESTORE_CTR(reg, area)
113 #endif
114 
115 /*
116  * PPR save/restore macros used in exceptions_64s.S
117  * Used for P7 or later processors
118  */
119 #define SAVE_PPR(area, ra, rb)						\
120 BEGIN_FTR_SECTION_NESTED(940)						\
121 	ld	ra,PACACURRENT(r13);					\
122 	ld	rb,area+EX_PPR(r13);	/* Read PPR from paca */	\
123 	std	rb,TASKTHREADPPR(ra);					\
124 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940)
125 
126 #define RESTORE_PPR_PACA(area, ra)					\
127 BEGIN_FTR_SECTION_NESTED(941)						\
128 	ld	ra,area+EX_PPR(r13);					\
129 	mtspr	SPRN_PPR,ra;						\
130 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941)
131 
132 /*
133  * Increase the priority on systems where PPR save/restore is not
134  * implemented/ supported.
135  */
136 #define HMT_MEDIUM_PPR_DISCARD						\
137 BEGIN_FTR_SECTION_NESTED(942)						\
138 	HMT_MEDIUM;							\
139 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,0,942)  /*non P7*/
140 
141 /*
142  * Get an SPR into a register if the CPU has the given feature
143  */
144 #define OPT_GET_SPR(ra, spr, ftr)					\
145 BEGIN_FTR_SECTION_NESTED(943)						\
146 	mfspr	ra,spr;							\
147 END_FTR_SECTION_NESTED(ftr,ftr,943)
148 
149 /*
150  * Save a register to the PACA if the CPU has the given feature
151  */
152 #define OPT_SAVE_REG_TO_PACA(offset, ra, ftr)				\
153 BEGIN_FTR_SECTION_NESTED(943)						\
154 	std	ra,offset(r13);						\
155 END_FTR_SECTION_NESTED(ftr,ftr,943)
156 
157 #define EXCEPTION_PROLOG_0(area)					\
158 	GET_PACA(r13);							\
159 	std	r9,area+EX_R9(r13);	/* save r9 */			\
160 	OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR);			\
161 	HMT_MEDIUM;							\
162 	std	r10,area+EX_R10(r13);	/* save r10 - r12 */		\
163 	OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR)
164 
165 #define __EXCEPTION_PROLOG_1(area, extra, vec)				\
166 	OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR);		\
167 	OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR);		\
168 	SAVE_CTR(r10, area);						\
169 	mfcr	r9;							\
170 	extra(vec);							\
171 	std	r11,area+EX_R11(r13);					\
172 	std	r12,area+EX_R12(r13);					\
173 	GET_SCRATCH0(r10);						\
174 	std	r10,area+EX_R13(r13)
175 #define EXCEPTION_PROLOG_1(area, extra, vec)				\
176 	__EXCEPTION_PROLOG_1(area, extra, vec)
177 
178 #define __EXCEPTION_PROLOG_PSERIES_1(label, h)				\
179 	ld	r12,PACAKBASE(r13);	/* get high part of &label */	\
180 	ld	r10,PACAKMSR(r13);	/* get MSR value for kernel */	\
181 	mfspr	r11,SPRN_##h##SRR0;	/* save SRR0 */			\
182 	LOAD_HANDLER(r12,label)						\
183 	mtspr	SPRN_##h##SRR0,r12;					\
184 	mfspr	r12,SPRN_##h##SRR1;	/* and SRR1 */			\
185 	mtspr	SPRN_##h##SRR1,r10;					\
186 	h##rfid;							\
187 	b	.	/* prevent speculative execution */
188 #define EXCEPTION_PROLOG_PSERIES_1(label, h)				\
189 	__EXCEPTION_PROLOG_PSERIES_1(label, h)
190 
191 #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec)		\
192 	EXCEPTION_PROLOG_0(area);					\
193 	EXCEPTION_PROLOG_1(area, extra, vec);				\
194 	EXCEPTION_PROLOG_PSERIES_1(label, h);
195 
196 #define __KVMTEST(n)							\
197 	lbz	r10,HSTATE_IN_GUEST(r13);			\
198 	cmpwi	r10,0;							\
199 	bne	do_kvm_##n
200 
201 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
202 /*
203  * If hv is possible, interrupts come into to the hv version
204  * of the kvmppc_interrupt code, which then jumps to the PR handler,
205  * kvmppc_interrupt_pr, if the guest is a PR guest.
206  */
207 #define kvmppc_interrupt kvmppc_interrupt_hv
208 #else
209 #define kvmppc_interrupt kvmppc_interrupt_pr
210 #endif
211 
212 #define __KVM_HANDLER(area, h, n)					\
213 do_kvm_##n:								\
214 	BEGIN_FTR_SECTION_NESTED(947)					\
215 	ld	r10,area+EX_CFAR(r13);					\
216 	std	r10,HSTATE_CFAR(r13);					\
217 	END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947);		\
218 	BEGIN_FTR_SECTION_NESTED(948)					\
219 	ld	r10,area+EX_PPR(r13);					\
220 	std	r10,HSTATE_PPR(r13);					\
221 	END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948);	\
222 	ld	r10,area+EX_R10(r13);					\
223 	stw	r9,HSTATE_SCRATCH1(r13);				\
224 	ld	r9,area+EX_R9(r13);					\
225 	std	r12,HSTATE_SCRATCH0(r13);				\
226 	li	r12,n;							\
227 	b	kvmppc_interrupt
228 
229 #define __KVM_HANDLER_SKIP(area, h, n)					\
230 do_kvm_##n:								\
231 	cmpwi	r10,KVM_GUEST_MODE_SKIP;				\
232 	ld	r10,area+EX_R10(r13);					\
233 	beq	89f;							\
234 	stw	r9,HSTATE_SCRATCH1(r13);			\
235 	BEGIN_FTR_SECTION_NESTED(948)					\
236 	ld	r9,area+EX_PPR(r13);					\
237 	std	r9,HSTATE_PPR(r13);					\
238 	END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948);	\
239 	ld	r9,area+EX_R9(r13);					\
240 	std	r12,HSTATE_SCRATCH0(r13);			\
241 	li	r12,n;							\
242 	b	kvmppc_interrupt;					\
243 89:	mtocrf	0x80,r9;						\
244 	ld	r9,area+EX_R9(r13);					\
245 	b	kvmppc_skip_##h##interrupt
246 
247 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
248 #define KVMTEST(n)			__KVMTEST(n)
249 #define KVM_HANDLER(area, h, n)		__KVM_HANDLER(area, h, n)
250 #define KVM_HANDLER_SKIP(area, h, n)	__KVM_HANDLER_SKIP(area, h, n)
251 
252 #else
253 #define KVMTEST(n)
254 #define KVM_HANDLER(area, h, n)
255 #define KVM_HANDLER_SKIP(area, h, n)
256 #endif
257 
258 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
259 #define KVMTEST_PR(n)			__KVMTEST(n)
260 #define KVM_HANDLER_PR(area, h, n)	__KVM_HANDLER(area, h, n)
261 #define KVM_HANDLER_PR_SKIP(area, h, n)	__KVM_HANDLER_SKIP(area, h, n)
262 
263 #else
264 #define KVMTEST_PR(n)
265 #define KVM_HANDLER_PR(area, h, n)
266 #define KVM_HANDLER_PR_SKIP(area, h, n)
267 #endif
268 
269 #define NOTEST(n)
270 
271 /*
272  * The common exception prolog is used for all except a few exceptions
273  * such as a segment miss on a kernel address.  We have to be prepared
274  * to take another exception from the point where we first touch the
275  * kernel stack onwards.
276  *
277  * On entry r13 points to the paca, r9-r13 are saved in the paca,
278  * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
279  * SRR1, and relocation is on.
280  */
281 #define EXCEPTION_PROLOG_COMMON(n, area)				   \
282 	andi.	r10,r12,MSR_PR;		/* See if coming from user	*/ \
283 	mr	r10,r1;			/* Save r1			*/ \
284 	subi	r1,r1,INT_FRAME_SIZE;	/* alloc frame on kernel stack	*/ \
285 	beq-	1f;							   \
286 	ld	r1,PACAKSAVE(r13);	/* kernel stack to use		*/ \
287 1:	cmpdi	cr1,r1,0;		/* check if r1 is in userspace	*/ \
288 	blt+	cr1,3f;			/* abort if it is		*/ \
289 	li	r1,(n);			/* will be reloaded later	*/ \
290 	sth	r1,PACA_TRAP_SAVE(r13);					   \
291 	std	r3,area+EX_R3(r13);					   \
292 	addi	r3,r13,area;		/* r3 -> where regs are saved*/	   \
293 	RESTORE_CTR(r1, area);						   \
294 	b	bad_stack;						   \
295 3:	std	r9,_CCR(r1);		/* save CR in stackframe	*/ \
296 	std	r11,_NIP(r1);		/* save SRR0 in stackframe	*/ \
297 	std	r12,_MSR(r1);		/* save SRR1 in stackframe	*/ \
298 	std	r10,0(r1);		/* make stack chain pointer	*/ \
299 	std	r0,GPR0(r1);		/* save r0 in stackframe	*/ \
300 	std	r10,GPR1(r1);		/* save r1 in stackframe	*/ \
301 	beq	4f;			/* if from kernel mode		*/ \
302 	ACCOUNT_CPU_USER_ENTRY(r9, r10);				   \
303 	SAVE_PPR(area, r9, r10);					   \
304 4:	std	r2,GPR2(r1);		/* save r2 in stackframe	*/ \
305 	SAVE_4GPRS(3, r1);		/* save r3 - r6 in stackframe	*/ \
306 	SAVE_2GPRS(7, r1);		/* save r7, r8 in stackframe	*/ \
307 	ld	r9,area+EX_R9(r13);	/* move r9, r10 to stackframe	*/ \
308 	ld	r10,area+EX_R10(r13);					   \
309 	std	r9,GPR9(r1);						   \
310 	std	r10,GPR10(r1);						   \
311 	ld	r9,area+EX_R11(r13);	/* move r11 - r13 to stackframe	*/ \
312 	ld	r10,area+EX_R12(r13);					   \
313 	ld	r11,area+EX_R13(r13);					   \
314 	std	r9,GPR11(r1);						   \
315 	std	r10,GPR12(r1);						   \
316 	std	r11,GPR13(r1);						   \
317 	BEGIN_FTR_SECTION_NESTED(66);					   \
318 	ld	r10,area+EX_CFAR(r13);					   \
319 	std	r10,ORIG_GPR3(r1);					   \
320 	END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66);		   \
321 	mflr	r9;			/* Get LR, later save to stack	*/ \
322 	ld	r2,PACATOC(r13);	/* get kernel TOC into r2	*/ \
323 	std	r9,_LINK(r1);						   \
324 	GET_CTR(r10, area);						   \
325 	std	r10,_CTR(r1);						   \
326 	lbz	r10,PACASOFTIRQEN(r13);				   \
327 	mfspr	r11,SPRN_XER;		/* save XER in stackframe	*/ \
328 	std	r10,SOFTE(r1);						   \
329 	std	r11,_XER(r1);						   \
330 	li	r9,(n)+1;						   \
331 	std	r9,_TRAP(r1);		/* set trap number		*/ \
332 	li	r10,0;							   \
333 	ld	r11,exception_marker@toc(r2);				   \
334 	std	r10,RESULT(r1);		/* clear regs->result		*/ \
335 	std	r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame	*/ \
336 	ACCOUNT_STOLEN_TIME
337 
338 /*
339  * Exception vectors.
340  */
341 #define STD_EXCEPTION_PSERIES(loc, vec, label)		\
342 	. = loc;					\
343 	.globl label##_pSeries;				\
344 label##_pSeries:					\
345 	HMT_MEDIUM_PPR_DISCARD;				\
346 	SET_SCRATCH0(r13);		/* save r13 */		\
347 	EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common,	\
348 				 EXC_STD, KVMTEST_PR, vec)
349 
350 /* Version of above for when we have to branch out-of-line */
351 #define STD_EXCEPTION_PSERIES_OOL(vec, label)			\
352 	.globl label##_pSeries;					\
353 label##_pSeries:						\
354 	EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec);	\
355 	EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_STD)
356 
357 #define STD_EXCEPTION_HV(loc, vec, label)		\
358 	. = loc;					\
359 	.globl label##_hv;				\
360 label##_hv:						\
361 	HMT_MEDIUM_PPR_DISCARD;				\
362 	SET_SCRATCH0(r13);	/* save r13 */			\
363 	EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common,	\
364 				 EXC_HV, KVMTEST, vec)
365 
366 /* Version of above for when we have to branch out-of-line */
367 #define STD_EXCEPTION_HV_OOL(vec, label)		\
368 	.globl label##_hv;				\
369 label##_hv:						\
370 	EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST, vec);	\
371 	EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV)
372 
373 #define STD_RELON_EXCEPTION_PSERIES(loc, vec, label)	\
374 	. = loc;					\
375 	.globl label##_relon_pSeries;			\
376 label##_relon_pSeries:					\
377 	HMT_MEDIUM_PPR_DISCARD;				\
378 	/* No guest interrupts come through here */	\
379 	SET_SCRATCH0(r13);		/* save r13 */	\
380 	EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
381 				       EXC_STD, NOTEST, vec)
382 
383 #define STD_RELON_EXCEPTION_PSERIES_OOL(vec, label)		\
384 	.globl label##_relon_pSeries;				\
385 label##_relon_pSeries:						\
386 	EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec);		\
387 	EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, EXC_STD)
388 
389 #define STD_RELON_EXCEPTION_HV(loc, vec, label)		\
390 	. = loc;					\
391 	.globl label##_relon_hv;			\
392 label##_relon_hv:					\
393 	HMT_MEDIUM_PPR_DISCARD;				\
394 	/* No guest interrupts come through here */	\
395 	SET_SCRATCH0(r13);	/* save r13 */		\
396 	EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
397 				       EXC_HV, NOTEST, vec)
398 
399 #define STD_RELON_EXCEPTION_HV_OOL(vec, label)			\
400 	.globl label##_relon_hv;				\
401 label##_relon_hv:						\
402 	EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec);		\
403 	EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, EXC_HV)
404 
405 /* This associate vector numbers with bits in paca->irq_happened */
406 #define SOFTEN_VALUE_0x500	PACA_IRQ_EE
407 #define SOFTEN_VALUE_0x502	PACA_IRQ_EE
408 #define SOFTEN_VALUE_0x900	PACA_IRQ_DEC
409 #define SOFTEN_VALUE_0x982	PACA_IRQ_DEC
410 #define SOFTEN_VALUE_0xa00	PACA_IRQ_DBELL
411 #define SOFTEN_VALUE_0xe80	PACA_IRQ_DBELL
412 #define SOFTEN_VALUE_0xe82	PACA_IRQ_DBELL
413 
414 #define __SOFTEN_TEST(h, vec)						\
415 	lbz	r10,PACASOFTIRQEN(r13);					\
416 	cmpwi	r10,0;							\
417 	li	r10,SOFTEN_VALUE_##vec;					\
418 	beq	masked_##h##interrupt
419 #define _SOFTEN_TEST(h, vec)	__SOFTEN_TEST(h, vec)
420 
421 #define SOFTEN_TEST_PR(vec)						\
422 	KVMTEST_PR(vec);						\
423 	_SOFTEN_TEST(EXC_STD, vec)
424 
425 #define SOFTEN_TEST_HV(vec)						\
426 	KVMTEST(vec);							\
427 	_SOFTEN_TEST(EXC_HV, vec)
428 
429 #define SOFTEN_TEST_HV_201(vec)						\
430 	KVMTEST(vec);							\
431 	_SOFTEN_TEST(EXC_STD, vec)
432 
433 #define SOFTEN_NOTEST_PR(vec)		_SOFTEN_TEST(EXC_STD, vec)
434 #define SOFTEN_NOTEST_HV(vec)		_SOFTEN_TEST(EXC_HV, vec)
435 
436 #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)		\
437 	SET_SCRATCH0(r13);    /* save r13 */				\
438 	EXCEPTION_PROLOG_0(PACA_EXGEN);					\
439 	__EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec);			\
440 	EXCEPTION_PROLOG_PSERIES_1(label##_common, h);
441 
442 #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)		\
443 	__MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)
444 
445 #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label)			\
446 	. = loc;							\
447 	.globl label##_pSeries;						\
448 label##_pSeries:							\
449 	HMT_MEDIUM_PPR_DISCARD;						\
450 	_MASKABLE_EXCEPTION_PSERIES(vec, label,				\
451 				    EXC_STD, SOFTEN_TEST_PR)
452 
453 #define MASKABLE_EXCEPTION_HV(loc, vec, label)				\
454 	. = loc;							\
455 	.globl label##_hv;						\
456 label##_hv:								\
457 	_MASKABLE_EXCEPTION_PSERIES(vec, label,				\
458 				    EXC_HV, SOFTEN_TEST_HV)
459 
460 #define MASKABLE_EXCEPTION_HV_OOL(vec, label)				\
461 	.globl label##_hv;						\
462 label##_hv:								\
463 	EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec);		\
464 	EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV);
465 
466 #define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra)	\
467 	HMT_MEDIUM_PPR_DISCARD;						\
468 	SET_SCRATCH0(r13);    /* save r13 */				\
469 	EXCEPTION_PROLOG_0(PACA_EXGEN);					\
470 	__EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec);		\
471 	EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, h);
472 #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra)	\
473 	__MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra)
474 
475 #define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label)		\
476 	. = loc;							\
477 	.globl label##_relon_pSeries;					\
478 label##_relon_pSeries:							\
479 	_MASKABLE_RELON_EXCEPTION_PSERIES(vec, label,			\
480 					  EXC_STD, SOFTEN_NOTEST_PR)
481 
482 #define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label)			\
483 	. = loc;							\
484 	.globl label##_relon_hv;					\
485 label##_relon_hv:							\
486 	_MASKABLE_RELON_EXCEPTION_PSERIES(vec, label,			\
487 					  EXC_HV, SOFTEN_NOTEST_HV)
488 
489 #define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label)			\
490 	.globl label##_relon_hv;					\
491 label##_relon_hv:							\
492 	EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_NOTEST_HV, vec);		\
493 	EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV);
494 
495 /*
496  * Our exception common code can be passed various "additions"
497  * to specify the behaviour of interrupts, whether to kick the
498  * runlatch, etc...
499  */
500 
501 /* Exception addition: Hard disable interrupts */
502 #define DISABLE_INTS	RECONCILE_IRQ_STATE(r10,r11)
503 
504 #define ADD_NVGPRS				\
505 	bl	.save_nvgprs
506 
507 #define RUNLATCH_ON				\
508 BEGIN_FTR_SECTION				\
509 	CURRENT_THREAD_INFO(r3, r1);		\
510 	ld	r4,TI_LOCAL_FLAGS(r3);		\
511 	andi.	r0,r4,_TLF_RUNLATCH;		\
512 	beql	ppc64_runlatch_on_trampoline;	\
513 END_FTR_SECTION_IFSET(CPU_FTR_CTRL)
514 
515 #define EXCEPTION_COMMON(trap, label, hdlr, ret, additions)	\
516 	.align	7;						\
517 	.globl label##_common;					\
518 label##_common:							\
519 	EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN);		\
520 	additions;						\
521 	addi	r3,r1,STACK_FRAME_OVERHEAD;			\
522 	bl	hdlr;						\
523 	b	ret
524 
525 #define STD_EXCEPTION_COMMON(trap, label, hdlr)			\
526 	EXCEPTION_COMMON(trap, label, hdlr, ret_from_except,	\
527 			 ADD_NVGPRS;DISABLE_INTS)
528 
529 /*
530  * Like STD_EXCEPTION_COMMON, but for exceptions that can occur
531  * in the idle task and therefore need the special idle handling
532  * (finish nap and runlatch)
533  */
534 #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr)		  \
535 	EXCEPTION_COMMON(trap, label, hdlr, ret_from_except_lite, \
536 			 FINISH_NAP;DISABLE_INTS;RUNLATCH_ON)
537 
538 /*
539  * When the idle code in power4_idle puts the CPU into NAP mode,
540  * it has to do so in a loop, and relies on the external interrupt
541  * and decrementer interrupt entry code to get it out of the loop.
542  * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
543  * to signal that it is in the loop and needs help to get out.
544  */
545 #ifdef CONFIG_PPC_970_NAP
546 #define FINISH_NAP				\
547 BEGIN_FTR_SECTION				\
548 	CURRENT_THREAD_INFO(r11, r1);		\
549 	ld	r9,TI_LOCAL_FLAGS(r11);		\
550 	andi.	r10,r9,_TLF_NAPPING;		\
551 	bnel	power4_fixup_nap;		\
552 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
553 #else
554 #define FINISH_NAP
555 #endif
556 
557 #endif	/* _ASM_POWERPC_EXCEPTION_H */
558