1 #ifndef _ASM_POWERPC_EXCEPTION_H 2 #define _ASM_POWERPC_EXCEPTION_H 3 /* 4 * Extracted from head_64.S 5 * 6 * PowerPC version 7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 8 * 9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP 10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> 11 * Adapted for Power Macintosh by Paul Mackerras. 12 * Low-level exception handlers and MMU support 13 * rewritten by Paul Mackerras. 14 * Copyright (C) 1996 Paul Mackerras. 15 * 16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and 17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com 18 * 19 * This file contains the low-level support and setup for the 20 * PowerPC-64 platform, including trap and interrupt dispatch. 21 * 22 * This program is free software; you can redistribute it and/or 23 * modify it under the terms of the GNU General Public License 24 * as published by the Free Software Foundation; either version 25 * 2 of the License, or (at your option) any later version. 26 */ 27 /* 28 * The following macros define the code that appears as 29 * the prologue to each of the exception handlers. They 30 * are split into two parts to allow a single kernel binary 31 * to be used for pSeries and iSeries. 32 * 33 * We make as much of the exception code common between native 34 * exception handlers (including pSeries LPAR) and iSeries LPAR 35 * implementations as possible. 36 */ 37 #include <asm/head-64.h> 38 39 #define EX_R9 0 40 #define EX_R10 8 41 #define EX_R11 16 42 #define EX_R12 24 43 #define EX_R13 32 44 #define EX_SRR0 40 45 #define EX_DAR 48 46 #define EX_DSISR 56 47 #define EX_CCR 60 48 #define EX_R3 64 49 #define EX_LR 72 50 #define EX_CFAR 80 51 #define EX_PPR 88 /* SMT thread status register (priority) */ 52 #define EX_CTR 96 53 54 #ifdef CONFIG_RELOCATABLE 55 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 56 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 57 LOAD_HANDLER(r12,label); \ 58 mtctr r12; \ 59 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 60 li r10,MSR_RI; \ 61 mtmsrd r10,1; /* Set RI (EE=0) */ \ 62 bctr; 63 #else 64 /* If not relocatable, we can jump directly -- and save messing with LR */ 65 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 66 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 67 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 68 li r10,MSR_RI; \ 69 mtmsrd r10,1; /* Set RI (EE=0) */ \ 70 b label; 71 #endif 72 #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 73 __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 74 75 /* 76 * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on 77 * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which 78 * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr. 79 */ 80 #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \ 81 EXCEPTION_PROLOG_0(area); \ 82 EXCEPTION_PROLOG_1(area, extra, vec); \ 83 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 84 85 /* 86 * We're short on space and time in the exception prolog, so we can't 87 * use the normal LOAD_REG_IMMEDIATE macro to load the address of label. 88 * Instead we get the base of the kernel from paca->kernelbase and or in the low 89 * part of label. This requires that the label be within 64KB of kernelbase, and 90 * that kernelbase be 64K aligned. 91 */ 92 #define LOAD_HANDLER(reg, label) \ 93 ld reg,PACAKBASE(r13); /* get high part of &label */ \ 94 ori reg,reg,((label)-_stext)@l; /* virt addr of handler ... */ 95 96 /* Exception register prefixes */ 97 #define EXC_HV H 98 #define EXC_STD 99 100 #if defined(CONFIG_RELOCATABLE) 101 /* 102 * If we support interrupts with relocation on AND we're a relocatable kernel, 103 * we need to use CTR to get to the 2nd level handler. So, save/restore it 104 * when required. 105 */ 106 #define SAVE_CTR(reg, area) mfctr reg ; std reg,area+EX_CTR(r13) 107 #define GET_CTR(reg, area) ld reg,area+EX_CTR(r13) 108 #define RESTORE_CTR(reg, area) ld reg,area+EX_CTR(r13) ; mtctr reg 109 #else 110 /* ...else CTR is unused and in register. */ 111 #define SAVE_CTR(reg, area) 112 #define GET_CTR(reg, area) mfctr reg 113 #define RESTORE_CTR(reg, area) 114 #endif 115 116 /* 117 * PPR save/restore macros used in exceptions_64s.S 118 * Used for P7 or later processors 119 */ 120 #define SAVE_PPR(area, ra, rb) \ 121 BEGIN_FTR_SECTION_NESTED(940) \ 122 ld ra,PACACURRENT(r13); \ 123 ld rb,area+EX_PPR(r13); /* Read PPR from paca */ \ 124 std rb,TASKTHREADPPR(ra); \ 125 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940) 126 127 #define RESTORE_PPR_PACA(area, ra) \ 128 BEGIN_FTR_SECTION_NESTED(941) \ 129 ld ra,area+EX_PPR(r13); \ 130 mtspr SPRN_PPR,ra; \ 131 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941) 132 133 /* 134 * Get an SPR into a register if the CPU has the given feature 135 */ 136 #define OPT_GET_SPR(ra, spr, ftr) \ 137 BEGIN_FTR_SECTION_NESTED(943) \ 138 mfspr ra,spr; \ 139 END_FTR_SECTION_NESTED(ftr,ftr,943) 140 141 /* 142 * Set an SPR from a register if the CPU has the given feature 143 */ 144 #define OPT_SET_SPR(ra, spr, ftr) \ 145 BEGIN_FTR_SECTION_NESTED(943) \ 146 mtspr spr,ra; \ 147 END_FTR_SECTION_NESTED(ftr,ftr,943) 148 149 /* 150 * Save a register to the PACA if the CPU has the given feature 151 */ 152 #define OPT_SAVE_REG_TO_PACA(offset, ra, ftr) \ 153 BEGIN_FTR_SECTION_NESTED(943) \ 154 std ra,offset(r13); \ 155 END_FTR_SECTION_NESTED(ftr,ftr,943) 156 157 #define EXCEPTION_PROLOG_0(area) \ 158 GET_PACA(r13); \ 159 std r9,area+EX_R9(r13); /* save r9 */ \ 160 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \ 161 HMT_MEDIUM; \ 162 std r10,area+EX_R10(r13); /* save r10 - r12 */ \ 163 OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR) 164 165 #define __EXCEPTION_PROLOG_1(area, extra, vec) \ 166 OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \ 167 OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \ 168 SAVE_CTR(r10, area); \ 169 mfcr r9; \ 170 extra(vec); \ 171 std r11,area+EX_R11(r13); \ 172 std r12,area+EX_R12(r13); \ 173 GET_SCRATCH0(r10); \ 174 std r10,area+EX_R13(r13) 175 #define EXCEPTION_PROLOG_1(area, extra, vec) \ 176 __EXCEPTION_PROLOG_1(area, extra, vec) 177 178 #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \ 179 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 180 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 181 LOAD_HANDLER(r12,label) \ 182 mtspr SPRN_##h##SRR0,r12; \ 183 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 184 mtspr SPRN_##h##SRR1,r10; \ 185 h##rfid; \ 186 b . /* prevent speculative execution */ 187 #define EXCEPTION_PROLOG_PSERIES_1(label, h) \ 188 __EXCEPTION_PROLOG_PSERIES_1(label, h) 189 190 #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \ 191 EXCEPTION_PROLOG_0(area); \ 192 EXCEPTION_PROLOG_1(area, extra, vec); \ 193 EXCEPTION_PROLOG_PSERIES_1(label, h); 194 195 #define __KVMTEST(h, n) \ 196 lbz r10,HSTATE_IN_GUEST(r13); \ 197 cmpwi r10,0; \ 198 bne do_kvm_##h##n 199 200 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 201 /* 202 * If hv is possible, interrupts come into to the hv version 203 * of the kvmppc_interrupt code, which then jumps to the PR handler, 204 * kvmppc_interrupt_pr, if the guest is a PR guest. 205 */ 206 #define kvmppc_interrupt kvmppc_interrupt_hv 207 #else 208 #define kvmppc_interrupt kvmppc_interrupt_pr 209 #endif 210 211 #define __KVM_HANDLER_PROLOG(area, n) \ 212 BEGIN_FTR_SECTION_NESTED(947) \ 213 ld r10,area+EX_CFAR(r13); \ 214 std r10,HSTATE_CFAR(r13); \ 215 END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947); \ 216 BEGIN_FTR_SECTION_NESTED(948) \ 217 ld r10,area+EX_PPR(r13); \ 218 std r10,HSTATE_PPR(r13); \ 219 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 220 ld r10,area+EX_R10(r13); \ 221 stw r9,HSTATE_SCRATCH1(r13); \ 222 ld r9,area+EX_R9(r13); \ 223 std r12,HSTATE_SCRATCH0(r13); \ 224 225 #define __KVM_HANDLER(area, h, n) \ 226 __KVM_HANDLER_PROLOG(area, n) \ 227 li r12,n; \ 228 b kvmppc_interrupt 229 230 #define __KVM_HANDLER_SKIP(area, h, n) \ 231 cmpwi r10,KVM_GUEST_MODE_SKIP; \ 232 ld r10,area+EX_R10(r13); \ 233 beq 89f; \ 234 stw r9,HSTATE_SCRATCH1(r13); \ 235 BEGIN_FTR_SECTION_NESTED(948) \ 236 ld r9,area+EX_PPR(r13); \ 237 std r9,HSTATE_PPR(r13); \ 238 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 239 ld r9,area+EX_R9(r13); \ 240 std r12,HSTATE_SCRATCH0(r13); \ 241 li r12,n; \ 242 b kvmppc_interrupt; \ 243 89: mtocrf 0x80,r9; \ 244 ld r9,area+EX_R9(r13); \ 245 b kvmppc_skip_##h##interrupt 246 247 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER 248 #define KVMTEST(h, n) __KVMTEST(h, n) 249 #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n) 250 #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n) 251 252 #else 253 #define KVMTEST(h, n) 254 #define KVM_HANDLER(area, h, n) 255 #define KVM_HANDLER_SKIP(area, h, n) 256 #endif 257 258 #define NOTEST(n) 259 260 /* 261 * The common exception prolog is used for all except a few exceptions 262 * such as a segment miss on a kernel address. We have to be prepared 263 * to take another exception from the point where we first touch the 264 * kernel stack onwards. 265 * 266 * On entry r13 points to the paca, r9-r13 are saved in the paca, 267 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and 268 * SRR1, and relocation is on. 269 */ 270 #define EXCEPTION_PROLOG_COMMON(n, area) \ 271 andi. r10,r12,MSR_PR; /* See if coming from user */ \ 272 mr r10,r1; /* Save r1 */ \ 273 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \ 274 beq- 1f; \ 275 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \ 276 1: cmpdi cr1,r1,-INT_FRAME_SIZE; /* check if r1 is in userspace */ \ 277 blt+ cr1,3f; /* abort if it is */ \ 278 li r1,(n); /* will be reloaded later */ \ 279 sth r1,PACA_TRAP_SAVE(r13); \ 280 std r3,area+EX_R3(r13); \ 281 addi r3,r13,area; /* r3 -> where regs are saved*/ \ 282 RESTORE_CTR(r1, area); \ 283 b bad_stack; \ 284 3: std r9,_CCR(r1); /* save CR in stackframe */ \ 285 std r11,_NIP(r1); /* save SRR0 in stackframe */ \ 286 std r12,_MSR(r1); /* save SRR1 in stackframe */ \ 287 std r10,0(r1); /* make stack chain pointer */ \ 288 std r0,GPR0(r1); /* save r0 in stackframe */ \ 289 std r10,GPR1(r1); /* save r1 in stackframe */ \ 290 beq 4f; /* if from kernel mode */ \ 291 ACCOUNT_CPU_USER_ENTRY(r13, r9, r10); \ 292 SAVE_PPR(area, r9, r10); \ 293 4: EXCEPTION_PROLOG_COMMON_2(area) \ 294 EXCEPTION_PROLOG_COMMON_3(n) \ 295 ACCOUNT_STOLEN_TIME 296 297 /* Save original regs values from save area to stack frame. */ 298 #define EXCEPTION_PROLOG_COMMON_2(area) \ 299 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \ 300 ld r10,area+EX_R10(r13); \ 301 std r9,GPR9(r1); \ 302 std r10,GPR10(r1); \ 303 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \ 304 ld r10,area+EX_R12(r13); \ 305 ld r11,area+EX_R13(r13); \ 306 std r9,GPR11(r1); \ 307 std r10,GPR12(r1); \ 308 std r11,GPR13(r1); \ 309 BEGIN_FTR_SECTION_NESTED(66); \ 310 ld r10,area+EX_CFAR(r13); \ 311 std r10,ORIG_GPR3(r1); \ 312 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \ 313 GET_CTR(r10, area); \ 314 std r10,_CTR(r1); 315 316 #define EXCEPTION_PROLOG_COMMON_3(n) \ 317 std r2,GPR2(r1); /* save r2 in stackframe */ \ 318 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \ 319 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \ 320 mflr r9; /* Get LR, later save to stack */ \ 321 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \ 322 std r9,_LINK(r1); \ 323 lbz r10,PACASOFTIRQEN(r13); \ 324 mfspr r11,SPRN_XER; /* save XER in stackframe */ \ 325 std r10,SOFTE(r1); \ 326 std r11,_XER(r1); \ 327 li r9,(n)+1; \ 328 std r9,_TRAP(r1); /* set trap number */ \ 329 li r10,0; \ 330 ld r11,exception_marker@toc(r2); \ 331 std r10,RESULT(r1); /* clear regs->result */ \ 332 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ 333 334 /* 335 * Exception vectors. 336 */ 337 #define STD_EXCEPTION_PSERIES(vec, label) \ 338 SET_SCRATCH0(r13); /* save r13 */ \ 339 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \ 340 EXC_STD, KVMTEST_PR, vec); \ 341 342 /* Version of above for when we have to branch out-of-line */ 343 #define __OOL_EXCEPTION(vec, label, hdlr) \ 344 SET_SCRATCH0(r13) \ 345 EXCEPTION_PROLOG_0(PACA_EXGEN) \ 346 b hdlr; 347 348 #define STD_EXCEPTION_PSERIES_OOL(vec, label) \ 349 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \ 350 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD) 351 352 #define STD_EXCEPTION_HV(loc, vec, label) \ 353 SET_SCRATCH0(r13); /* save r13 */ \ 354 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \ 355 EXC_HV, KVMTEST_HV, vec); 356 357 #define STD_EXCEPTION_HV_OOL(vec, label) \ 358 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \ 359 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) 360 361 #define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 362 /* No guest interrupts come through here */ \ 363 SET_SCRATCH0(r13); /* save r13 */ \ 364 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, EXC_STD, NOTEST, vec); 365 366 #define STD_RELON_EXCEPTION_PSERIES_OOL(vec, label) \ 367 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \ 368 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_STD) 369 370 #define STD_RELON_EXCEPTION_HV(loc, vec, label) \ 371 /* No guest interrupts come through here */ \ 372 SET_SCRATCH0(r13); /* save r13 */ \ 373 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, EXC_HV, NOTEST, vec); 374 375 #define STD_RELON_EXCEPTION_HV_OOL(vec, label) \ 376 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \ 377 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV) 378 379 /* This associate vector numbers with bits in paca->irq_happened */ 380 #define SOFTEN_VALUE_0x500 PACA_IRQ_EE 381 #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC 382 #define SOFTEN_VALUE_0x980 PACA_IRQ_DEC 383 #define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL 384 #define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL 385 #define SOFTEN_VALUE_0xe60 PACA_IRQ_HMI 386 #define SOFTEN_VALUE_0xea0 PACA_IRQ_EE 387 388 #define __SOFTEN_TEST(h, vec) \ 389 lbz r10,PACASOFTIRQEN(r13); \ 390 cmpwi r10,0; \ 391 li r10,SOFTEN_VALUE_##vec; \ 392 beq masked_##h##interrupt 393 394 #define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec) 395 396 #define SOFTEN_TEST_PR(vec) \ 397 KVMTEST(EXC_STD, vec); \ 398 _SOFTEN_TEST(EXC_STD, vec) 399 400 #define SOFTEN_TEST_HV(vec) \ 401 KVMTEST(EXC_HV, vec); \ 402 _SOFTEN_TEST(EXC_HV, vec) 403 404 #define KVMTEST_PR(vec) \ 405 KVMTEST(EXC_STD, vec) 406 407 #define KVMTEST_HV(vec) \ 408 KVMTEST(EXC_HV, vec) 409 410 #define SOFTEN_NOTEST_PR(vec) _SOFTEN_TEST(EXC_STD, vec) 411 #define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec) 412 413 #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 414 SET_SCRATCH0(r13); /* save r13 */ \ 415 EXCEPTION_PROLOG_0(PACA_EXGEN); \ 416 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 417 EXCEPTION_PROLOG_PSERIES_1(label, h); 418 419 #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 420 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) 421 422 #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \ 423 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 424 EXC_STD, SOFTEN_TEST_PR) 425 426 #define MASKABLE_EXCEPTION_PSERIES_OOL(vec, label) \ 427 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, vec); \ 428 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD) 429 430 #define MASKABLE_EXCEPTION_HV(loc, vec, label) \ 431 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 432 EXC_HV, SOFTEN_TEST_HV) 433 434 #define MASKABLE_EXCEPTION_HV_OOL(vec, label) \ 435 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \ 436 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) 437 438 #define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 439 SET_SCRATCH0(r13); /* save r13 */ \ 440 EXCEPTION_PROLOG_0(PACA_EXGEN); \ 441 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 442 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 443 444 #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 445 __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) 446 447 #define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 448 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 449 EXC_STD, SOFTEN_NOTEST_PR) 450 451 #define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label) \ 452 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 453 EXC_HV, SOFTEN_NOTEST_HV) 454 455 #define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label) \ 456 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_NOTEST_HV, vec); \ 457 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) 458 459 /* 460 * Our exception common code can be passed various "additions" 461 * to specify the behaviour of interrupts, whether to kick the 462 * runlatch, etc... 463 */ 464 465 /* 466 * This addition reconciles our actual IRQ state with the various software 467 * flags that track it. This may call C code. 468 */ 469 #define ADD_RECONCILE RECONCILE_IRQ_STATE(r10,r11) 470 471 #define ADD_NVGPRS \ 472 bl save_nvgprs 473 474 #define RUNLATCH_ON \ 475 BEGIN_FTR_SECTION \ 476 CURRENT_THREAD_INFO(r3, r1); \ 477 ld r4,TI_LOCAL_FLAGS(r3); \ 478 andi. r0,r4,_TLF_RUNLATCH; \ 479 beql ppc64_runlatch_on_trampoline; \ 480 END_FTR_SECTION_IFSET(CPU_FTR_CTRL) 481 482 #define EXCEPTION_COMMON(trap, label, hdlr, ret, additions) \ 483 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \ 484 /* Volatile regs are potentially clobbered here */ \ 485 additions; \ 486 addi r3,r1,STACK_FRAME_OVERHEAD; \ 487 bl hdlr; \ 488 b ret 489 490 #define STD_EXCEPTION_COMMON(trap, label, hdlr) \ 491 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except, \ 492 ADD_NVGPRS;ADD_RECONCILE) 493 494 /* 495 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur 496 * in the idle task and therefore need the special idle handling 497 * (finish nap and runlatch) 498 */ 499 #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \ 500 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except_lite, \ 501 FINISH_NAP;ADD_RECONCILE;RUNLATCH_ON) 502 503 /* 504 * When the idle code in power4_idle puts the CPU into NAP mode, 505 * it has to do so in a loop, and relies on the external interrupt 506 * and decrementer interrupt entry code to get it out of the loop. 507 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags 508 * to signal that it is in the loop and needs help to get out. 509 */ 510 #ifdef CONFIG_PPC_970_NAP 511 #define FINISH_NAP \ 512 BEGIN_FTR_SECTION \ 513 CURRENT_THREAD_INFO(r11, r1); \ 514 ld r9,TI_LOCAL_FLAGS(r11); \ 515 andi. r10,r9,_TLF_NAPPING; \ 516 bnel power4_fixup_nap; \ 517 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) 518 #else 519 #define FINISH_NAP 520 #endif 521 522 #endif /* _ASM_POWERPC_EXCEPTION_H */ 523