1 #ifndef _ASM_POWERPC_EXCEPTION_H 2 #define _ASM_POWERPC_EXCEPTION_H 3 /* 4 * Extracted from head_64.S 5 * 6 * PowerPC version 7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 8 * 9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP 10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> 11 * Adapted for Power Macintosh by Paul Mackerras. 12 * Low-level exception handlers and MMU support 13 * rewritten by Paul Mackerras. 14 * Copyright (C) 1996 Paul Mackerras. 15 * 16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and 17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com 18 * 19 * This file contains the low-level support and setup for the 20 * PowerPC-64 platform, including trap and interrupt dispatch. 21 * 22 * This program is free software; you can redistribute it and/or 23 * modify it under the terms of the GNU General Public License 24 * as published by the Free Software Foundation; either version 25 * 2 of the License, or (at your option) any later version. 26 */ 27 /* 28 * The following macros define the code that appears as 29 * the prologue to each of the exception handlers. They 30 * are split into two parts to allow a single kernel binary 31 * to be used for pSeries and iSeries. 32 * 33 * We make as much of the exception code common between native 34 * exception handlers (including pSeries LPAR) and iSeries LPAR 35 * implementations as possible. 36 */ 37 38 #define EX_R9 0 39 #define EX_R10 8 40 #define EX_R11 16 41 #define EX_R12 24 42 #define EX_R13 32 43 #define EX_SRR0 40 44 #define EX_DAR 48 45 #define EX_DSISR 56 46 #define EX_CCR 60 47 #define EX_R3 64 48 #define EX_LR 72 49 #define EX_CFAR 80 50 #define EX_PPR 88 /* SMT thread status register (priority) */ 51 #define EX_CTR 96 52 53 #ifdef CONFIG_RELOCATABLE 54 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 55 ld r12,PACAKBASE(r13); /* get high part of &label */ \ 56 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 57 LOAD_HANDLER(r12,label); \ 58 mtctr r12; \ 59 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 60 li r10,MSR_RI; \ 61 mtmsrd r10,1; /* Set RI (EE=0) */ \ 62 bctr; 63 #else 64 /* If not relocatable, we can jump directly -- and save messing with LR */ 65 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 66 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 67 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 68 li r10,MSR_RI; \ 69 mtmsrd r10,1; /* Set RI (EE=0) */ \ 70 b label; 71 #endif 72 #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 73 __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 74 75 /* 76 * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on 77 * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which 78 * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr. 79 */ 80 #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \ 81 EXCEPTION_PROLOG_0(area); \ 82 EXCEPTION_PROLOG_1(area, extra, vec); \ 83 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 84 85 /* 86 * We're short on space and time in the exception prolog, so we can't 87 * use the normal SET_REG_IMMEDIATE macro. Normally we just need the 88 * low halfword of the address, but for Kdump we need the whole low 89 * word. 90 */ 91 #define LOAD_HANDLER(reg, label) \ 92 /* Handlers must be within 64K of kbase, which must be 64k aligned */ \ 93 ori reg,reg,(label)-_stext; /* virt addr of handler ... */ 94 95 /* Exception register prefixes */ 96 #define EXC_HV H 97 #define EXC_STD 98 99 #if defined(CONFIG_RELOCATABLE) 100 /* 101 * If we support interrupts with relocation on AND we're a relocatable kernel, 102 * we need to use CTR to get to the 2nd level handler. So, save/restore it 103 * when required. 104 */ 105 #define SAVE_CTR(reg, area) mfctr reg ; std reg,area+EX_CTR(r13) 106 #define GET_CTR(reg, area) ld reg,area+EX_CTR(r13) 107 #define RESTORE_CTR(reg, area) ld reg,area+EX_CTR(r13) ; mtctr reg 108 #else 109 /* ...else CTR is unused and in register. */ 110 #define SAVE_CTR(reg, area) 111 #define GET_CTR(reg, area) mfctr reg 112 #define RESTORE_CTR(reg, area) 113 #endif 114 115 /* 116 * PPR save/restore macros used in exceptions_64s.S 117 * Used for P7 or later processors 118 */ 119 #define SAVE_PPR(area, ra, rb) \ 120 BEGIN_FTR_SECTION_NESTED(940) \ 121 ld ra,PACACURRENT(r13); \ 122 ld rb,area+EX_PPR(r13); /* Read PPR from paca */ \ 123 std rb,TASKTHREADPPR(ra); \ 124 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940) 125 126 #define RESTORE_PPR_PACA(area, ra) \ 127 BEGIN_FTR_SECTION_NESTED(941) \ 128 ld ra,area+EX_PPR(r13); \ 129 mtspr SPRN_PPR,ra; \ 130 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941) 131 132 /* 133 * Increase the priority on systems where PPR save/restore is not 134 * implemented/ supported. 135 */ 136 #define HMT_MEDIUM_PPR_DISCARD \ 137 BEGIN_FTR_SECTION_NESTED(942) \ 138 HMT_MEDIUM; \ 139 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,0,942) /*non P7*/ 140 141 /* 142 * Get an SPR into a register if the CPU has the given feature 143 */ 144 #define OPT_GET_SPR(ra, spr, ftr) \ 145 BEGIN_FTR_SECTION_NESTED(943) \ 146 mfspr ra,spr; \ 147 END_FTR_SECTION_NESTED(ftr,ftr,943) 148 149 /* 150 * Save a register to the PACA if the CPU has the given feature 151 */ 152 #define OPT_SAVE_REG_TO_PACA(offset, ra, ftr) \ 153 BEGIN_FTR_SECTION_NESTED(943) \ 154 std ra,offset(r13); \ 155 END_FTR_SECTION_NESTED(ftr,ftr,943) 156 157 #define EXCEPTION_PROLOG_0(area) \ 158 GET_PACA(r13); \ 159 std r9,area+EX_R9(r13); /* save r9 */ \ 160 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \ 161 HMT_MEDIUM; \ 162 std r10,area+EX_R10(r13); /* save r10 - r12 */ \ 163 OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR) 164 165 #define __EXCEPTION_PROLOG_1(area, extra, vec) \ 166 OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \ 167 OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \ 168 SAVE_CTR(r10, area); \ 169 mfcr r9; \ 170 extra(vec); \ 171 std r11,area+EX_R11(r13); \ 172 std r12,area+EX_R12(r13); \ 173 GET_SCRATCH0(r10); \ 174 std r10,area+EX_R13(r13) 175 #define EXCEPTION_PROLOG_1(area, extra, vec) \ 176 __EXCEPTION_PROLOG_1(area, extra, vec) 177 178 #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \ 179 ld r12,PACAKBASE(r13); /* get high part of &label */ \ 180 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 181 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 182 LOAD_HANDLER(r12,label) \ 183 mtspr SPRN_##h##SRR0,r12; \ 184 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 185 mtspr SPRN_##h##SRR1,r10; \ 186 h##rfid; \ 187 b . /* prevent speculative execution */ 188 #define EXCEPTION_PROLOG_PSERIES_1(label, h) \ 189 __EXCEPTION_PROLOG_PSERIES_1(label, h) 190 191 #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \ 192 EXCEPTION_PROLOG_0(area); \ 193 EXCEPTION_PROLOG_1(area, extra, vec); \ 194 EXCEPTION_PROLOG_PSERIES_1(label, h); 195 196 #define __KVMTEST(n) \ 197 lbz r10,HSTATE_IN_GUEST(r13); \ 198 cmpwi r10,0; \ 199 bne do_kvm_##n 200 201 #define __KVM_HANDLER(area, h, n) \ 202 do_kvm_##n: \ 203 BEGIN_FTR_SECTION_NESTED(947) \ 204 ld r10,area+EX_CFAR(r13); \ 205 std r10,HSTATE_CFAR(r13); \ 206 END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947); \ 207 ld r10,area+EX_R10(r13); \ 208 stw r9,HSTATE_SCRATCH1(r13); \ 209 ld r9,area+EX_R9(r13); \ 210 std r12,HSTATE_SCRATCH0(r13); \ 211 li r12,n; \ 212 b kvmppc_interrupt 213 214 #define __KVM_HANDLER_SKIP(area, h, n) \ 215 do_kvm_##n: \ 216 cmpwi r10,KVM_GUEST_MODE_SKIP; \ 217 ld r10,area+EX_R10(r13); \ 218 beq 89f; \ 219 stw r9,HSTATE_SCRATCH1(r13); \ 220 ld r9,area+EX_R9(r13); \ 221 std r12,HSTATE_SCRATCH0(r13); \ 222 li r12,n; \ 223 b kvmppc_interrupt; \ 224 89: mtocrf 0x80,r9; \ 225 ld r9,area+EX_R9(r13); \ 226 b kvmppc_skip_##h##interrupt 227 228 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER 229 #define KVMTEST(n) __KVMTEST(n) 230 #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n) 231 #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n) 232 233 #else 234 #define KVMTEST(n) 235 #define KVM_HANDLER(area, h, n) 236 #define KVM_HANDLER_SKIP(area, h, n) 237 #endif 238 239 #ifdef CONFIG_KVM_BOOK3S_PR 240 #define KVMTEST_PR(n) __KVMTEST(n) 241 #define KVM_HANDLER_PR(area, h, n) __KVM_HANDLER(area, h, n) 242 #define KVM_HANDLER_PR_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n) 243 244 #else 245 #define KVMTEST_PR(n) 246 #define KVM_HANDLER_PR(area, h, n) 247 #define KVM_HANDLER_PR_SKIP(area, h, n) 248 #endif 249 250 #define NOTEST(n) 251 252 /* 253 * The common exception prolog is used for all except a few exceptions 254 * such as a segment miss on a kernel address. We have to be prepared 255 * to take another exception from the point where we first touch the 256 * kernel stack onwards. 257 * 258 * On entry r13 points to the paca, r9-r13 are saved in the paca, 259 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and 260 * SRR1, and relocation is on. 261 */ 262 #define EXCEPTION_PROLOG_COMMON(n, area) \ 263 andi. r10,r12,MSR_PR; /* See if coming from user */ \ 264 mr r10,r1; /* Save r1 */ \ 265 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \ 266 beq- 1f; \ 267 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \ 268 1: cmpdi cr1,r1,0; /* check if r1 is in userspace */ \ 269 blt+ cr1,3f; /* abort if it is */ \ 270 li r1,(n); /* will be reloaded later */ \ 271 sth r1,PACA_TRAP_SAVE(r13); \ 272 std r3,area+EX_R3(r13); \ 273 addi r3,r13,area; /* r3 -> where regs are saved*/ \ 274 RESTORE_CTR(r1, area); \ 275 b bad_stack; \ 276 3: std r9,_CCR(r1); /* save CR in stackframe */ \ 277 std r11,_NIP(r1); /* save SRR0 in stackframe */ \ 278 std r12,_MSR(r1); /* save SRR1 in stackframe */ \ 279 std r10,0(r1); /* make stack chain pointer */ \ 280 std r0,GPR0(r1); /* save r0 in stackframe */ \ 281 std r10,GPR1(r1); /* save r1 in stackframe */ \ 282 beq 4f; /* if from kernel mode */ \ 283 ACCOUNT_CPU_USER_ENTRY(r9, r10); \ 284 SAVE_PPR(area, r9, r10); \ 285 4: std r2,GPR2(r1); /* save r2 in stackframe */ \ 286 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \ 287 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \ 288 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \ 289 ld r10,area+EX_R10(r13); \ 290 std r9,GPR9(r1); \ 291 std r10,GPR10(r1); \ 292 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \ 293 ld r10,area+EX_R12(r13); \ 294 ld r11,area+EX_R13(r13); \ 295 std r9,GPR11(r1); \ 296 std r10,GPR12(r1); \ 297 std r11,GPR13(r1); \ 298 BEGIN_FTR_SECTION_NESTED(66); \ 299 ld r10,area+EX_CFAR(r13); \ 300 std r10,ORIG_GPR3(r1); \ 301 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \ 302 mflr r9; /* Get LR, later save to stack */ \ 303 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \ 304 std r9,_LINK(r1); \ 305 GET_CTR(r10, area); \ 306 std r10,_CTR(r1); \ 307 lbz r10,PACASOFTIRQEN(r13); \ 308 mfspr r11,SPRN_XER; /* save XER in stackframe */ \ 309 std r10,SOFTE(r1); \ 310 std r11,_XER(r1); \ 311 li r9,(n)+1; \ 312 std r9,_TRAP(r1); /* set trap number */ \ 313 li r10,0; \ 314 ld r11,exception_marker@toc(r2); \ 315 std r10,RESULT(r1); /* clear regs->result */ \ 316 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ \ 317 ACCOUNT_STOLEN_TIME 318 319 /* 320 * Exception vectors. 321 */ 322 #define STD_EXCEPTION_PSERIES(loc, vec, label) \ 323 . = loc; \ 324 .globl label##_pSeries; \ 325 label##_pSeries: \ 326 HMT_MEDIUM_PPR_DISCARD; \ 327 SET_SCRATCH0(r13); /* save r13 */ \ 328 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 329 EXC_STD, KVMTEST_PR, vec) 330 331 /* Version of above for when we have to branch out-of-line */ 332 #define STD_EXCEPTION_PSERIES_OOL(vec, label) \ 333 .globl label##_pSeries; \ 334 label##_pSeries: \ 335 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \ 336 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_STD) 337 338 #define STD_EXCEPTION_HV(loc, vec, label) \ 339 . = loc; \ 340 .globl label##_hv; \ 341 label##_hv: \ 342 HMT_MEDIUM_PPR_DISCARD; \ 343 SET_SCRATCH0(r13); /* save r13 */ \ 344 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 345 EXC_HV, KVMTEST, vec) 346 347 /* Version of above for when we have to branch out-of-line */ 348 #define STD_EXCEPTION_HV_OOL(vec, label) \ 349 .globl label##_hv; \ 350 label##_hv: \ 351 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST, vec); \ 352 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV) 353 354 #define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 355 . = loc; \ 356 .globl label##_relon_pSeries; \ 357 label##_relon_pSeries: \ 358 HMT_MEDIUM_PPR_DISCARD; \ 359 /* No guest interrupts come through here */ \ 360 SET_SCRATCH0(r13); /* save r13 */ \ 361 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 362 EXC_STD, NOTEST, vec) 363 364 #define STD_RELON_EXCEPTION_PSERIES_OOL(vec, label) \ 365 .globl label##_relon_pSeries; \ 366 label##_relon_pSeries: \ 367 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \ 368 EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, EXC_STD) 369 370 #define STD_RELON_EXCEPTION_HV(loc, vec, label) \ 371 . = loc; \ 372 .globl label##_relon_hv; \ 373 label##_relon_hv: \ 374 HMT_MEDIUM_PPR_DISCARD; \ 375 /* No guest interrupts come through here */ \ 376 SET_SCRATCH0(r13); /* save r13 */ \ 377 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 378 EXC_HV, NOTEST, vec) 379 380 #define STD_RELON_EXCEPTION_HV_OOL(vec, label) \ 381 .globl label##_relon_hv; \ 382 label##_relon_hv: \ 383 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \ 384 EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, EXC_HV) 385 386 /* This associate vector numbers with bits in paca->irq_happened */ 387 #define SOFTEN_VALUE_0x500 PACA_IRQ_EE 388 #define SOFTEN_VALUE_0x502 PACA_IRQ_EE 389 #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC 390 #define SOFTEN_VALUE_0x982 PACA_IRQ_DEC 391 #define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL 392 #define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL 393 #define SOFTEN_VALUE_0xe82 PACA_IRQ_DBELL 394 395 #define __SOFTEN_TEST(h, vec) \ 396 lbz r10,PACASOFTIRQEN(r13); \ 397 cmpwi r10,0; \ 398 li r10,SOFTEN_VALUE_##vec; \ 399 beq masked_##h##interrupt 400 #define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec) 401 402 #define SOFTEN_TEST_PR(vec) \ 403 KVMTEST_PR(vec); \ 404 _SOFTEN_TEST(EXC_STD, vec) 405 406 #define SOFTEN_TEST_HV(vec) \ 407 KVMTEST(vec); \ 408 _SOFTEN_TEST(EXC_HV, vec) 409 410 #define SOFTEN_TEST_HV_201(vec) \ 411 KVMTEST(vec); \ 412 _SOFTEN_TEST(EXC_STD, vec) 413 414 #define SOFTEN_NOTEST_PR(vec) _SOFTEN_TEST(EXC_STD, vec) 415 #define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec) 416 417 #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 418 SET_SCRATCH0(r13); /* save r13 */ \ 419 EXCEPTION_PROLOG_0(PACA_EXGEN); \ 420 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 421 EXCEPTION_PROLOG_PSERIES_1(label##_common, h); 422 423 #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 424 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) 425 426 #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \ 427 . = loc; \ 428 .globl label##_pSeries; \ 429 label##_pSeries: \ 430 HMT_MEDIUM_PPR_DISCARD; \ 431 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 432 EXC_STD, SOFTEN_TEST_PR) 433 434 #define MASKABLE_EXCEPTION_HV(loc, vec, label) \ 435 . = loc; \ 436 .globl label##_hv; \ 437 label##_hv: \ 438 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 439 EXC_HV, SOFTEN_TEST_HV) 440 441 #define MASKABLE_EXCEPTION_HV_OOL(vec, label) \ 442 .globl label##_hv; \ 443 label##_hv: \ 444 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \ 445 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV); 446 447 #define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 448 HMT_MEDIUM_PPR_DISCARD; \ 449 SET_SCRATCH0(r13); /* save r13 */ \ 450 EXCEPTION_PROLOG_0(PACA_EXGEN); \ 451 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 452 EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, h); 453 #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 454 __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) 455 456 #define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 457 . = loc; \ 458 .globl label##_relon_pSeries; \ 459 label##_relon_pSeries: \ 460 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 461 EXC_STD, SOFTEN_NOTEST_PR) 462 463 #define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label) \ 464 . = loc; \ 465 .globl label##_relon_hv; \ 466 label##_relon_hv: \ 467 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 468 EXC_HV, SOFTEN_NOTEST_HV) 469 470 #define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label) \ 471 .globl label##_relon_hv; \ 472 label##_relon_hv: \ 473 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_NOTEST_HV, vec); \ 474 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV); 475 476 /* 477 * Our exception common code can be passed various "additions" 478 * to specify the behaviour of interrupts, whether to kick the 479 * runlatch, etc... 480 */ 481 482 /* Exception addition: Hard disable interrupts */ 483 #define DISABLE_INTS RECONCILE_IRQ_STATE(r10,r11) 484 485 #define ADD_NVGPRS \ 486 bl .save_nvgprs 487 488 #define RUNLATCH_ON \ 489 BEGIN_FTR_SECTION \ 490 CURRENT_THREAD_INFO(r3, r1); \ 491 ld r4,TI_LOCAL_FLAGS(r3); \ 492 andi. r0,r4,_TLF_RUNLATCH; \ 493 beql ppc64_runlatch_on_trampoline; \ 494 END_FTR_SECTION_IFSET(CPU_FTR_CTRL) 495 496 #define EXCEPTION_COMMON(trap, label, hdlr, ret, additions) \ 497 .align 7; \ 498 .globl label##_common; \ 499 label##_common: \ 500 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \ 501 additions; \ 502 addi r3,r1,STACK_FRAME_OVERHEAD; \ 503 bl hdlr; \ 504 b ret 505 506 #define STD_EXCEPTION_COMMON(trap, label, hdlr) \ 507 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except, \ 508 ADD_NVGPRS;DISABLE_INTS) 509 510 /* 511 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur 512 * in the idle task and therefore need the special idle handling 513 * (finish nap and runlatch) 514 */ 515 #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \ 516 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except_lite, \ 517 FINISH_NAP;DISABLE_INTS;RUNLATCH_ON) 518 519 /* 520 * When the idle code in power4_idle puts the CPU into NAP mode, 521 * it has to do so in a loop, and relies on the external interrupt 522 * and decrementer interrupt entry code to get it out of the loop. 523 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags 524 * to signal that it is in the loop and needs help to get out. 525 */ 526 #ifdef CONFIG_PPC_970_NAP 527 #define FINISH_NAP \ 528 BEGIN_FTR_SECTION \ 529 CURRENT_THREAD_INFO(r11, r1); \ 530 ld r9,TI_LOCAL_FLAGS(r11); \ 531 andi. r10,r9,_TLF_NAPPING; \ 532 bnel power4_fixup_nap; \ 533 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) 534 #else 535 #define FINISH_NAP 536 #endif 537 538 #endif /* _ASM_POWERPC_EXCEPTION_H */ 539