1 #ifndef _ASM_POWERPC_EXCEPTION_H 2 #define _ASM_POWERPC_EXCEPTION_H 3 /* 4 * Extracted from head_64.S 5 * 6 * PowerPC version 7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 8 * 9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP 10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> 11 * Adapted for Power Macintosh by Paul Mackerras. 12 * Low-level exception handlers and MMU support 13 * rewritten by Paul Mackerras. 14 * Copyright (C) 1996 Paul Mackerras. 15 * 16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and 17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com 18 * 19 * This file contains the low-level support and setup for the 20 * PowerPC-64 platform, including trap and interrupt dispatch. 21 * 22 * This program is free software; you can redistribute it and/or 23 * modify it under the terms of the GNU General Public License 24 * as published by the Free Software Foundation; either version 25 * 2 of the License, or (at your option) any later version. 26 */ 27 /* 28 * The following macros define the code that appears as 29 * the prologue to each of the exception handlers. They 30 * are split into two parts to allow a single kernel binary 31 * to be used for pSeries and iSeries. 32 * 33 * We make as much of the exception code common between native 34 * exception handlers (including pSeries LPAR) and iSeries LPAR 35 * implementations as possible. 36 */ 37 #include <asm/head-64.h> 38 39 #define EX_R9 0 40 #define EX_R10 8 41 #define EX_R11 16 42 #define EX_R12 24 43 #define EX_R13 32 44 #define EX_SRR0 40 45 #define EX_DAR 48 46 #define EX_DSISR 56 47 #define EX_CCR 60 48 #define EX_R3 64 49 #define EX_LR 72 50 #define EX_CFAR 80 51 #define EX_PPR 88 /* SMT thread status register (priority) */ 52 #define EX_CTR 96 53 54 #ifdef CONFIG_RELOCATABLE 55 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 56 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 57 LOAD_HANDLER(r12,label); \ 58 mtctr r12; \ 59 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 60 li r10,MSR_RI; \ 61 mtmsrd r10,1; /* Set RI (EE=0) */ \ 62 bctr; 63 #else 64 /* If not relocatable, we can jump directly -- and save messing with LR */ 65 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 66 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 67 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 68 li r10,MSR_RI; \ 69 mtmsrd r10,1; /* Set RI (EE=0) */ \ 70 b label; 71 #endif 72 #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 73 __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 74 75 /* 76 * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on 77 * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which 78 * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr. 79 */ 80 #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \ 81 EXCEPTION_PROLOG_0(area); \ 82 EXCEPTION_PROLOG_1(area, extra, vec); \ 83 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 84 85 /* 86 * We're short on space and time in the exception prolog, so we can't 87 * use the normal LOAD_REG_IMMEDIATE macro to load the address of label. 88 * Instead we get the base of the kernel from paca->kernelbase and or in the low 89 * part of label. This requires that the label be within 64KB of kernelbase, and 90 * that kernelbase be 64K aligned. 91 */ 92 #define LOAD_HANDLER(reg, label) \ 93 ld reg,PACAKBASE(r13); /* get high part of &label */ \ 94 ori reg,reg,FIXED_SYMBOL_ABS_ADDR(label); 95 96 #define __LOAD_HANDLER(reg, label) \ 97 ld reg,PACAKBASE(r13); \ 98 ori reg,reg,(ABS_ADDR(label))@l; 99 100 /* 101 * Branches from unrelocated code (e.g., interrupts) to labels outside 102 * head-y require >64K offsets. 103 */ 104 #define __LOAD_FAR_HANDLER(reg, label) \ 105 ld reg,PACAKBASE(r13); \ 106 ori reg,reg,(ABS_ADDR(label))@l; \ 107 addis reg,reg,(ABS_ADDR(label))@h; 108 109 /* Exception register prefixes */ 110 #define EXC_HV H 111 #define EXC_STD 112 113 #if defined(CONFIG_RELOCATABLE) 114 /* 115 * If we support interrupts with relocation on AND we're a relocatable kernel, 116 * we need to use CTR to get to the 2nd level handler. So, save/restore it 117 * when required. 118 */ 119 #define SAVE_CTR(reg, area) mfctr reg ; std reg,area+EX_CTR(r13) 120 #define GET_CTR(reg, area) ld reg,area+EX_CTR(r13) 121 #define RESTORE_CTR(reg, area) ld reg,area+EX_CTR(r13) ; mtctr reg 122 #else 123 /* ...else CTR is unused and in register. */ 124 #define SAVE_CTR(reg, area) 125 #define GET_CTR(reg, area) mfctr reg 126 #define RESTORE_CTR(reg, area) 127 #endif 128 129 /* 130 * PPR save/restore macros used in exceptions_64s.S 131 * Used for P7 or later processors 132 */ 133 #define SAVE_PPR(area, ra, rb) \ 134 BEGIN_FTR_SECTION_NESTED(940) \ 135 ld ra,PACACURRENT(r13); \ 136 ld rb,area+EX_PPR(r13); /* Read PPR from paca */ \ 137 std rb,TASKTHREADPPR(ra); \ 138 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940) 139 140 #define RESTORE_PPR_PACA(area, ra) \ 141 BEGIN_FTR_SECTION_NESTED(941) \ 142 ld ra,area+EX_PPR(r13); \ 143 mtspr SPRN_PPR,ra; \ 144 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941) 145 146 /* 147 * Get an SPR into a register if the CPU has the given feature 148 */ 149 #define OPT_GET_SPR(ra, spr, ftr) \ 150 BEGIN_FTR_SECTION_NESTED(943) \ 151 mfspr ra,spr; \ 152 END_FTR_SECTION_NESTED(ftr,ftr,943) 153 154 /* 155 * Set an SPR from a register if the CPU has the given feature 156 */ 157 #define OPT_SET_SPR(ra, spr, ftr) \ 158 BEGIN_FTR_SECTION_NESTED(943) \ 159 mtspr spr,ra; \ 160 END_FTR_SECTION_NESTED(ftr,ftr,943) 161 162 /* 163 * Save a register to the PACA if the CPU has the given feature 164 */ 165 #define OPT_SAVE_REG_TO_PACA(offset, ra, ftr) \ 166 BEGIN_FTR_SECTION_NESTED(943) \ 167 std ra,offset(r13); \ 168 END_FTR_SECTION_NESTED(ftr,ftr,943) 169 170 #define EXCEPTION_PROLOG_0(area) \ 171 GET_PACA(r13); \ 172 std r9,area+EX_R9(r13); /* save r9 */ \ 173 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \ 174 HMT_MEDIUM; \ 175 std r10,area+EX_R10(r13); /* save r10 - r12 */ \ 176 OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR) 177 178 #define __EXCEPTION_PROLOG_1(area, extra, vec) \ 179 OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \ 180 OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \ 181 SAVE_CTR(r10, area); \ 182 mfcr r9; \ 183 extra(vec); \ 184 std r11,area+EX_R11(r13); \ 185 std r12,area+EX_R12(r13); \ 186 GET_SCRATCH0(r10); \ 187 std r10,area+EX_R13(r13) 188 #define EXCEPTION_PROLOG_1(area, extra, vec) \ 189 __EXCEPTION_PROLOG_1(area, extra, vec) 190 191 #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \ 192 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 193 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 194 LOAD_HANDLER(r12,label) \ 195 mtspr SPRN_##h##SRR0,r12; \ 196 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 197 mtspr SPRN_##h##SRR1,r10; \ 198 h##rfid; \ 199 b . /* prevent speculative execution */ 200 #define EXCEPTION_PROLOG_PSERIES_1(label, h) \ 201 __EXCEPTION_PROLOG_PSERIES_1(label, h) 202 203 /* _NORI variant keeps MSR_RI clear */ 204 #define __EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) \ 205 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 206 xori r10,r10,MSR_RI; /* Clear MSR_RI */ \ 207 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 208 LOAD_HANDLER(r12,label) \ 209 mtspr SPRN_##h##SRR0,r12; \ 210 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 211 mtspr SPRN_##h##SRR1,r10; \ 212 h##rfid; \ 213 b . /* prevent speculative execution */ 214 215 #define EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) \ 216 __EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) 217 218 #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \ 219 EXCEPTION_PROLOG_0(area); \ 220 EXCEPTION_PROLOG_1(area, extra, vec); \ 221 EXCEPTION_PROLOG_PSERIES_1(label, h); 222 223 #define __KVMTEST(h, n) \ 224 lbz r10,HSTATE_IN_GUEST(r13); \ 225 cmpwi r10,0; \ 226 bne do_kvm_##h##n 227 228 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 229 /* 230 * If hv is possible, interrupts come into to the hv version 231 * of the kvmppc_interrupt code, which then jumps to the PR handler, 232 * kvmppc_interrupt_pr, if the guest is a PR guest. 233 */ 234 #define kvmppc_interrupt kvmppc_interrupt_hv 235 #else 236 #define kvmppc_interrupt kvmppc_interrupt_pr 237 #endif 238 239 /* 240 * Branch to label using its 0xC000 address. This results in instruction 241 * address suitable for MSR[IR]=0 or 1, which allows relocation to be turned 242 * on using mtmsr rather than rfid. 243 * 244 * This could set the 0xc bits for !RELOCATABLE as an immediate, rather than 245 * load KBASE for a slight optimisation. 246 */ 247 #define BRANCH_TO_C000(reg, label) \ 248 __LOAD_HANDLER(reg, label); \ 249 mtctr reg; \ 250 bctr 251 252 #ifdef CONFIG_RELOCATABLE 253 #define BRANCH_TO_COMMON(reg, label) \ 254 __LOAD_HANDLER(reg, label); \ 255 mtctr reg; \ 256 bctr 257 258 #define BRANCH_LINK_TO_FAR(label) \ 259 __LOAD_FAR_HANDLER(r12, label); \ 260 mtctr r12; \ 261 bctrl 262 263 /* 264 * KVM requires __LOAD_FAR_HANDLER. 265 * 266 * __BRANCH_TO_KVM_EXIT branches are also a special case because they 267 * explicitly use r9 then reload it from PACA before branching. Hence 268 * the double-underscore. 269 */ 270 #define __BRANCH_TO_KVM_EXIT(area, label) \ 271 mfctr r9; \ 272 std r9,HSTATE_SCRATCH1(r13); \ 273 __LOAD_FAR_HANDLER(r9, label); \ 274 mtctr r9; \ 275 ld r9,area+EX_R9(r13); \ 276 bctr 277 278 #else 279 #define BRANCH_TO_COMMON(reg, label) \ 280 b label 281 282 #define BRANCH_LINK_TO_FAR(label) \ 283 bl label 284 285 #define __BRANCH_TO_KVM_EXIT(area, label) \ 286 ld r9,area+EX_R9(r13); \ 287 b label 288 289 #endif 290 291 /* Do not enable RI */ 292 #define EXCEPTION_PROLOG_PSERIES_NORI(area, label, h, extra, vec) \ 293 EXCEPTION_PROLOG_0(area); \ 294 EXCEPTION_PROLOG_1(area, extra, vec); \ 295 EXCEPTION_PROLOG_PSERIES_1_NORI(label, h); 296 297 298 #define __KVM_HANDLER(area, h, n) \ 299 BEGIN_FTR_SECTION_NESTED(947) \ 300 ld r10,area+EX_CFAR(r13); \ 301 std r10,HSTATE_CFAR(r13); \ 302 END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947); \ 303 BEGIN_FTR_SECTION_NESTED(948) \ 304 ld r10,area+EX_PPR(r13); \ 305 std r10,HSTATE_PPR(r13); \ 306 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 307 ld r10,area+EX_R10(r13); \ 308 std r12,HSTATE_SCRATCH0(r13); \ 309 sldi r12,r9,32; \ 310 ori r12,r12,(n); \ 311 /* This reloads r9 before branching to kvmppc_interrupt */ \ 312 __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt) 313 314 #define __KVM_HANDLER_SKIP(area, h, n) \ 315 cmpwi r10,KVM_GUEST_MODE_SKIP; \ 316 beq 89f; \ 317 BEGIN_FTR_SECTION_NESTED(948) \ 318 ld r10,area+EX_PPR(r13); \ 319 std r10,HSTATE_PPR(r13); \ 320 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 321 ld r10,area+EX_R10(r13); \ 322 std r12,HSTATE_SCRATCH0(r13); \ 323 sldi r12,r9,32; \ 324 ori r12,r12,(n); \ 325 /* This reloads r9 before branching to kvmppc_interrupt */ \ 326 __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt); \ 327 89: mtocrf 0x80,r9; \ 328 ld r9,area+EX_R9(r13); \ 329 ld r10,area+EX_R10(r13); \ 330 b kvmppc_skip_##h##interrupt 331 332 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER 333 #define KVMTEST(h, n) __KVMTEST(h, n) 334 #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n) 335 #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n) 336 337 #else 338 #define KVMTEST(h, n) 339 #define KVM_HANDLER(area, h, n) 340 #define KVM_HANDLER_SKIP(area, h, n) 341 #endif 342 343 #define NOTEST(n) 344 345 #define EXCEPTION_PROLOG_COMMON_1() \ 346 std r9,_CCR(r1); /* save CR in stackframe */ \ 347 std r11,_NIP(r1); /* save SRR0 in stackframe */ \ 348 std r12,_MSR(r1); /* save SRR1 in stackframe */ \ 349 std r10,0(r1); /* make stack chain pointer */ \ 350 std r0,GPR0(r1); /* save r0 in stackframe */ \ 351 std r10,GPR1(r1); /* save r1 in stackframe */ \ 352 353 354 /* 355 * The common exception prolog is used for all except a few exceptions 356 * such as a segment miss on a kernel address. We have to be prepared 357 * to take another exception from the point where we first touch the 358 * kernel stack onwards. 359 * 360 * On entry r13 points to the paca, r9-r13 are saved in the paca, 361 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and 362 * SRR1, and relocation is on. 363 */ 364 #define EXCEPTION_PROLOG_COMMON(n, area) \ 365 andi. r10,r12,MSR_PR; /* See if coming from user */ \ 366 mr r10,r1; /* Save r1 */ \ 367 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \ 368 beq- 1f; \ 369 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \ 370 1: cmpdi cr1,r1,-INT_FRAME_SIZE; /* check if r1 is in userspace */ \ 371 blt+ cr1,3f; /* abort if it is */ \ 372 li r1,(n); /* will be reloaded later */ \ 373 sth r1,PACA_TRAP_SAVE(r13); \ 374 std r3,area+EX_R3(r13); \ 375 addi r3,r13,area; /* r3 -> where regs are saved*/ \ 376 RESTORE_CTR(r1, area); \ 377 b bad_stack; \ 378 3: EXCEPTION_PROLOG_COMMON_1(); \ 379 beq 4f; /* if from kernel mode */ \ 380 ACCOUNT_CPU_USER_ENTRY(r13, r9, r10); \ 381 SAVE_PPR(area, r9, r10); \ 382 4: EXCEPTION_PROLOG_COMMON_2(area) \ 383 EXCEPTION_PROLOG_COMMON_3(n) \ 384 ACCOUNT_STOLEN_TIME 385 386 /* Save original regs values from save area to stack frame. */ 387 #define EXCEPTION_PROLOG_COMMON_2(area) \ 388 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \ 389 ld r10,area+EX_R10(r13); \ 390 std r9,GPR9(r1); \ 391 std r10,GPR10(r1); \ 392 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \ 393 ld r10,area+EX_R12(r13); \ 394 ld r11,area+EX_R13(r13); \ 395 std r9,GPR11(r1); \ 396 std r10,GPR12(r1); \ 397 std r11,GPR13(r1); \ 398 BEGIN_FTR_SECTION_NESTED(66); \ 399 ld r10,area+EX_CFAR(r13); \ 400 std r10,ORIG_GPR3(r1); \ 401 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \ 402 GET_CTR(r10, area); \ 403 std r10,_CTR(r1); 404 405 #define EXCEPTION_PROLOG_COMMON_3(n) \ 406 std r2,GPR2(r1); /* save r2 in stackframe */ \ 407 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \ 408 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \ 409 mflr r9; /* Get LR, later save to stack */ \ 410 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \ 411 std r9,_LINK(r1); \ 412 lbz r10,PACASOFTIRQEN(r13); \ 413 mfspr r11,SPRN_XER; /* save XER in stackframe */ \ 414 std r10,SOFTE(r1); \ 415 std r11,_XER(r1); \ 416 li r9,(n)+1; \ 417 std r9,_TRAP(r1); /* set trap number */ \ 418 li r10,0; \ 419 ld r11,exception_marker@toc(r2); \ 420 std r10,RESULT(r1); /* clear regs->result */ \ 421 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ 422 423 /* 424 * Exception vectors. 425 */ 426 #define STD_EXCEPTION_PSERIES(vec, label) \ 427 SET_SCRATCH0(r13); /* save r13 */ \ 428 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \ 429 EXC_STD, KVMTEST_PR, vec); \ 430 431 /* Version of above for when we have to branch out-of-line */ 432 #define __OOL_EXCEPTION(vec, label, hdlr) \ 433 SET_SCRATCH0(r13) \ 434 EXCEPTION_PROLOG_0(PACA_EXGEN) \ 435 b hdlr; 436 437 #define STD_EXCEPTION_PSERIES_OOL(vec, label) \ 438 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \ 439 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD) 440 441 #define STD_EXCEPTION_HV(loc, vec, label) \ 442 SET_SCRATCH0(r13); /* save r13 */ \ 443 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \ 444 EXC_HV, KVMTEST_HV, vec); 445 446 #define STD_EXCEPTION_HV_OOL(vec, label) \ 447 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \ 448 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) 449 450 #define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 451 /* No guest interrupts come through here */ \ 452 SET_SCRATCH0(r13); /* save r13 */ \ 453 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, EXC_STD, NOTEST, vec); 454 455 #define STD_RELON_EXCEPTION_PSERIES_OOL(vec, label) \ 456 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \ 457 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_STD) 458 459 #define STD_RELON_EXCEPTION_HV(loc, vec, label) \ 460 SET_SCRATCH0(r13); /* save r13 */ \ 461 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, \ 462 EXC_HV, KVMTEST_HV, vec); 463 464 #define STD_RELON_EXCEPTION_HV_OOL(vec, label) \ 465 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \ 466 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV) 467 468 /* This associate vector numbers with bits in paca->irq_happened */ 469 #define SOFTEN_VALUE_0x500 PACA_IRQ_EE 470 #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC 471 #define SOFTEN_VALUE_0x980 PACA_IRQ_DEC 472 #define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL 473 #define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL 474 #define SOFTEN_VALUE_0xe60 PACA_IRQ_HMI 475 #define SOFTEN_VALUE_0xea0 PACA_IRQ_EE 476 477 #define __SOFTEN_TEST(h, vec) \ 478 lbz r10,PACASOFTIRQEN(r13); \ 479 cmpwi r10,0; \ 480 li r10,SOFTEN_VALUE_##vec; \ 481 beq masked_##h##interrupt 482 483 #define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec) 484 485 #define SOFTEN_TEST_PR(vec) \ 486 KVMTEST(EXC_STD, vec); \ 487 _SOFTEN_TEST(EXC_STD, vec) 488 489 #define SOFTEN_TEST_HV(vec) \ 490 KVMTEST(EXC_HV, vec); \ 491 _SOFTEN_TEST(EXC_HV, vec) 492 493 #define KVMTEST_PR(vec) \ 494 KVMTEST(EXC_STD, vec) 495 496 #define KVMTEST_HV(vec) \ 497 KVMTEST(EXC_HV, vec) 498 499 #define SOFTEN_NOTEST_PR(vec) _SOFTEN_TEST(EXC_STD, vec) 500 #define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec) 501 502 #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 503 SET_SCRATCH0(r13); /* save r13 */ \ 504 EXCEPTION_PROLOG_0(PACA_EXGEN); \ 505 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 506 EXCEPTION_PROLOG_PSERIES_1(label, h); 507 508 #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 509 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) 510 511 #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \ 512 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 513 EXC_STD, SOFTEN_TEST_PR) 514 515 #define MASKABLE_EXCEPTION_PSERIES_OOL(vec, label) \ 516 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, vec); \ 517 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD) 518 519 #define MASKABLE_EXCEPTION_HV(loc, vec, label) \ 520 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 521 EXC_HV, SOFTEN_TEST_HV) 522 523 #define MASKABLE_EXCEPTION_HV_OOL(vec, label) \ 524 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \ 525 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) 526 527 #define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 528 SET_SCRATCH0(r13); /* save r13 */ \ 529 EXCEPTION_PROLOG_0(PACA_EXGEN); \ 530 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 531 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 532 533 #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 534 __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) 535 536 #define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 537 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 538 EXC_STD, SOFTEN_NOTEST_PR) 539 540 #define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label) \ 541 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 542 EXC_HV, SOFTEN_TEST_HV) 543 544 #define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label) \ 545 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \ 546 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV) 547 548 /* 549 * Our exception common code can be passed various "additions" 550 * to specify the behaviour of interrupts, whether to kick the 551 * runlatch, etc... 552 */ 553 554 /* 555 * This addition reconciles our actual IRQ state with the various software 556 * flags that track it. This may call C code. 557 */ 558 #define ADD_RECONCILE RECONCILE_IRQ_STATE(r10,r11) 559 560 #define ADD_NVGPRS \ 561 bl save_nvgprs 562 563 #define RUNLATCH_ON \ 564 BEGIN_FTR_SECTION \ 565 CURRENT_THREAD_INFO(r3, r1); \ 566 ld r4,TI_LOCAL_FLAGS(r3); \ 567 andi. r0,r4,_TLF_RUNLATCH; \ 568 beql ppc64_runlatch_on_trampoline; \ 569 END_FTR_SECTION_IFSET(CPU_FTR_CTRL) 570 571 #define EXCEPTION_COMMON(area, trap, label, hdlr, ret, additions) \ 572 EXCEPTION_PROLOG_COMMON(trap, area); \ 573 /* Volatile regs are potentially clobbered here */ \ 574 additions; \ 575 addi r3,r1,STACK_FRAME_OVERHEAD; \ 576 bl hdlr; \ 577 b ret 578 579 /* 580 * Exception where stack is already set in r1, r1 is saved in r10, and it 581 * continues rather than returns. 582 */ 583 #define EXCEPTION_COMMON_NORET_STACK(area, trap, label, hdlr, additions) \ 584 EXCEPTION_PROLOG_COMMON_1(); \ 585 EXCEPTION_PROLOG_COMMON_2(area); \ 586 EXCEPTION_PROLOG_COMMON_3(trap); \ 587 /* Volatile regs are potentially clobbered here */ \ 588 additions; \ 589 addi r3,r1,STACK_FRAME_OVERHEAD; \ 590 bl hdlr 591 592 #define STD_EXCEPTION_COMMON(trap, label, hdlr) \ 593 EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr, \ 594 ret_from_except, ADD_NVGPRS;ADD_RECONCILE) 595 596 /* 597 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur 598 * in the idle task and therefore need the special idle handling 599 * (finish nap and runlatch) 600 */ 601 #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \ 602 EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr, \ 603 ret_from_except_lite, FINISH_NAP;ADD_RECONCILE;RUNLATCH_ON) 604 605 /* 606 * When the idle code in power4_idle puts the CPU into NAP mode, 607 * it has to do so in a loop, and relies on the external interrupt 608 * and decrementer interrupt entry code to get it out of the loop. 609 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags 610 * to signal that it is in the loop and needs help to get out. 611 */ 612 #ifdef CONFIG_PPC_970_NAP 613 #define FINISH_NAP \ 614 BEGIN_FTR_SECTION \ 615 CURRENT_THREAD_INFO(r11, r1); \ 616 ld r9,TI_LOCAL_FLAGS(r11); \ 617 andi. r10,r9,_TLF_NAPPING; \ 618 bnel power4_fixup_nap; \ 619 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) 620 #else 621 #define FINISH_NAP 622 #endif 623 624 #endif /* _ASM_POWERPC_EXCEPTION_H */ 625