1 #ifndef _ASM_POWERPC_EXCEPTION_H 2 #define _ASM_POWERPC_EXCEPTION_H 3 /* 4 * Extracted from head_64.S 5 * 6 * PowerPC version 7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 8 * 9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP 10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> 11 * Adapted for Power Macintosh by Paul Mackerras. 12 * Low-level exception handlers and MMU support 13 * rewritten by Paul Mackerras. 14 * Copyright (C) 1996 Paul Mackerras. 15 * 16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and 17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com 18 * 19 * This file contains the low-level support and setup for the 20 * PowerPC-64 platform, including trap and interrupt dispatch. 21 * 22 * This program is free software; you can redistribute it and/or 23 * modify it under the terms of the GNU General Public License 24 * as published by the Free Software Foundation; either version 25 * 2 of the License, or (at your option) any later version. 26 */ 27 /* 28 * The following macros define the code that appears as 29 * the prologue to each of the exception handlers. They 30 * are split into two parts to allow a single kernel binary 31 * to be used for pSeries and iSeries. 32 * 33 * We make as much of the exception code common between native 34 * exception handlers (including pSeries LPAR) and iSeries LPAR 35 * implementations as possible. 36 */ 37 38 #define EX_R9 0 39 #define EX_R10 8 40 #define EX_R11 16 41 #define EX_R12 24 42 #define EX_R13 32 43 #define EX_SRR0 40 44 #define EX_DAR 48 45 #define EX_DSISR 56 46 #define EX_CCR 60 47 #define EX_R3 64 48 #define EX_LR 72 49 50 /* 51 * We're short on space and time in the exception prolog, so we can't 52 * use the normal SET_REG_IMMEDIATE macro. Normally we just need the 53 * low halfword of the address, but for Kdump we need the whole low 54 * word. 55 */ 56 #define LOAD_HANDLER(reg, label) \ 57 addi reg,reg,(label)-_stext; /* virt addr of handler ... */ 58 59 /* Exception register prefixes */ 60 #define EXC_HV H 61 #define EXC_STD 62 63 #define __EXCEPTION_PROLOG_1(area, h) \ 64 GET_PACA(r13); \ 65 std r9,area+EX_R9(r13); /* save r9 - r12 */ \ 66 std r10,area+EX_R10(r13); \ 67 std r11,area+EX_R11(r13); \ 68 std r12,area+EX_R12(r13); \ 69 mfspr r9,SPRN_SPRG_##h##SCRATCH0; \ 70 std r9,area+EX_R13(r13); \ 71 mfcr r9 72 #define EXCEPTION_PROLOG_1(area, h) __EXCEPTION_PROLOG_1(area, h) 73 74 #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \ 75 ld r12,PACAKBASE(r13); /* get high part of &label */ \ 76 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 77 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 78 LOAD_HANDLER(r12,label) \ 79 mtspr SPRN_##h##SRR0,r12; \ 80 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 81 mtspr SPRN_##h##SRR1,r10; \ 82 h##rfid; \ 83 b . /* prevent speculative execution */ 84 #define EXCEPTION_PROLOG_PSERIES_1(label, h) \ 85 __EXCEPTION_PROLOG_PSERIES_1(label, h) 86 87 #define EXCEPTION_PROLOG_PSERIES(area, label, h) \ 88 EXCEPTION_PROLOG_1(area, h); \ 89 EXCEPTION_PROLOG_PSERIES_1(label, h); 90 91 /* 92 * The common exception prolog is used for all except a few exceptions 93 * such as a segment miss on a kernel address. We have to be prepared 94 * to take another exception from the point where we first touch the 95 * kernel stack onwards. 96 * 97 * On entry r13 points to the paca, r9-r13 are saved in the paca, 98 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and 99 * SRR1, and relocation is on. 100 */ 101 #define EXCEPTION_PROLOG_COMMON(n, area) \ 102 andi. r10,r12,MSR_PR; /* See if coming from user */ \ 103 mr r10,r1; /* Save r1 */ \ 104 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \ 105 beq- 1f; \ 106 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \ 107 1: cmpdi cr1,r1,0; /* check if r1 is in userspace */ \ 108 bge- cr1,2f; /* abort if it is */ \ 109 b 3f; \ 110 2: li r1,(n); /* will be reloaded later */ \ 111 sth r1,PACA_TRAP_SAVE(r13); \ 112 b bad_stack; \ 113 3: std r9,_CCR(r1); /* save CR in stackframe */ \ 114 std r11,_NIP(r1); /* save SRR0 in stackframe */ \ 115 std r12,_MSR(r1); /* save SRR1 in stackframe */ \ 116 std r10,0(r1); /* make stack chain pointer */ \ 117 std r0,GPR0(r1); /* save r0 in stackframe */ \ 118 std r10,GPR1(r1); /* save r1 in stackframe */ \ 119 ACCOUNT_CPU_USER_ENTRY(r9, r10); \ 120 std r2,GPR2(r1); /* save r2 in stackframe */ \ 121 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \ 122 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \ 123 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \ 124 ld r10,area+EX_R10(r13); \ 125 std r9,GPR9(r1); \ 126 std r10,GPR10(r1); \ 127 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \ 128 ld r10,area+EX_R12(r13); \ 129 ld r11,area+EX_R13(r13); \ 130 std r9,GPR11(r1); \ 131 std r10,GPR12(r1); \ 132 std r11,GPR13(r1); \ 133 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \ 134 mflr r9; /* save LR in stackframe */ \ 135 std r9,_LINK(r1); \ 136 mfctr r10; /* save CTR in stackframe */ \ 137 std r10,_CTR(r1); \ 138 lbz r10,PACASOFTIRQEN(r13); \ 139 mfspr r11,SPRN_XER; /* save XER in stackframe */ \ 140 std r10,SOFTE(r1); \ 141 std r11,_XER(r1); \ 142 li r9,(n)+1; \ 143 std r9,_TRAP(r1); /* set trap number */ \ 144 li r10,0; \ 145 ld r11,exception_marker@toc(r2); \ 146 std r10,RESULT(r1); /* clear regs->result */ \ 147 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ \ 148 ACCOUNT_STOLEN_TIME 149 150 /* 151 * Exception vectors. 152 */ 153 #define STD_EXCEPTION_PSERIES(loc, vec, label) \ 154 . = loc; \ 155 .globl label##_pSeries; \ 156 label##_pSeries: \ 157 HMT_MEDIUM; \ 158 DO_KVM vec; \ 159 mtspr SPRN_SPRG_SCRATCH0,r13; /* save r13 */ \ 160 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, EXC_STD) 161 162 #define STD_EXCEPTION_HV(loc, vec, label) \ 163 . = loc; \ 164 .globl label##_hv; \ 165 label##_hv: \ 166 HMT_MEDIUM; \ 167 DO_KVM vec; \ 168 mtspr SPRN_SPRG_HSCRATCH0,r13;/* save r13 */ \ 169 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, EXC_HV) 170 171 #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h) \ 172 HMT_MEDIUM; \ 173 DO_KVM vec; \ 174 mtspr SPRN_SPRG_##h##SCRATCH0,r13; /* save r13 */ \ 175 GET_PACA(r13); \ 176 std r9,PACA_EXGEN+EX_R9(r13); /* save r9, r10 */ \ 177 std r10,PACA_EXGEN+EX_R10(r13); \ 178 lbz r10,PACASOFTIRQEN(r13); \ 179 mfcr r9; \ 180 cmpwi r10,0; \ 181 beq masked_##h##interrupt; \ 182 mfspr r10,SPRN_SPRG_##h##SCRATCH0; \ 183 std r10,PACA_EXGEN+EX_R13(r13); \ 184 std r11,PACA_EXGEN+EX_R11(r13); \ 185 std r12,PACA_EXGEN+EX_R12(r13); \ 186 ld r12,PACAKBASE(r13); /* get high part of &label */ \ 187 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 188 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 189 LOAD_HANDLER(r12,label##_common) \ 190 mtspr SPRN_##h##SRR0,r12; \ 191 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 192 mtspr SPRN_##h##SRR1,r10; \ 193 h##rfid; \ 194 b . /* prevent speculative execution */ 195 #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h) \ 196 __MASKABLE_EXCEPTION_PSERIES(vec, label, h) 197 198 #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \ 199 . = loc; \ 200 .globl label##_pSeries; \ 201 label##_pSeries: \ 202 _MASKABLE_EXCEPTION_PSERIES(vec, label, EXC_STD) 203 204 #define MASKABLE_EXCEPTION_HV(loc, vec, label) \ 205 . = loc; \ 206 .globl label##_hv; \ 207 label##_hv: \ 208 _MASKABLE_EXCEPTION_PSERIES(vec, label, EXC_HV) 209 210 #ifdef CONFIG_PPC_ISERIES 211 #define DISABLE_INTS \ 212 li r11,0; \ 213 stb r11,PACASOFTIRQEN(r13); \ 214 BEGIN_FW_FTR_SECTION; \ 215 stb r11,PACAHARDIRQEN(r13); \ 216 END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES); \ 217 TRACE_DISABLE_INTS; \ 218 BEGIN_FW_FTR_SECTION; \ 219 mfmsr r10; \ 220 ori r10,r10,MSR_EE; \ 221 mtmsrd r10,1; \ 222 END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES) 223 #else 224 #define DISABLE_INTS \ 225 li r11,0; \ 226 stb r11,PACASOFTIRQEN(r13); \ 227 stb r11,PACAHARDIRQEN(r13); \ 228 TRACE_DISABLE_INTS 229 #endif /* CONFIG_PPC_ISERIES */ 230 231 #define ENABLE_INTS \ 232 ld r12,_MSR(r1); \ 233 mfmsr r11; \ 234 rlwimi r11,r12,0,MSR_EE; \ 235 mtmsrd r11,1 236 237 #define STD_EXCEPTION_COMMON(trap, label, hdlr) \ 238 .align 7; \ 239 .globl label##_common; \ 240 label##_common: \ 241 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \ 242 DISABLE_INTS; \ 243 bl .save_nvgprs; \ 244 addi r3,r1,STACK_FRAME_OVERHEAD; \ 245 bl hdlr; \ 246 b .ret_from_except 247 248 /* 249 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur 250 * in the idle task and therefore need the special idle handling. 251 */ 252 #define STD_EXCEPTION_COMMON_IDLE(trap, label, hdlr) \ 253 .align 7; \ 254 .globl label##_common; \ 255 label##_common: \ 256 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \ 257 FINISH_NAP; \ 258 DISABLE_INTS; \ 259 bl .save_nvgprs; \ 260 addi r3,r1,STACK_FRAME_OVERHEAD; \ 261 bl hdlr; \ 262 b .ret_from_except 263 264 #define STD_EXCEPTION_COMMON_LITE(trap, label, hdlr) \ 265 .align 7; \ 266 .globl label##_common; \ 267 label##_common: \ 268 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \ 269 FINISH_NAP; \ 270 DISABLE_INTS; \ 271 BEGIN_FTR_SECTION \ 272 bl .ppc64_runlatch_on; \ 273 END_FTR_SECTION_IFSET(CPU_FTR_CTRL) \ 274 addi r3,r1,STACK_FRAME_OVERHEAD; \ 275 bl hdlr; \ 276 b .ret_from_except_lite 277 278 /* 279 * When the idle code in power4_idle puts the CPU into NAP mode, 280 * it has to do so in a loop, and relies on the external interrupt 281 * and decrementer interrupt entry code to get it out of the loop. 282 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags 283 * to signal that it is in the loop and needs help to get out. 284 */ 285 #ifdef CONFIG_PPC_970_NAP 286 #define FINISH_NAP \ 287 BEGIN_FTR_SECTION \ 288 clrrdi r11,r1,THREAD_SHIFT; \ 289 ld r9,TI_LOCAL_FLAGS(r11); \ 290 andi. r10,r9,_TLF_NAPPING; \ 291 bnel power4_fixup_nap; \ 292 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) 293 #else 294 #define FINISH_NAP 295 #endif 296 297 #endif /* _ASM_POWERPC_EXCEPTION_H */ 298