1 #ifndef _ASM_POWERPC_EXCEPTION_H 2 #define _ASM_POWERPC_EXCEPTION_H 3 /* 4 * Extracted from head_64.S 5 * 6 * PowerPC version 7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 8 * 9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP 10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> 11 * Adapted for Power Macintosh by Paul Mackerras. 12 * Low-level exception handlers and MMU support 13 * rewritten by Paul Mackerras. 14 * Copyright (C) 1996 Paul Mackerras. 15 * 16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and 17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com 18 * 19 * This file contains the low-level support and setup for the 20 * PowerPC-64 platform, including trap and interrupt dispatch. 21 * 22 * This program is free software; you can redistribute it and/or 23 * modify it under the terms of the GNU General Public License 24 * as published by the Free Software Foundation; either version 25 * 2 of the License, or (at your option) any later version. 26 */ 27 /* 28 * The following macros define the code that appears as 29 * the prologue to each of the exception handlers. They 30 * are split into two parts to allow a single kernel binary 31 * to be used for pSeries and iSeries. 32 * 33 * We make as much of the exception code common between native 34 * exception handlers (including pSeries LPAR) and iSeries LPAR 35 * implementations as possible. 36 */ 37 38 #define EX_R9 0 39 #define EX_R10 8 40 #define EX_R11 16 41 #define EX_R12 24 42 #define EX_R13 32 43 #define EX_SRR0 40 44 #define EX_DAR 48 45 #define EX_DSISR 56 46 #define EX_CCR 60 47 #define EX_R3 64 48 #define EX_LR 72 49 #define EX_CFAR 80 50 #define EX_PPR 88 /* SMT thread status register (priority) */ 51 #define EX_CTR 96 52 53 #ifdef CONFIG_RELOCATABLE 54 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 55 ld r12,PACAKBASE(r13); /* get high part of &label */ \ 56 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 57 LOAD_HANDLER(r12,label); \ 58 mtctr r12; \ 59 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 60 li r10,MSR_RI; \ 61 mtmsrd r10,1; /* Set RI (EE=0) */ \ 62 bctr; 63 #else 64 /* If not relocatable, we can jump directly -- and save messing with LR */ 65 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 66 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 67 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 68 li r10,MSR_RI; \ 69 mtmsrd r10,1; /* Set RI (EE=0) */ \ 70 b label; 71 #endif 72 #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 73 __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 74 75 /* 76 * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on 77 * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which 78 * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr. 79 */ 80 #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \ 81 EXCEPTION_PROLOG_0(area); \ 82 EXCEPTION_PROLOG_1(area, extra, vec); \ 83 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 84 85 /* 86 * We're short on space and time in the exception prolog, so we can't 87 * use the normal SET_REG_IMMEDIATE macro. Normally we just need the 88 * low halfword of the address, but for Kdump we need the whole low 89 * word. 90 */ 91 #define LOAD_HANDLER(reg, label) \ 92 /* Handlers must be within 64K of kbase, which must be 64k aligned */ \ 93 ori reg,reg,(label)-_stext; /* virt addr of handler ... */ 94 95 /* Exception register prefixes */ 96 #define EXC_HV H 97 #define EXC_STD 98 99 #if defined(CONFIG_RELOCATABLE) 100 /* 101 * If we support interrupts with relocation on AND we're a relocatable kernel, 102 * we need to use CTR to get to the 2nd level handler. So, save/restore it 103 * when required. 104 */ 105 #define SAVE_CTR(reg, area) mfctr reg ; std reg,area+EX_CTR(r13) 106 #define GET_CTR(reg, area) ld reg,area+EX_CTR(r13) 107 #define RESTORE_CTR(reg, area) ld reg,area+EX_CTR(r13) ; mtctr reg 108 #else 109 /* ...else CTR is unused and in register. */ 110 #define SAVE_CTR(reg, area) 111 #define GET_CTR(reg, area) mfctr reg 112 #define RESTORE_CTR(reg, area) 113 #endif 114 115 /* 116 * PPR save/restore macros used in exceptions_64s.S 117 * Used for P7 or later processors 118 */ 119 #define SAVE_PPR(area, ra, rb) \ 120 BEGIN_FTR_SECTION_NESTED(940) \ 121 ld ra,PACACURRENT(r13); \ 122 ld rb,area+EX_PPR(r13); /* Read PPR from paca */ \ 123 std rb,TASKTHREADPPR(ra); \ 124 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940) 125 126 #define RESTORE_PPR_PACA(area, ra) \ 127 BEGIN_FTR_SECTION_NESTED(941) \ 128 ld ra,area+EX_PPR(r13); \ 129 mtspr SPRN_PPR,ra; \ 130 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941) 131 132 /* 133 * Increase the priority on systems where PPR save/restore is not 134 * implemented/ supported. 135 */ 136 #define HMT_MEDIUM_PPR_DISCARD \ 137 BEGIN_FTR_SECTION_NESTED(942) \ 138 HMT_MEDIUM; \ 139 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,0,942) /*non P7*/ 140 141 /* 142 * Get an SPR into a register if the CPU has the given feature 143 */ 144 #define OPT_GET_SPR(ra, spr, ftr) \ 145 BEGIN_FTR_SECTION_NESTED(943) \ 146 mfspr ra,spr; \ 147 END_FTR_SECTION_NESTED(ftr,ftr,943) 148 149 /* 150 * Set an SPR from a register if the CPU has the given feature 151 */ 152 #define OPT_SET_SPR(ra, spr, ftr) \ 153 BEGIN_FTR_SECTION_NESTED(943) \ 154 mtspr spr,ra; \ 155 END_FTR_SECTION_NESTED(ftr,ftr,943) 156 157 /* 158 * Save a register to the PACA if the CPU has the given feature 159 */ 160 #define OPT_SAVE_REG_TO_PACA(offset, ra, ftr) \ 161 BEGIN_FTR_SECTION_NESTED(943) \ 162 std ra,offset(r13); \ 163 END_FTR_SECTION_NESTED(ftr,ftr,943) 164 165 #define EXCEPTION_PROLOG_0(area) \ 166 GET_PACA(r13); \ 167 std r9,area+EX_R9(r13); /* save r9 */ \ 168 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \ 169 HMT_MEDIUM; \ 170 std r10,area+EX_R10(r13); /* save r10 - r12 */ \ 171 OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR) 172 173 #define __EXCEPTION_PROLOG_1(area, extra, vec) \ 174 OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \ 175 OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \ 176 SAVE_CTR(r10, area); \ 177 mfcr r9; \ 178 extra(vec); \ 179 std r11,area+EX_R11(r13); \ 180 std r12,area+EX_R12(r13); \ 181 GET_SCRATCH0(r10); \ 182 std r10,area+EX_R13(r13) 183 #define EXCEPTION_PROLOG_1(area, extra, vec) \ 184 __EXCEPTION_PROLOG_1(area, extra, vec) 185 186 #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \ 187 ld r12,PACAKBASE(r13); /* get high part of &label */ \ 188 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 189 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 190 LOAD_HANDLER(r12,label) \ 191 mtspr SPRN_##h##SRR0,r12; \ 192 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 193 mtspr SPRN_##h##SRR1,r10; \ 194 h##rfid; \ 195 b . /* prevent speculative execution */ 196 #define EXCEPTION_PROLOG_PSERIES_1(label, h) \ 197 __EXCEPTION_PROLOG_PSERIES_1(label, h) 198 199 #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \ 200 EXCEPTION_PROLOG_0(area); \ 201 EXCEPTION_PROLOG_1(area, extra, vec); \ 202 EXCEPTION_PROLOG_PSERIES_1(label, h); 203 204 #define __KVMTEST(n) \ 205 lbz r10,HSTATE_IN_GUEST(r13); \ 206 cmpwi r10,0; \ 207 bne do_kvm_##n 208 209 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 210 /* 211 * If hv is possible, interrupts come into to the hv version 212 * of the kvmppc_interrupt code, which then jumps to the PR handler, 213 * kvmppc_interrupt_pr, if the guest is a PR guest. 214 */ 215 #define kvmppc_interrupt kvmppc_interrupt_hv 216 #else 217 #define kvmppc_interrupt kvmppc_interrupt_pr 218 #endif 219 220 #define __KVM_HANDLER(area, h, n) \ 221 do_kvm_##n: \ 222 BEGIN_FTR_SECTION_NESTED(947) \ 223 ld r10,area+EX_CFAR(r13); \ 224 std r10,HSTATE_CFAR(r13); \ 225 END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947); \ 226 BEGIN_FTR_SECTION_NESTED(948) \ 227 ld r10,area+EX_PPR(r13); \ 228 std r10,HSTATE_PPR(r13); \ 229 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 230 ld r10,area+EX_R10(r13); \ 231 stw r9,HSTATE_SCRATCH1(r13); \ 232 ld r9,area+EX_R9(r13); \ 233 std r12,HSTATE_SCRATCH0(r13); \ 234 li r12,n; \ 235 b kvmppc_interrupt 236 237 #define __KVM_HANDLER_SKIP(area, h, n) \ 238 do_kvm_##n: \ 239 cmpwi r10,KVM_GUEST_MODE_SKIP; \ 240 ld r10,area+EX_R10(r13); \ 241 beq 89f; \ 242 stw r9,HSTATE_SCRATCH1(r13); \ 243 BEGIN_FTR_SECTION_NESTED(948) \ 244 ld r9,area+EX_PPR(r13); \ 245 std r9,HSTATE_PPR(r13); \ 246 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 247 ld r9,area+EX_R9(r13); \ 248 std r12,HSTATE_SCRATCH0(r13); \ 249 li r12,n; \ 250 b kvmppc_interrupt; \ 251 89: mtocrf 0x80,r9; \ 252 ld r9,area+EX_R9(r13); \ 253 b kvmppc_skip_##h##interrupt 254 255 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER 256 #define KVMTEST(n) __KVMTEST(n) 257 #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n) 258 #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n) 259 260 #else 261 #define KVMTEST(n) 262 #define KVM_HANDLER(area, h, n) 263 #define KVM_HANDLER_SKIP(area, h, n) 264 #endif 265 266 #define NOTEST(n) 267 268 /* 269 * The common exception prolog is used for all except a few exceptions 270 * such as a segment miss on a kernel address. We have to be prepared 271 * to take another exception from the point where we first touch the 272 * kernel stack onwards. 273 * 274 * On entry r13 points to the paca, r9-r13 are saved in the paca, 275 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and 276 * SRR1, and relocation is on. 277 */ 278 #define EXCEPTION_PROLOG_COMMON(n, area) \ 279 andi. r10,r12,MSR_PR; /* See if coming from user */ \ 280 mr r10,r1; /* Save r1 */ \ 281 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \ 282 beq- 1f; \ 283 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \ 284 1: cmpdi cr1,r1,-INT_FRAME_SIZE; /* check if r1 is in userspace */ \ 285 blt+ cr1,3f; /* abort if it is */ \ 286 li r1,(n); /* will be reloaded later */ \ 287 sth r1,PACA_TRAP_SAVE(r13); \ 288 std r3,area+EX_R3(r13); \ 289 addi r3,r13,area; /* r3 -> where regs are saved*/ \ 290 RESTORE_CTR(r1, area); \ 291 b bad_stack; \ 292 3: std r9,_CCR(r1); /* save CR in stackframe */ \ 293 std r11,_NIP(r1); /* save SRR0 in stackframe */ \ 294 std r12,_MSR(r1); /* save SRR1 in stackframe */ \ 295 std r10,0(r1); /* make stack chain pointer */ \ 296 std r0,GPR0(r1); /* save r0 in stackframe */ \ 297 std r10,GPR1(r1); /* save r1 in stackframe */ \ 298 beq 4f; /* if from kernel mode */ \ 299 ACCOUNT_CPU_USER_ENTRY(r9, r10); \ 300 SAVE_PPR(area, r9, r10); \ 301 4: EXCEPTION_PROLOG_COMMON_2(area) \ 302 EXCEPTION_PROLOG_COMMON_3(n) \ 303 ACCOUNT_STOLEN_TIME 304 305 /* Save original regs values from save area to stack frame. */ 306 #define EXCEPTION_PROLOG_COMMON_2(area) \ 307 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \ 308 ld r10,area+EX_R10(r13); \ 309 std r9,GPR9(r1); \ 310 std r10,GPR10(r1); \ 311 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \ 312 ld r10,area+EX_R12(r13); \ 313 ld r11,area+EX_R13(r13); \ 314 std r9,GPR11(r1); \ 315 std r10,GPR12(r1); \ 316 std r11,GPR13(r1); \ 317 BEGIN_FTR_SECTION_NESTED(66); \ 318 ld r10,area+EX_CFAR(r13); \ 319 std r10,ORIG_GPR3(r1); \ 320 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \ 321 GET_CTR(r10, area); \ 322 std r10,_CTR(r1); 323 324 #define EXCEPTION_PROLOG_COMMON_3(n) \ 325 std r2,GPR2(r1); /* save r2 in stackframe */ \ 326 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \ 327 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \ 328 mflr r9; /* Get LR, later save to stack */ \ 329 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \ 330 std r9,_LINK(r1); \ 331 lbz r10,PACASOFTIRQEN(r13); \ 332 mfspr r11,SPRN_XER; /* save XER in stackframe */ \ 333 std r10,SOFTE(r1); \ 334 std r11,_XER(r1); \ 335 li r9,(n)+1; \ 336 std r9,_TRAP(r1); /* set trap number */ \ 337 li r10,0; \ 338 ld r11,exception_marker@toc(r2); \ 339 std r10,RESULT(r1); /* clear regs->result */ \ 340 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ 341 342 /* 343 * Exception vectors. 344 */ 345 #define STD_EXCEPTION_PSERIES(loc, vec, label) \ 346 . = loc; \ 347 .globl label##_pSeries; \ 348 label##_pSeries: \ 349 HMT_MEDIUM_PPR_DISCARD; \ 350 SET_SCRATCH0(r13); /* save r13 */ \ 351 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 352 EXC_STD, KVMTEST, vec) 353 354 /* Version of above for when we have to branch out-of-line */ 355 #define STD_EXCEPTION_PSERIES_OOL(vec, label) \ 356 .globl label##_pSeries; \ 357 label##_pSeries: \ 358 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST, vec); \ 359 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_STD) 360 361 #define STD_EXCEPTION_HV(loc, vec, label) \ 362 . = loc; \ 363 .globl label##_hv; \ 364 label##_hv: \ 365 HMT_MEDIUM_PPR_DISCARD; \ 366 SET_SCRATCH0(r13); /* save r13 */ \ 367 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 368 EXC_HV, KVMTEST, vec) 369 370 /* Version of above for when we have to branch out-of-line */ 371 #define STD_EXCEPTION_HV_OOL(vec, label) \ 372 .globl label##_hv; \ 373 label##_hv: \ 374 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST, vec); \ 375 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV) 376 377 #define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 378 . = loc; \ 379 .globl label##_relon_pSeries; \ 380 label##_relon_pSeries: \ 381 HMT_MEDIUM_PPR_DISCARD; \ 382 /* No guest interrupts come through here */ \ 383 SET_SCRATCH0(r13); /* save r13 */ \ 384 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 385 EXC_STD, NOTEST, vec) 386 387 #define STD_RELON_EXCEPTION_PSERIES_OOL(vec, label) \ 388 .globl label##_relon_pSeries; \ 389 label##_relon_pSeries: \ 390 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \ 391 EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, EXC_STD) 392 393 #define STD_RELON_EXCEPTION_HV(loc, vec, label) \ 394 . = loc; \ 395 .globl label##_relon_hv; \ 396 label##_relon_hv: \ 397 HMT_MEDIUM_PPR_DISCARD; \ 398 /* No guest interrupts come through here */ \ 399 SET_SCRATCH0(r13); /* save r13 */ \ 400 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 401 EXC_HV, NOTEST, vec) 402 403 #define STD_RELON_EXCEPTION_HV_OOL(vec, label) \ 404 .globl label##_relon_hv; \ 405 label##_relon_hv: \ 406 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \ 407 EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, EXC_HV) 408 409 /* This associate vector numbers with bits in paca->irq_happened */ 410 #define SOFTEN_VALUE_0x500 PACA_IRQ_EE 411 #define SOFTEN_VALUE_0x502 PACA_IRQ_EE 412 #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC 413 #define SOFTEN_VALUE_0x982 PACA_IRQ_DEC 414 #define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL 415 #define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL 416 #define SOFTEN_VALUE_0xe82 PACA_IRQ_DBELL 417 #define SOFTEN_VALUE_0xe60 PACA_IRQ_HMI 418 #define SOFTEN_VALUE_0xe62 PACA_IRQ_HMI 419 420 #define __SOFTEN_TEST(h, vec) \ 421 lbz r10,PACASOFTIRQEN(r13); \ 422 cmpwi r10,0; \ 423 li r10,SOFTEN_VALUE_##vec; \ 424 beq masked_##h##interrupt 425 #define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec) 426 427 #define SOFTEN_TEST_PR(vec) \ 428 KVMTEST(vec); \ 429 _SOFTEN_TEST(EXC_STD, vec) 430 431 #define SOFTEN_TEST_HV(vec) \ 432 KVMTEST(vec); \ 433 _SOFTEN_TEST(EXC_HV, vec) 434 435 #define SOFTEN_NOTEST_PR(vec) _SOFTEN_TEST(EXC_STD, vec) 436 #define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec) 437 438 #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 439 SET_SCRATCH0(r13); /* save r13 */ \ 440 EXCEPTION_PROLOG_0(PACA_EXGEN); \ 441 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 442 EXCEPTION_PROLOG_PSERIES_1(label##_common, h); 443 444 #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 445 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) 446 447 #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \ 448 . = loc; \ 449 .globl label##_pSeries; \ 450 label##_pSeries: \ 451 HMT_MEDIUM_PPR_DISCARD; \ 452 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 453 EXC_STD, SOFTEN_TEST_PR) 454 455 #define MASKABLE_EXCEPTION_HV(loc, vec, label) \ 456 . = loc; \ 457 .globl label##_hv; \ 458 label##_hv: \ 459 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 460 EXC_HV, SOFTEN_TEST_HV) 461 462 #define MASKABLE_EXCEPTION_HV_OOL(vec, label) \ 463 .globl label##_hv; \ 464 label##_hv: \ 465 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \ 466 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV); 467 468 #define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 469 HMT_MEDIUM_PPR_DISCARD; \ 470 SET_SCRATCH0(r13); /* save r13 */ \ 471 EXCEPTION_PROLOG_0(PACA_EXGEN); \ 472 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 473 EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, h); 474 #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 475 __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) 476 477 #define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 478 . = loc; \ 479 .globl label##_relon_pSeries; \ 480 label##_relon_pSeries: \ 481 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 482 EXC_STD, SOFTEN_NOTEST_PR) 483 484 #define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label) \ 485 . = loc; \ 486 .globl label##_relon_hv; \ 487 label##_relon_hv: \ 488 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 489 EXC_HV, SOFTEN_NOTEST_HV) 490 491 #define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label) \ 492 .globl label##_relon_hv; \ 493 label##_relon_hv: \ 494 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_NOTEST_HV, vec); \ 495 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV); 496 497 /* 498 * Our exception common code can be passed various "additions" 499 * to specify the behaviour of interrupts, whether to kick the 500 * runlatch, etc... 501 */ 502 503 /* 504 * This addition reconciles our actual IRQ state with the various software 505 * flags that track it. This may call C code. 506 */ 507 #define ADD_RECONCILE RECONCILE_IRQ_STATE(r10,r11) 508 509 #define ADD_NVGPRS \ 510 bl save_nvgprs 511 512 #define RUNLATCH_ON \ 513 BEGIN_FTR_SECTION \ 514 CURRENT_THREAD_INFO(r3, r1); \ 515 ld r4,TI_LOCAL_FLAGS(r3); \ 516 andi. r0,r4,_TLF_RUNLATCH; \ 517 beql ppc64_runlatch_on_trampoline; \ 518 END_FTR_SECTION_IFSET(CPU_FTR_CTRL) 519 520 #define EXCEPTION_COMMON(trap, label, hdlr, ret, additions) \ 521 .align 7; \ 522 .globl label##_common; \ 523 label##_common: \ 524 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \ 525 /* Volatile regs are potentially clobbered here */ \ 526 additions; \ 527 addi r3,r1,STACK_FRAME_OVERHEAD; \ 528 bl hdlr; \ 529 b ret 530 531 #define STD_EXCEPTION_COMMON(trap, label, hdlr) \ 532 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except, \ 533 ADD_NVGPRS;ADD_RECONCILE) 534 535 /* 536 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur 537 * in the idle task and therefore need the special idle handling 538 * (finish nap and runlatch) 539 */ 540 #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \ 541 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except_lite, \ 542 FINISH_NAP;ADD_RECONCILE;RUNLATCH_ON) 543 544 /* 545 * When the idle code in power4_idle puts the CPU into NAP mode, 546 * it has to do so in a loop, and relies on the external interrupt 547 * and decrementer interrupt entry code to get it out of the loop. 548 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags 549 * to signal that it is in the loop and needs help to get out. 550 */ 551 #ifdef CONFIG_PPC_970_NAP 552 #define FINISH_NAP \ 553 BEGIN_FTR_SECTION \ 554 CURRENT_THREAD_INFO(r11, r1); \ 555 ld r9,TI_LOCAL_FLAGS(r11); \ 556 andi. r10,r9,_TLF_NAPPING; \ 557 bnel power4_fixup_nap; \ 558 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) 559 #else 560 #define FINISH_NAP 561 #endif 562 563 #endif /* _ASM_POWERPC_EXCEPTION_H */ 564