1 #ifndef _ASM_POWERPC_EXCEPTION_H 2 #define _ASM_POWERPC_EXCEPTION_H 3 /* 4 * Extracted from head_64.S 5 * 6 * PowerPC version 7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 8 * 9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP 10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> 11 * Adapted for Power Macintosh by Paul Mackerras. 12 * Low-level exception handlers and MMU support 13 * rewritten by Paul Mackerras. 14 * Copyright (C) 1996 Paul Mackerras. 15 * 16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and 17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com 18 * 19 * This file contains the low-level support and setup for the 20 * PowerPC-64 platform, including trap and interrupt dispatch. 21 * 22 * This program is free software; you can redistribute it and/or 23 * modify it under the terms of the GNU General Public License 24 * as published by the Free Software Foundation; either version 25 * 2 of the License, or (at your option) any later version. 26 */ 27 /* 28 * The following macros define the code that appears as 29 * the prologue to each of the exception handlers. They 30 * are split into two parts to allow a single kernel binary 31 * to be used for pSeries and iSeries. 32 * 33 * We make as much of the exception code common between native 34 * exception handlers (including pSeries LPAR) and iSeries LPAR 35 * implementations as possible. 36 */ 37 38 #define EX_R9 0 39 #define EX_R10 8 40 #define EX_R11 16 41 #define EX_R12 24 42 #define EX_R13 32 43 #define EX_SRR0 40 44 #define EX_DAR 48 45 #define EX_DSISR 56 46 #define EX_CCR 60 47 #define EX_R3 64 48 #define EX_LR 72 49 #define EX_CFAR 80 50 #define EX_PPR 88 /* SMT thread status register (priority) */ 51 52 #ifdef CONFIG_RELOCATABLE 53 #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 54 ld r12,PACAKBASE(r13); /* get high part of &label */ \ 55 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 56 LOAD_HANDLER(r12,label); \ 57 mtlr r12; \ 58 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 59 li r10,MSR_RI; \ 60 mtmsrd r10,1; /* Set RI (EE=0) */ \ 61 blr; 62 #else 63 /* If not relocatable, we can jump directly -- and save messing with LR */ 64 #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 65 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 66 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 67 li r10,MSR_RI; \ 68 mtmsrd r10,1; /* Set RI (EE=0) */ \ 69 b label; 70 #endif 71 72 /* 73 * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on 74 * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which 75 * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr. 76 */ 77 #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \ 78 EXCEPTION_PROLOG_1(area, extra, vec); \ 79 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 80 81 /* 82 * We're short on space and time in the exception prolog, so we can't 83 * use the normal SET_REG_IMMEDIATE macro. Normally we just need the 84 * low halfword of the address, but for Kdump we need the whole low 85 * word. 86 */ 87 #define LOAD_HANDLER(reg, label) \ 88 /* Handlers must be within 64K of kbase, which must be 64k aligned */ \ 89 ori reg,reg,(label)-_stext; /* virt addr of handler ... */ 90 91 /* Exception register prefixes */ 92 #define EXC_HV H 93 #define EXC_STD 94 95 #if defined(CONFIG_RELOCATABLE) 96 /* 97 * If we support interrupts with relocation on AND we're a relocatable 98 * kernel, we need to use LR to get to the 2nd level handler. So, save/restore 99 * it when required. 100 */ 101 #define SAVE_LR(reg, area) mflr reg ; std reg,area+EX_LR(r13) 102 #define GET_LR(reg, area) ld reg,area+EX_LR(r13) 103 #define RESTORE_LR(reg, area) ld reg,area+EX_LR(r13) ; mtlr reg 104 #else 105 /* ...else LR is unused and in register. */ 106 #define SAVE_LR(reg, area) 107 #define GET_LR(reg, area) mflr reg 108 #define RESTORE_LR(reg, area) 109 #endif 110 111 #define __EXCEPTION_PROLOG_1(area, extra, vec) \ 112 GET_PACA(r13); \ 113 std r9,area+EX_R9(r13); /* save r9 - r12 */ \ 114 std r10,area+EX_R10(r13); \ 115 BEGIN_FTR_SECTION_NESTED(66); \ 116 mfspr r10,SPRN_CFAR; \ 117 std r10,area+EX_CFAR(r13); \ 118 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \ 119 SAVE_LR(r10, area); \ 120 mfcr r9; \ 121 extra(vec); \ 122 std r11,area+EX_R11(r13); \ 123 std r12,area+EX_R12(r13); \ 124 GET_SCRATCH0(r10); \ 125 std r10,area+EX_R13(r13) 126 #define EXCEPTION_PROLOG_1(area, extra, vec) \ 127 __EXCEPTION_PROLOG_1(area, extra, vec) 128 129 #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \ 130 ld r12,PACAKBASE(r13); /* get high part of &label */ \ 131 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 132 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 133 LOAD_HANDLER(r12,label) \ 134 mtspr SPRN_##h##SRR0,r12; \ 135 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 136 mtspr SPRN_##h##SRR1,r10; \ 137 h##rfid; \ 138 b . /* prevent speculative execution */ 139 #define EXCEPTION_PROLOG_PSERIES_1(label, h) \ 140 __EXCEPTION_PROLOG_PSERIES_1(label, h) 141 142 #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \ 143 EXCEPTION_PROLOG_1(area, extra, vec); \ 144 EXCEPTION_PROLOG_PSERIES_1(label, h); 145 146 #define __KVMTEST(n) \ 147 lbz r10,HSTATE_IN_GUEST(r13); \ 148 cmpwi r10,0; \ 149 bne do_kvm_##n 150 151 #define __KVM_HANDLER(area, h, n) \ 152 do_kvm_##n: \ 153 ld r10,area+EX_R10(r13); \ 154 stw r9,HSTATE_SCRATCH1(r13); \ 155 ld r9,area+EX_R9(r13); \ 156 std r12,HSTATE_SCRATCH0(r13); \ 157 li r12,n; \ 158 b kvmppc_interrupt 159 160 #define __KVM_HANDLER_SKIP(area, h, n) \ 161 do_kvm_##n: \ 162 cmpwi r10,KVM_GUEST_MODE_SKIP; \ 163 ld r10,area+EX_R10(r13); \ 164 beq 89f; \ 165 stw r9,HSTATE_SCRATCH1(r13); \ 166 ld r9,area+EX_R9(r13); \ 167 std r12,HSTATE_SCRATCH0(r13); \ 168 li r12,n; \ 169 b kvmppc_interrupt; \ 170 89: mtocrf 0x80,r9; \ 171 ld r9,area+EX_R9(r13); \ 172 b kvmppc_skip_##h##interrupt 173 174 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER 175 #define KVMTEST(n) __KVMTEST(n) 176 #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n) 177 #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n) 178 179 #else 180 #define KVMTEST(n) 181 #define KVM_HANDLER(area, h, n) 182 #define KVM_HANDLER_SKIP(area, h, n) 183 #endif 184 185 #ifdef CONFIG_KVM_BOOK3S_PR 186 #define KVMTEST_PR(n) __KVMTEST(n) 187 #define KVM_HANDLER_PR(area, h, n) __KVM_HANDLER(area, h, n) 188 #define KVM_HANDLER_PR_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n) 189 190 #else 191 #define KVMTEST_PR(n) 192 #define KVM_HANDLER_PR(area, h, n) 193 #define KVM_HANDLER_PR_SKIP(area, h, n) 194 #endif 195 196 #define NOTEST(n) 197 198 /* 199 * The common exception prolog is used for all except a few exceptions 200 * such as a segment miss on a kernel address. We have to be prepared 201 * to take another exception from the point where we first touch the 202 * kernel stack onwards. 203 * 204 * On entry r13 points to the paca, r9-r13 are saved in the paca, 205 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and 206 * SRR1, and relocation is on. 207 */ 208 #define EXCEPTION_PROLOG_COMMON(n, area) \ 209 andi. r10,r12,MSR_PR; /* See if coming from user */ \ 210 mr r10,r1; /* Save r1 */ \ 211 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \ 212 beq- 1f; \ 213 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \ 214 1: cmpdi cr1,r1,0; /* check if r1 is in userspace */ \ 215 blt+ cr1,3f; /* abort if it is */ \ 216 li r1,(n); /* will be reloaded later */ \ 217 sth r1,PACA_TRAP_SAVE(r13); \ 218 std r3,area+EX_R3(r13); \ 219 addi r3,r13,area; /* r3 -> where regs are saved*/ \ 220 RESTORE_LR(r1, area); \ 221 b bad_stack; \ 222 3: std r9,_CCR(r1); /* save CR in stackframe */ \ 223 std r11,_NIP(r1); /* save SRR0 in stackframe */ \ 224 std r12,_MSR(r1); /* save SRR1 in stackframe */ \ 225 std r10,0(r1); /* make stack chain pointer */ \ 226 std r0,GPR0(r1); /* save r0 in stackframe */ \ 227 std r10,GPR1(r1); /* save r1 in stackframe */ \ 228 beq 4f; /* if from kernel mode */ \ 229 ACCOUNT_CPU_USER_ENTRY(r9, r10); \ 230 4: std r2,GPR2(r1); /* save r2 in stackframe */ \ 231 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \ 232 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \ 233 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \ 234 ld r10,area+EX_R10(r13); \ 235 std r9,GPR9(r1); \ 236 std r10,GPR10(r1); \ 237 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \ 238 ld r10,area+EX_R12(r13); \ 239 ld r11,area+EX_R13(r13); \ 240 std r9,GPR11(r1); \ 241 std r10,GPR12(r1); \ 242 std r11,GPR13(r1); \ 243 BEGIN_FTR_SECTION_NESTED(66); \ 244 ld r10,area+EX_CFAR(r13); \ 245 std r10,ORIG_GPR3(r1); \ 246 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \ 247 GET_LR(r9,area); /* Get LR, later save to stack */ \ 248 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \ 249 std r9,_LINK(r1); \ 250 mfctr r10; /* save CTR in stackframe */ \ 251 std r10,_CTR(r1); \ 252 lbz r10,PACASOFTIRQEN(r13); \ 253 mfspr r11,SPRN_XER; /* save XER in stackframe */ \ 254 std r10,SOFTE(r1); \ 255 std r11,_XER(r1); \ 256 li r9,(n)+1; \ 257 std r9,_TRAP(r1); /* set trap number */ \ 258 li r10,0; \ 259 ld r11,exception_marker@toc(r2); \ 260 std r10,RESULT(r1); /* clear regs->result */ \ 261 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ \ 262 ACCOUNT_STOLEN_TIME 263 264 /* 265 * Exception vectors. 266 */ 267 #define STD_EXCEPTION_PSERIES(loc, vec, label) \ 268 . = loc; \ 269 .globl label##_pSeries; \ 270 label##_pSeries: \ 271 HMT_MEDIUM; \ 272 SET_SCRATCH0(r13); /* save r13 */ \ 273 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 274 EXC_STD, KVMTEST_PR, vec) 275 276 #define STD_EXCEPTION_HV(loc, vec, label) \ 277 . = loc; \ 278 .globl label##_hv; \ 279 label##_hv: \ 280 HMT_MEDIUM; \ 281 SET_SCRATCH0(r13); /* save r13 */ \ 282 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 283 EXC_HV, KVMTEST, vec) 284 285 #define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 286 . = loc; \ 287 .globl label##_relon_pSeries; \ 288 label##_relon_pSeries: \ 289 HMT_MEDIUM; \ 290 /* No guest interrupts come through here */ \ 291 SET_SCRATCH0(r13); /* save r13 */ \ 292 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 293 EXC_STD, KVMTEST_PR, vec) 294 295 #define STD_RELON_EXCEPTION_HV(loc, vec, label) \ 296 . = loc; \ 297 .globl label##_relon_hv; \ 298 label##_relon_hv: \ 299 HMT_MEDIUM; \ 300 /* No guest interrupts come through here */ \ 301 SET_SCRATCH0(r13); /* save r13 */ \ 302 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 303 EXC_HV, KVMTEST, vec) 304 305 /* This associate vector numbers with bits in paca->irq_happened */ 306 #define SOFTEN_VALUE_0x500 PACA_IRQ_EE 307 #define SOFTEN_VALUE_0x502 PACA_IRQ_EE 308 #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC 309 #define SOFTEN_VALUE_0x982 PACA_IRQ_DEC 310 #define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL 311 #define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL 312 #define SOFTEN_VALUE_0xe82 PACA_IRQ_DBELL 313 314 #define __SOFTEN_TEST(h, vec) \ 315 lbz r10,PACASOFTIRQEN(r13); \ 316 cmpwi r10,0; \ 317 li r10,SOFTEN_VALUE_##vec; \ 318 beq masked_##h##interrupt 319 #define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec) 320 321 #define SOFTEN_TEST_PR(vec) \ 322 KVMTEST_PR(vec); \ 323 _SOFTEN_TEST(EXC_STD, vec) 324 325 #define SOFTEN_TEST_HV(vec) \ 326 KVMTEST(vec); \ 327 _SOFTEN_TEST(EXC_HV, vec) 328 329 #define SOFTEN_TEST_HV_201(vec) \ 330 KVMTEST(vec); \ 331 _SOFTEN_TEST(EXC_STD, vec) 332 333 #define SOFTEN_NOTEST_PR(vec) _SOFTEN_TEST(EXC_STD, vec) 334 #define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec) 335 336 #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 337 HMT_MEDIUM; \ 338 SET_SCRATCH0(r13); /* save r13 */ \ 339 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 340 EXCEPTION_PROLOG_PSERIES_1(label##_common, h); 341 #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 342 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) 343 344 #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \ 345 . = loc; \ 346 .globl label##_pSeries; \ 347 label##_pSeries: \ 348 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 349 EXC_STD, SOFTEN_TEST_PR) 350 351 #define MASKABLE_EXCEPTION_HV(loc, vec, label) \ 352 . = loc; \ 353 .globl label##_hv; \ 354 label##_hv: \ 355 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 356 EXC_HV, SOFTEN_TEST_HV) 357 358 #define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 359 HMT_MEDIUM; \ 360 SET_SCRATCH0(r13); /* save r13 */ \ 361 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 362 EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, h); 363 #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 364 __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) 365 366 #define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 367 . = loc; \ 368 .globl label##_relon_pSeries; \ 369 label##_relon_pSeries: \ 370 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 371 EXC_STD, SOFTEN_NOTEST_PR) 372 373 #define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label) \ 374 . = loc; \ 375 .globl label##_relon_hv; \ 376 label##_relon_hv: \ 377 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 378 EXC_HV, SOFTEN_NOTEST_HV) 379 380 /* 381 * Our exception common code can be passed various "additions" 382 * to specify the behaviour of interrupts, whether to kick the 383 * runlatch, etc... 384 */ 385 386 /* Exception addition: Hard disable interrupts */ 387 #define DISABLE_INTS SOFT_DISABLE_INTS(r10,r11) 388 389 #define ADD_NVGPRS \ 390 bl .save_nvgprs 391 392 #define RUNLATCH_ON \ 393 BEGIN_FTR_SECTION \ 394 CURRENT_THREAD_INFO(r3, r1); \ 395 ld r4,TI_LOCAL_FLAGS(r3); \ 396 andi. r0,r4,_TLF_RUNLATCH; \ 397 beql ppc64_runlatch_on_trampoline; \ 398 END_FTR_SECTION_IFSET(CPU_FTR_CTRL) 399 400 #define EXCEPTION_COMMON(trap, label, hdlr, ret, additions) \ 401 .align 7; \ 402 .globl label##_common; \ 403 label##_common: \ 404 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \ 405 additions; \ 406 addi r3,r1,STACK_FRAME_OVERHEAD; \ 407 bl hdlr; \ 408 b ret 409 410 #define STD_EXCEPTION_COMMON(trap, label, hdlr) \ 411 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except, \ 412 ADD_NVGPRS;DISABLE_INTS) 413 414 /* 415 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur 416 * in the idle task and therefore need the special idle handling 417 * (finish nap and runlatch) 418 */ 419 #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \ 420 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except_lite, \ 421 FINISH_NAP;RUNLATCH_ON;DISABLE_INTS) 422 423 /* 424 * When the idle code in power4_idle puts the CPU into NAP mode, 425 * it has to do so in a loop, and relies on the external interrupt 426 * and decrementer interrupt entry code to get it out of the loop. 427 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags 428 * to signal that it is in the loop and needs help to get out. 429 */ 430 #ifdef CONFIG_PPC_970_NAP 431 #define FINISH_NAP \ 432 BEGIN_FTR_SECTION \ 433 CURRENT_THREAD_INFO(r11, r1); \ 434 ld r9,TI_LOCAL_FLAGS(r11); \ 435 andi. r10,r9,_TLF_NAPPING; \ 436 bnel power4_fixup_nap; \ 437 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) 438 #else 439 #define FINISH_NAP 440 #endif 441 442 #endif /* _ASM_POWERPC_EXCEPTION_H */ 443