1 #ifndef _ASM_POWERPC_EXCEPTION_H 2 #define _ASM_POWERPC_EXCEPTION_H 3 /* 4 * Extracted from head_64.S 5 * 6 * PowerPC version 7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 8 * 9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP 10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> 11 * Adapted for Power Macintosh by Paul Mackerras. 12 * Low-level exception handlers and MMU support 13 * rewritten by Paul Mackerras. 14 * Copyright (C) 1996 Paul Mackerras. 15 * 16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and 17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com 18 * 19 * This file contains the low-level support and setup for the 20 * PowerPC-64 platform, including trap and interrupt dispatch. 21 * 22 * This program is free software; you can redistribute it and/or 23 * modify it under the terms of the GNU General Public License 24 * as published by the Free Software Foundation; either version 25 * 2 of the License, or (at your option) any later version. 26 */ 27 /* 28 * The following macros define the code that appears as 29 * the prologue to each of the exception handlers. They 30 * are split into two parts to allow a single kernel binary 31 * to be used for pSeries and iSeries. 32 * 33 * We make as much of the exception code common between native 34 * exception handlers (including pSeries LPAR) and iSeries LPAR 35 * implementations as possible. 36 */ 37 #include <asm/head-64.h> 38 39 /* PACA save area offsets (exgen, exmc, etc) */ 40 #define EX_R9 0 41 #define EX_R10 8 42 #define EX_R11 16 43 #define EX_R12 24 44 #define EX_R13 32 45 #define EX_SRR0 40 46 #define EX_DAR 48 47 #define EX_DSISR 56 48 #define EX_CCR 60 49 #define EX_R3 64 50 #define EX_LR 72 51 #define EX_CFAR 80 52 #define EX_PPR 88 /* SMT thread status register (priority) */ 53 #define EX_CTR 96 54 55 #define EX_SIZE 13 /* size in u64 units */ 56 57 #ifdef CONFIG_RELOCATABLE 58 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 59 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 60 LOAD_HANDLER(r12,label); \ 61 mtctr r12; \ 62 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 63 li r10,MSR_RI; \ 64 mtmsrd r10,1; /* Set RI (EE=0) */ \ 65 bctr; 66 #else 67 /* If not relocatable, we can jump directly -- and save messing with LR */ 68 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 69 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 70 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 71 li r10,MSR_RI; \ 72 mtmsrd r10,1; /* Set RI (EE=0) */ \ 73 b label; 74 #endif 75 #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 76 __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 77 78 /* 79 * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on 80 * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which 81 * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr. 82 */ 83 #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \ 84 EXCEPTION_PROLOG_0(area); \ 85 EXCEPTION_PROLOG_1(area, extra, vec); \ 86 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 87 88 /* 89 * We're short on space and time in the exception prolog, so we can't 90 * use the normal LOAD_REG_IMMEDIATE macro to load the address of label. 91 * Instead we get the base of the kernel from paca->kernelbase and or in the low 92 * part of label. This requires that the label be within 64KB of kernelbase, and 93 * that kernelbase be 64K aligned. 94 */ 95 #define LOAD_HANDLER(reg, label) \ 96 ld reg,PACAKBASE(r13); /* get high part of &label */ \ 97 ori reg,reg,FIXED_SYMBOL_ABS_ADDR(label); 98 99 #define __LOAD_HANDLER(reg, label) \ 100 ld reg,PACAKBASE(r13); \ 101 ori reg,reg,(ABS_ADDR(label))@l; 102 103 /* 104 * Branches from unrelocated code (e.g., interrupts) to labels outside 105 * head-y require >64K offsets. 106 */ 107 #define __LOAD_FAR_HANDLER(reg, label) \ 108 ld reg,PACAKBASE(r13); \ 109 ori reg,reg,(ABS_ADDR(label))@l; \ 110 addis reg,reg,(ABS_ADDR(label))@h; 111 112 /* Exception register prefixes */ 113 #define EXC_HV H 114 #define EXC_STD 115 116 #if defined(CONFIG_RELOCATABLE) 117 /* 118 * If we support interrupts with relocation on AND we're a relocatable kernel, 119 * we need to use CTR to get to the 2nd level handler. So, save/restore it 120 * when required. 121 */ 122 #define SAVE_CTR(reg, area) mfctr reg ; std reg,area+EX_CTR(r13) 123 #define GET_CTR(reg, area) ld reg,area+EX_CTR(r13) 124 #define RESTORE_CTR(reg, area) ld reg,area+EX_CTR(r13) ; mtctr reg 125 #else 126 /* ...else CTR is unused and in register. */ 127 #define SAVE_CTR(reg, area) 128 #define GET_CTR(reg, area) mfctr reg 129 #define RESTORE_CTR(reg, area) 130 #endif 131 132 /* 133 * PPR save/restore macros used in exceptions_64s.S 134 * Used for P7 or later processors 135 */ 136 #define SAVE_PPR(area, ra, rb) \ 137 BEGIN_FTR_SECTION_NESTED(940) \ 138 ld ra,PACACURRENT(r13); \ 139 ld rb,area+EX_PPR(r13); /* Read PPR from paca */ \ 140 std rb,TASKTHREADPPR(ra); \ 141 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940) 142 143 #define RESTORE_PPR_PACA(area, ra) \ 144 BEGIN_FTR_SECTION_NESTED(941) \ 145 ld ra,area+EX_PPR(r13); \ 146 mtspr SPRN_PPR,ra; \ 147 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941) 148 149 /* 150 * Get an SPR into a register if the CPU has the given feature 151 */ 152 #define OPT_GET_SPR(ra, spr, ftr) \ 153 BEGIN_FTR_SECTION_NESTED(943) \ 154 mfspr ra,spr; \ 155 END_FTR_SECTION_NESTED(ftr,ftr,943) 156 157 /* 158 * Set an SPR from a register if the CPU has the given feature 159 */ 160 #define OPT_SET_SPR(ra, spr, ftr) \ 161 BEGIN_FTR_SECTION_NESTED(943) \ 162 mtspr spr,ra; \ 163 END_FTR_SECTION_NESTED(ftr,ftr,943) 164 165 /* 166 * Save a register to the PACA if the CPU has the given feature 167 */ 168 #define OPT_SAVE_REG_TO_PACA(offset, ra, ftr) \ 169 BEGIN_FTR_SECTION_NESTED(943) \ 170 std ra,offset(r13); \ 171 END_FTR_SECTION_NESTED(ftr,ftr,943) 172 173 #define EXCEPTION_PROLOG_0(area) \ 174 GET_PACA(r13); \ 175 std r9,area+EX_R9(r13); /* save r9 */ \ 176 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \ 177 HMT_MEDIUM; \ 178 std r10,area+EX_R10(r13); /* save r10 - r12 */ \ 179 OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR) 180 181 #define __EXCEPTION_PROLOG_1(area, extra, vec) \ 182 OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \ 183 OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \ 184 SAVE_CTR(r10, area); \ 185 mfcr r9; \ 186 extra(vec); \ 187 std r11,area+EX_R11(r13); \ 188 std r12,area+EX_R12(r13); \ 189 GET_SCRATCH0(r10); \ 190 std r10,area+EX_R13(r13) 191 #define EXCEPTION_PROLOG_1(area, extra, vec) \ 192 __EXCEPTION_PROLOG_1(area, extra, vec) 193 194 #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \ 195 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 196 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 197 LOAD_HANDLER(r12,label) \ 198 mtspr SPRN_##h##SRR0,r12; \ 199 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 200 mtspr SPRN_##h##SRR1,r10; \ 201 h##rfid; \ 202 b . /* prevent speculative execution */ 203 #define EXCEPTION_PROLOG_PSERIES_1(label, h) \ 204 __EXCEPTION_PROLOG_PSERIES_1(label, h) 205 206 /* _NORI variant keeps MSR_RI clear */ 207 #define __EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) \ 208 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 209 xori r10,r10,MSR_RI; /* Clear MSR_RI */ \ 210 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 211 LOAD_HANDLER(r12,label) \ 212 mtspr SPRN_##h##SRR0,r12; \ 213 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 214 mtspr SPRN_##h##SRR1,r10; \ 215 h##rfid; \ 216 b . /* prevent speculative execution */ 217 218 #define EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) \ 219 __EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) 220 221 #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \ 222 EXCEPTION_PROLOG_0(area); \ 223 EXCEPTION_PROLOG_1(area, extra, vec); \ 224 EXCEPTION_PROLOG_PSERIES_1(label, h); 225 226 #define __KVMTEST(h, n) \ 227 lbz r10,HSTATE_IN_GUEST(r13); \ 228 cmpwi r10,0; \ 229 bne do_kvm_##h##n 230 231 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 232 /* 233 * If hv is possible, interrupts come into to the hv version 234 * of the kvmppc_interrupt code, which then jumps to the PR handler, 235 * kvmppc_interrupt_pr, if the guest is a PR guest. 236 */ 237 #define kvmppc_interrupt kvmppc_interrupt_hv 238 #else 239 #define kvmppc_interrupt kvmppc_interrupt_pr 240 #endif 241 242 /* 243 * Branch to label using its 0xC000 address. This results in instruction 244 * address suitable for MSR[IR]=0 or 1, which allows relocation to be turned 245 * on using mtmsr rather than rfid. 246 * 247 * This could set the 0xc bits for !RELOCATABLE as an immediate, rather than 248 * load KBASE for a slight optimisation. 249 */ 250 #define BRANCH_TO_C000(reg, label) \ 251 __LOAD_HANDLER(reg, label); \ 252 mtctr reg; \ 253 bctr 254 255 #ifdef CONFIG_RELOCATABLE 256 #define BRANCH_TO_COMMON(reg, label) \ 257 __LOAD_HANDLER(reg, label); \ 258 mtctr reg; \ 259 bctr 260 261 #define BRANCH_LINK_TO_FAR(label) \ 262 __LOAD_FAR_HANDLER(r12, label); \ 263 mtctr r12; \ 264 bctrl 265 266 /* 267 * KVM requires __LOAD_FAR_HANDLER. 268 * 269 * __BRANCH_TO_KVM_EXIT branches are also a special case because they 270 * explicitly use r9 then reload it from PACA before branching. Hence 271 * the double-underscore. 272 */ 273 #define __BRANCH_TO_KVM_EXIT(area, label) \ 274 mfctr r9; \ 275 std r9,HSTATE_SCRATCH1(r13); \ 276 __LOAD_FAR_HANDLER(r9, label); \ 277 mtctr r9; \ 278 ld r9,area+EX_R9(r13); \ 279 bctr 280 281 #else 282 #define BRANCH_TO_COMMON(reg, label) \ 283 b label 284 285 #define BRANCH_LINK_TO_FAR(label) \ 286 bl label 287 288 #define __BRANCH_TO_KVM_EXIT(area, label) \ 289 ld r9,area+EX_R9(r13); \ 290 b label 291 292 #endif 293 294 /* Do not enable RI */ 295 #define EXCEPTION_PROLOG_PSERIES_NORI(area, label, h, extra, vec) \ 296 EXCEPTION_PROLOG_0(area); \ 297 EXCEPTION_PROLOG_1(area, extra, vec); \ 298 EXCEPTION_PROLOG_PSERIES_1_NORI(label, h); 299 300 301 #define __KVM_HANDLER(area, h, n) \ 302 BEGIN_FTR_SECTION_NESTED(947) \ 303 ld r10,area+EX_CFAR(r13); \ 304 std r10,HSTATE_CFAR(r13); \ 305 END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947); \ 306 BEGIN_FTR_SECTION_NESTED(948) \ 307 ld r10,area+EX_PPR(r13); \ 308 std r10,HSTATE_PPR(r13); \ 309 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 310 ld r10,area+EX_R10(r13); \ 311 std r12,HSTATE_SCRATCH0(r13); \ 312 sldi r12,r9,32; \ 313 ori r12,r12,(n); \ 314 /* This reloads r9 before branching to kvmppc_interrupt */ \ 315 __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt) 316 317 #define __KVM_HANDLER_SKIP(area, h, n) \ 318 cmpwi r10,KVM_GUEST_MODE_SKIP; \ 319 beq 89f; \ 320 BEGIN_FTR_SECTION_NESTED(948) \ 321 ld r10,area+EX_PPR(r13); \ 322 std r10,HSTATE_PPR(r13); \ 323 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 324 ld r10,area+EX_R10(r13); \ 325 std r12,HSTATE_SCRATCH0(r13); \ 326 sldi r12,r9,32; \ 327 ori r12,r12,(n); \ 328 /* This reloads r9 before branching to kvmppc_interrupt */ \ 329 __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt); \ 330 89: mtocrf 0x80,r9; \ 331 ld r9,area+EX_R9(r13); \ 332 ld r10,area+EX_R10(r13); \ 333 b kvmppc_skip_##h##interrupt 334 335 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER 336 #define KVMTEST(h, n) __KVMTEST(h, n) 337 #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n) 338 #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n) 339 340 #else 341 #define KVMTEST(h, n) 342 #define KVM_HANDLER(area, h, n) 343 #define KVM_HANDLER_SKIP(area, h, n) 344 #endif 345 346 #define NOTEST(n) 347 348 #define EXCEPTION_PROLOG_COMMON_1() \ 349 std r9,_CCR(r1); /* save CR in stackframe */ \ 350 std r11,_NIP(r1); /* save SRR0 in stackframe */ \ 351 std r12,_MSR(r1); /* save SRR1 in stackframe */ \ 352 std r10,0(r1); /* make stack chain pointer */ \ 353 std r0,GPR0(r1); /* save r0 in stackframe */ \ 354 std r10,GPR1(r1); /* save r1 in stackframe */ \ 355 356 357 /* 358 * The common exception prolog is used for all except a few exceptions 359 * such as a segment miss on a kernel address. We have to be prepared 360 * to take another exception from the point where we first touch the 361 * kernel stack onwards. 362 * 363 * On entry r13 points to the paca, r9-r13 are saved in the paca, 364 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and 365 * SRR1, and relocation is on. 366 */ 367 #define EXCEPTION_PROLOG_COMMON(n, area) \ 368 andi. r10,r12,MSR_PR; /* See if coming from user */ \ 369 mr r10,r1; /* Save r1 */ \ 370 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \ 371 beq- 1f; \ 372 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \ 373 1: cmpdi cr1,r1,-INT_FRAME_SIZE; /* check if r1 is in userspace */ \ 374 blt+ cr1,3f; /* abort if it is */ \ 375 li r1,(n); /* will be reloaded later */ \ 376 sth r1,PACA_TRAP_SAVE(r13); \ 377 std r3,area+EX_R3(r13); \ 378 addi r3,r13,area; /* r3 -> where regs are saved*/ \ 379 RESTORE_CTR(r1, area); \ 380 b bad_stack; \ 381 3: EXCEPTION_PROLOG_COMMON_1(); \ 382 beq 4f; /* if from kernel mode */ \ 383 ACCOUNT_CPU_USER_ENTRY(r13, r9, r10); \ 384 SAVE_PPR(area, r9, r10); \ 385 4: EXCEPTION_PROLOG_COMMON_2(area) \ 386 EXCEPTION_PROLOG_COMMON_3(n) \ 387 ACCOUNT_STOLEN_TIME 388 389 /* Save original regs values from save area to stack frame. */ 390 #define EXCEPTION_PROLOG_COMMON_2(area) \ 391 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \ 392 ld r10,area+EX_R10(r13); \ 393 std r9,GPR9(r1); \ 394 std r10,GPR10(r1); \ 395 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \ 396 ld r10,area+EX_R12(r13); \ 397 ld r11,area+EX_R13(r13); \ 398 std r9,GPR11(r1); \ 399 std r10,GPR12(r1); \ 400 std r11,GPR13(r1); \ 401 BEGIN_FTR_SECTION_NESTED(66); \ 402 ld r10,area+EX_CFAR(r13); \ 403 std r10,ORIG_GPR3(r1); \ 404 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \ 405 GET_CTR(r10, area); \ 406 std r10,_CTR(r1); 407 408 #define EXCEPTION_PROLOG_COMMON_3(n) \ 409 std r2,GPR2(r1); /* save r2 in stackframe */ \ 410 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \ 411 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \ 412 mflr r9; /* Get LR, later save to stack */ \ 413 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \ 414 std r9,_LINK(r1); \ 415 lbz r10,PACASOFTIRQEN(r13); \ 416 mfspr r11,SPRN_XER; /* save XER in stackframe */ \ 417 std r10,SOFTE(r1); \ 418 std r11,_XER(r1); \ 419 li r9,(n)+1; \ 420 std r9,_TRAP(r1); /* set trap number */ \ 421 li r10,0; \ 422 ld r11,exception_marker@toc(r2); \ 423 std r10,RESULT(r1); /* clear regs->result */ \ 424 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ 425 426 /* 427 * Exception vectors. 428 */ 429 #define STD_EXCEPTION_PSERIES(vec, label) \ 430 SET_SCRATCH0(r13); /* save r13 */ \ 431 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \ 432 EXC_STD, KVMTEST_PR, vec); \ 433 434 /* Version of above for when we have to branch out-of-line */ 435 #define __OOL_EXCEPTION(vec, label, hdlr) \ 436 SET_SCRATCH0(r13) \ 437 EXCEPTION_PROLOG_0(PACA_EXGEN) \ 438 b hdlr; 439 440 #define STD_EXCEPTION_PSERIES_OOL(vec, label) \ 441 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \ 442 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD) 443 444 #define STD_EXCEPTION_HV(loc, vec, label) \ 445 SET_SCRATCH0(r13); /* save r13 */ \ 446 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \ 447 EXC_HV, KVMTEST_HV, vec); 448 449 #define STD_EXCEPTION_HV_OOL(vec, label) \ 450 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \ 451 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) 452 453 #define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 454 /* No guest interrupts come through here */ \ 455 SET_SCRATCH0(r13); /* save r13 */ \ 456 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, EXC_STD, NOTEST, vec); 457 458 #define STD_RELON_EXCEPTION_PSERIES_OOL(vec, label) \ 459 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \ 460 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_STD) 461 462 #define STD_RELON_EXCEPTION_HV(loc, vec, label) \ 463 SET_SCRATCH0(r13); /* save r13 */ \ 464 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, \ 465 EXC_HV, KVMTEST_HV, vec); 466 467 #define STD_RELON_EXCEPTION_HV_OOL(vec, label) \ 468 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \ 469 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV) 470 471 /* This associate vector numbers with bits in paca->irq_happened */ 472 #define SOFTEN_VALUE_0x500 PACA_IRQ_EE 473 #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC 474 #define SOFTEN_VALUE_0x980 PACA_IRQ_DEC 475 #define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL 476 #define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL 477 #define SOFTEN_VALUE_0xe60 PACA_IRQ_HMI 478 #define SOFTEN_VALUE_0xea0 PACA_IRQ_EE 479 480 #define __SOFTEN_TEST(h, vec) \ 481 lbz r10,PACASOFTIRQEN(r13); \ 482 cmpwi r10,0; \ 483 li r10,SOFTEN_VALUE_##vec; \ 484 beq masked_##h##interrupt 485 486 #define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec) 487 488 #define SOFTEN_TEST_PR(vec) \ 489 KVMTEST(EXC_STD, vec); \ 490 _SOFTEN_TEST(EXC_STD, vec) 491 492 #define SOFTEN_TEST_HV(vec) \ 493 KVMTEST(EXC_HV, vec); \ 494 _SOFTEN_TEST(EXC_HV, vec) 495 496 #define KVMTEST_PR(vec) \ 497 KVMTEST(EXC_STD, vec) 498 499 #define KVMTEST_HV(vec) \ 500 KVMTEST(EXC_HV, vec) 501 502 #define SOFTEN_NOTEST_PR(vec) _SOFTEN_TEST(EXC_STD, vec) 503 #define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec) 504 505 #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 506 SET_SCRATCH0(r13); /* save r13 */ \ 507 EXCEPTION_PROLOG_0(PACA_EXGEN); \ 508 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 509 EXCEPTION_PROLOG_PSERIES_1(label, h); 510 511 #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 512 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) 513 514 #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \ 515 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 516 EXC_STD, SOFTEN_TEST_PR) 517 518 #define MASKABLE_EXCEPTION_PSERIES_OOL(vec, label) \ 519 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, vec); \ 520 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD) 521 522 #define MASKABLE_EXCEPTION_HV(loc, vec, label) \ 523 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 524 EXC_HV, SOFTEN_TEST_HV) 525 526 #define MASKABLE_EXCEPTION_HV_OOL(vec, label) \ 527 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \ 528 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) 529 530 #define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 531 SET_SCRATCH0(r13); /* save r13 */ \ 532 EXCEPTION_PROLOG_0(PACA_EXGEN); \ 533 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 534 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 535 536 #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 537 __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) 538 539 #define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 540 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 541 EXC_STD, SOFTEN_NOTEST_PR) 542 543 #define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label) \ 544 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 545 EXC_HV, SOFTEN_TEST_HV) 546 547 #define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label) \ 548 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \ 549 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV) 550 551 /* 552 * Our exception common code can be passed various "additions" 553 * to specify the behaviour of interrupts, whether to kick the 554 * runlatch, etc... 555 */ 556 557 /* 558 * This addition reconciles our actual IRQ state with the various software 559 * flags that track it. This may call C code. 560 */ 561 #define ADD_RECONCILE RECONCILE_IRQ_STATE(r10,r11) 562 563 #define ADD_NVGPRS \ 564 bl save_nvgprs 565 566 #define RUNLATCH_ON \ 567 BEGIN_FTR_SECTION \ 568 CURRENT_THREAD_INFO(r3, r1); \ 569 ld r4,TI_LOCAL_FLAGS(r3); \ 570 andi. r0,r4,_TLF_RUNLATCH; \ 571 beql ppc64_runlatch_on_trampoline; \ 572 END_FTR_SECTION_IFSET(CPU_FTR_CTRL) 573 574 #define EXCEPTION_COMMON(area, trap, label, hdlr, ret, additions) \ 575 EXCEPTION_PROLOG_COMMON(trap, area); \ 576 /* Volatile regs are potentially clobbered here */ \ 577 additions; \ 578 addi r3,r1,STACK_FRAME_OVERHEAD; \ 579 bl hdlr; \ 580 b ret 581 582 /* 583 * Exception where stack is already set in r1, r1 is saved in r10, and it 584 * continues rather than returns. 585 */ 586 #define EXCEPTION_COMMON_NORET_STACK(area, trap, label, hdlr, additions) \ 587 EXCEPTION_PROLOG_COMMON_1(); \ 588 EXCEPTION_PROLOG_COMMON_2(area); \ 589 EXCEPTION_PROLOG_COMMON_3(trap); \ 590 /* Volatile regs are potentially clobbered here */ \ 591 additions; \ 592 addi r3,r1,STACK_FRAME_OVERHEAD; \ 593 bl hdlr 594 595 #define STD_EXCEPTION_COMMON(trap, label, hdlr) \ 596 EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr, \ 597 ret_from_except, ADD_NVGPRS;ADD_RECONCILE) 598 599 /* 600 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur 601 * in the idle task and therefore need the special idle handling 602 * (finish nap and runlatch) 603 */ 604 #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \ 605 EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr, \ 606 ret_from_except_lite, FINISH_NAP;ADD_RECONCILE;RUNLATCH_ON) 607 608 /* 609 * When the idle code in power4_idle puts the CPU into NAP mode, 610 * it has to do so in a loop, and relies on the external interrupt 611 * and decrementer interrupt entry code to get it out of the loop. 612 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags 613 * to signal that it is in the loop and needs help to get out. 614 */ 615 #ifdef CONFIG_PPC_970_NAP 616 #define FINISH_NAP \ 617 BEGIN_FTR_SECTION \ 618 CURRENT_THREAD_INFO(r11, r1); \ 619 ld r9,TI_LOCAL_FLAGS(r11); \ 620 andi. r10,r9,_TLF_NAPPING; \ 621 bnel power4_fixup_nap; \ 622 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) 623 #else 624 #define FINISH_NAP 625 #endif 626 627 #endif /* _ASM_POWERPC_EXCEPTION_H */ 628