1 #ifndef _ASM_POWERPC_EXCEPTION_H 2 #define _ASM_POWERPC_EXCEPTION_H 3 /* 4 * Extracted from head_64.S 5 * 6 * PowerPC version 7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 8 * 9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP 10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> 11 * Adapted for Power Macintosh by Paul Mackerras. 12 * Low-level exception handlers and MMU support 13 * rewritten by Paul Mackerras. 14 * Copyright (C) 1996 Paul Mackerras. 15 * 16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and 17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com 18 * 19 * This file contains the low-level support and setup for the 20 * PowerPC-64 platform, including trap and interrupt dispatch. 21 * 22 * This program is free software; you can redistribute it and/or 23 * modify it under the terms of the GNU General Public License 24 * as published by the Free Software Foundation; either version 25 * 2 of the License, or (at your option) any later version. 26 */ 27 /* 28 * The following macros define the code that appears as 29 * the prologue to each of the exception handlers. They 30 * are split into two parts to allow a single kernel binary 31 * to be used for pSeries and iSeries. 32 * 33 * We make as much of the exception code common between native 34 * exception handlers (including pSeries LPAR) and iSeries LPAR 35 * implementations as possible. 36 */ 37 #include <asm/head-64.h> 38 39 /* PACA save area offsets (exgen, exmc, etc) */ 40 #define EX_R9 0 41 #define EX_R10 8 42 #define EX_R11 16 43 #define EX_R12 24 44 #define EX_R13 32 45 #define EX_DAR 40 46 #define EX_DSISR 48 47 #define EX_CCR 52 48 #define EX_CFAR 56 49 #define EX_PPR 64 50 #if defined(CONFIG_RELOCATABLE) 51 #define EX_CTR 72 52 #define EX_SIZE 10 /* size in u64 units */ 53 #else 54 #define EX_SIZE 9 /* size in u64 units */ 55 #endif 56 57 /* 58 * EX_LR is only used in EXSLB and where it does not overlap with EX_DAR 59 * EX_CCR similarly with DSISR, but being 4 byte registers there is a hole 60 * in the save area so it's not necessary to overlap them. Could be used 61 * for future savings though if another 4 byte register was to be saved. 62 */ 63 #define EX_LR EX_DAR 64 65 /* 66 * EX_R3 is only used by the bad_stack handler. bad_stack reloads and 67 * saves DAR from SPRN_DAR, and EX_DAR is not used. So EX_R3 can overlap 68 * with EX_DAR. 69 */ 70 #define EX_R3 EX_DAR 71 72 #ifdef CONFIG_RELOCATABLE 73 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 74 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 75 LOAD_HANDLER(r12,label); \ 76 mtctr r12; \ 77 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 78 li r10,MSR_RI; \ 79 mtmsrd r10,1; /* Set RI (EE=0) */ \ 80 bctr; 81 #else 82 /* If not relocatable, we can jump directly -- and save messing with LR */ 83 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 84 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 85 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 86 li r10,MSR_RI; \ 87 mtmsrd r10,1; /* Set RI (EE=0) */ \ 88 b label; 89 #endif 90 #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 91 __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 92 93 /* 94 * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on 95 * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which 96 * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr. 97 */ 98 #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \ 99 EXCEPTION_PROLOG_0(area); \ 100 EXCEPTION_PROLOG_1(area, extra, vec); \ 101 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 102 103 /* 104 * We're short on space and time in the exception prolog, so we can't 105 * use the normal LOAD_REG_IMMEDIATE macro to load the address of label. 106 * Instead we get the base of the kernel from paca->kernelbase and or in the low 107 * part of label. This requires that the label be within 64KB of kernelbase, and 108 * that kernelbase be 64K aligned. 109 */ 110 #define LOAD_HANDLER(reg, label) \ 111 ld reg,PACAKBASE(r13); /* get high part of &label */ \ 112 ori reg,reg,FIXED_SYMBOL_ABS_ADDR(label); 113 114 #define __LOAD_HANDLER(reg, label) \ 115 ld reg,PACAKBASE(r13); \ 116 ori reg,reg,(ABS_ADDR(label))@l; 117 118 /* 119 * Branches from unrelocated code (e.g., interrupts) to labels outside 120 * head-y require >64K offsets. 121 */ 122 #define __LOAD_FAR_HANDLER(reg, label) \ 123 ld reg,PACAKBASE(r13); \ 124 ori reg,reg,(ABS_ADDR(label))@l; \ 125 addis reg,reg,(ABS_ADDR(label))@h; 126 127 /* Exception register prefixes */ 128 #define EXC_HV H 129 #define EXC_STD 130 131 #if defined(CONFIG_RELOCATABLE) 132 /* 133 * If we support interrupts with relocation on AND we're a relocatable kernel, 134 * we need to use CTR to get to the 2nd level handler. So, save/restore it 135 * when required. 136 */ 137 #define SAVE_CTR(reg, area) mfctr reg ; std reg,area+EX_CTR(r13) 138 #define GET_CTR(reg, area) ld reg,area+EX_CTR(r13) 139 #define RESTORE_CTR(reg, area) ld reg,area+EX_CTR(r13) ; mtctr reg 140 #else 141 /* ...else CTR is unused and in register. */ 142 #define SAVE_CTR(reg, area) 143 #define GET_CTR(reg, area) mfctr reg 144 #define RESTORE_CTR(reg, area) 145 #endif 146 147 /* 148 * PPR save/restore macros used in exceptions_64s.S 149 * Used for P7 or later processors 150 */ 151 #define SAVE_PPR(area, ra, rb) \ 152 BEGIN_FTR_SECTION_NESTED(940) \ 153 ld ra,PACACURRENT(r13); \ 154 ld rb,area+EX_PPR(r13); /* Read PPR from paca */ \ 155 std rb,TASKTHREADPPR(ra); \ 156 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940) 157 158 #define RESTORE_PPR_PACA(area, ra) \ 159 BEGIN_FTR_SECTION_NESTED(941) \ 160 ld ra,area+EX_PPR(r13); \ 161 mtspr SPRN_PPR,ra; \ 162 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941) 163 164 /* 165 * Get an SPR into a register if the CPU has the given feature 166 */ 167 #define OPT_GET_SPR(ra, spr, ftr) \ 168 BEGIN_FTR_SECTION_NESTED(943) \ 169 mfspr ra,spr; \ 170 END_FTR_SECTION_NESTED(ftr,ftr,943) 171 172 /* 173 * Set an SPR from a register if the CPU has the given feature 174 */ 175 #define OPT_SET_SPR(ra, spr, ftr) \ 176 BEGIN_FTR_SECTION_NESTED(943) \ 177 mtspr spr,ra; \ 178 END_FTR_SECTION_NESTED(ftr,ftr,943) 179 180 /* 181 * Save a register to the PACA if the CPU has the given feature 182 */ 183 #define OPT_SAVE_REG_TO_PACA(offset, ra, ftr) \ 184 BEGIN_FTR_SECTION_NESTED(943) \ 185 std ra,offset(r13); \ 186 END_FTR_SECTION_NESTED(ftr,ftr,943) 187 188 #define EXCEPTION_PROLOG_0(area) \ 189 GET_PACA(r13); \ 190 std r9,area+EX_R9(r13); /* save r9 */ \ 191 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \ 192 HMT_MEDIUM; \ 193 std r10,area+EX_R10(r13); /* save r10 - r12 */ \ 194 OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR) 195 196 #define __EXCEPTION_PROLOG_1(area, extra, vec) \ 197 OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \ 198 OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \ 199 SAVE_CTR(r10, area); \ 200 mfcr r9; \ 201 extra(vec); \ 202 std r11,area+EX_R11(r13); \ 203 std r12,area+EX_R12(r13); \ 204 GET_SCRATCH0(r10); \ 205 std r10,area+EX_R13(r13) 206 #define EXCEPTION_PROLOG_1(area, extra, vec) \ 207 __EXCEPTION_PROLOG_1(area, extra, vec) 208 209 #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \ 210 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 211 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 212 LOAD_HANDLER(r12,label) \ 213 mtspr SPRN_##h##SRR0,r12; \ 214 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 215 mtspr SPRN_##h##SRR1,r10; \ 216 h##rfid; \ 217 b . /* prevent speculative execution */ 218 #define EXCEPTION_PROLOG_PSERIES_1(label, h) \ 219 __EXCEPTION_PROLOG_PSERIES_1(label, h) 220 221 /* _NORI variant keeps MSR_RI clear */ 222 #define __EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) \ 223 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 224 xori r10,r10,MSR_RI; /* Clear MSR_RI */ \ 225 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 226 LOAD_HANDLER(r12,label) \ 227 mtspr SPRN_##h##SRR0,r12; \ 228 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 229 mtspr SPRN_##h##SRR1,r10; \ 230 h##rfid; \ 231 b . /* prevent speculative execution */ 232 233 #define EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) \ 234 __EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) 235 236 #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \ 237 EXCEPTION_PROLOG_0(area); \ 238 EXCEPTION_PROLOG_1(area, extra, vec); \ 239 EXCEPTION_PROLOG_PSERIES_1(label, h); 240 241 #define __KVMTEST(h, n) \ 242 lbz r10,HSTATE_IN_GUEST(r13); \ 243 cmpwi r10,0; \ 244 bne do_kvm_##h##n 245 246 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 247 /* 248 * If hv is possible, interrupts come into to the hv version 249 * of the kvmppc_interrupt code, which then jumps to the PR handler, 250 * kvmppc_interrupt_pr, if the guest is a PR guest. 251 */ 252 #define kvmppc_interrupt kvmppc_interrupt_hv 253 #else 254 #define kvmppc_interrupt kvmppc_interrupt_pr 255 #endif 256 257 /* 258 * Branch to label using its 0xC000 address. This results in instruction 259 * address suitable for MSR[IR]=0 or 1, which allows relocation to be turned 260 * on using mtmsr rather than rfid. 261 * 262 * This could set the 0xc bits for !RELOCATABLE as an immediate, rather than 263 * load KBASE for a slight optimisation. 264 */ 265 #define BRANCH_TO_C000(reg, label) \ 266 __LOAD_HANDLER(reg, label); \ 267 mtctr reg; \ 268 bctr 269 270 #ifdef CONFIG_RELOCATABLE 271 #define BRANCH_TO_COMMON(reg, label) \ 272 __LOAD_HANDLER(reg, label); \ 273 mtctr reg; \ 274 bctr 275 276 #define BRANCH_LINK_TO_FAR(label) \ 277 __LOAD_FAR_HANDLER(r12, label); \ 278 mtctr r12; \ 279 bctrl 280 281 /* 282 * KVM requires __LOAD_FAR_HANDLER. 283 * 284 * __BRANCH_TO_KVM_EXIT branches are also a special case because they 285 * explicitly use r9 then reload it from PACA before branching. Hence 286 * the double-underscore. 287 */ 288 #define __BRANCH_TO_KVM_EXIT(area, label) \ 289 mfctr r9; \ 290 std r9,HSTATE_SCRATCH1(r13); \ 291 __LOAD_FAR_HANDLER(r9, label); \ 292 mtctr r9; \ 293 ld r9,area+EX_R9(r13); \ 294 bctr 295 296 #else 297 #define BRANCH_TO_COMMON(reg, label) \ 298 b label 299 300 #define BRANCH_LINK_TO_FAR(label) \ 301 bl label 302 303 #define __BRANCH_TO_KVM_EXIT(area, label) \ 304 ld r9,area+EX_R9(r13); \ 305 b label 306 307 #endif 308 309 /* Do not enable RI */ 310 #define EXCEPTION_PROLOG_PSERIES_NORI(area, label, h, extra, vec) \ 311 EXCEPTION_PROLOG_0(area); \ 312 EXCEPTION_PROLOG_1(area, extra, vec); \ 313 EXCEPTION_PROLOG_PSERIES_1_NORI(label, h); 314 315 316 #define __KVM_HANDLER(area, h, n) \ 317 BEGIN_FTR_SECTION_NESTED(947) \ 318 ld r10,area+EX_CFAR(r13); \ 319 std r10,HSTATE_CFAR(r13); \ 320 END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947); \ 321 BEGIN_FTR_SECTION_NESTED(948) \ 322 ld r10,area+EX_PPR(r13); \ 323 std r10,HSTATE_PPR(r13); \ 324 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 325 ld r10,area+EX_R10(r13); \ 326 std r12,HSTATE_SCRATCH0(r13); \ 327 sldi r12,r9,32; \ 328 ori r12,r12,(n); \ 329 /* This reloads r9 before branching to kvmppc_interrupt */ \ 330 __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt) 331 332 #define __KVM_HANDLER_SKIP(area, h, n) \ 333 cmpwi r10,KVM_GUEST_MODE_SKIP; \ 334 beq 89f; \ 335 BEGIN_FTR_SECTION_NESTED(948) \ 336 ld r10,area+EX_PPR(r13); \ 337 std r10,HSTATE_PPR(r13); \ 338 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 339 ld r10,area+EX_R10(r13); \ 340 std r12,HSTATE_SCRATCH0(r13); \ 341 sldi r12,r9,32; \ 342 ori r12,r12,(n); \ 343 /* This reloads r9 before branching to kvmppc_interrupt */ \ 344 __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt); \ 345 89: mtocrf 0x80,r9; \ 346 ld r9,area+EX_R9(r13); \ 347 ld r10,area+EX_R10(r13); \ 348 b kvmppc_skip_##h##interrupt 349 350 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER 351 #define KVMTEST(h, n) __KVMTEST(h, n) 352 #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n) 353 #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n) 354 355 #else 356 #define KVMTEST(h, n) 357 #define KVM_HANDLER(area, h, n) 358 #define KVM_HANDLER_SKIP(area, h, n) 359 #endif 360 361 #define NOTEST(n) 362 363 #define EXCEPTION_PROLOG_COMMON_1() \ 364 std r9,_CCR(r1); /* save CR in stackframe */ \ 365 std r11,_NIP(r1); /* save SRR0 in stackframe */ \ 366 std r12,_MSR(r1); /* save SRR1 in stackframe */ \ 367 std r10,0(r1); /* make stack chain pointer */ \ 368 std r0,GPR0(r1); /* save r0 in stackframe */ \ 369 std r10,GPR1(r1); /* save r1 in stackframe */ \ 370 371 372 /* 373 * The common exception prolog is used for all except a few exceptions 374 * such as a segment miss on a kernel address. We have to be prepared 375 * to take another exception from the point where we first touch the 376 * kernel stack onwards. 377 * 378 * On entry r13 points to the paca, r9-r13 are saved in the paca, 379 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and 380 * SRR1, and relocation is on. 381 */ 382 #define EXCEPTION_PROLOG_COMMON(n, area) \ 383 andi. r10,r12,MSR_PR; /* See if coming from user */ \ 384 mr r10,r1; /* Save r1 */ \ 385 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \ 386 beq- 1f; \ 387 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \ 388 1: cmpdi cr1,r1,-INT_FRAME_SIZE; /* check if r1 is in userspace */ \ 389 blt+ cr1,3f; /* abort if it is */ \ 390 li r1,(n); /* will be reloaded later */ \ 391 sth r1,PACA_TRAP_SAVE(r13); \ 392 std r3,area+EX_R3(r13); \ 393 addi r3,r13,area; /* r3 -> where regs are saved*/ \ 394 RESTORE_CTR(r1, area); \ 395 b bad_stack; \ 396 3: EXCEPTION_PROLOG_COMMON_1(); \ 397 beq 4f; /* if from kernel mode */ \ 398 ACCOUNT_CPU_USER_ENTRY(r13, r9, r10); \ 399 SAVE_PPR(area, r9, r10); \ 400 4: EXCEPTION_PROLOG_COMMON_2(area) \ 401 EXCEPTION_PROLOG_COMMON_3(n) \ 402 ACCOUNT_STOLEN_TIME 403 404 /* Save original regs values from save area to stack frame. */ 405 #define EXCEPTION_PROLOG_COMMON_2(area) \ 406 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \ 407 ld r10,area+EX_R10(r13); \ 408 std r9,GPR9(r1); \ 409 std r10,GPR10(r1); \ 410 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \ 411 ld r10,area+EX_R12(r13); \ 412 ld r11,area+EX_R13(r13); \ 413 std r9,GPR11(r1); \ 414 std r10,GPR12(r1); \ 415 std r11,GPR13(r1); \ 416 BEGIN_FTR_SECTION_NESTED(66); \ 417 ld r10,area+EX_CFAR(r13); \ 418 std r10,ORIG_GPR3(r1); \ 419 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \ 420 GET_CTR(r10, area); \ 421 std r10,_CTR(r1); 422 423 #define EXCEPTION_PROLOG_COMMON_3(n) \ 424 std r2,GPR2(r1); /* save r2 in stackframe */ \ 425 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \ 426 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \ 427 mflr r9; /* Get LR, later save to stack */ \ 428 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \ 429 std r9,_LINK(r1); \ 430 lbz r10,PACASOFTIRQEN(r13); \ 431 mfspr r11,SPRN_XER; /* save XER in stackframe */ \ 432 std r10,SOFTE(r1); \ 433 std r11,_XER(r1); \ 434 li r9,(n)+1; \ 435 std r9,_TRAP(r1); /* set trap number */ \ 436 li r10,0; \ 437 ld r11,exception_marker@toc(r2); \ 438 std r10,RESULT(r1); /* clear regs->result */ \ 439 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ 440 441 /* 442 * Exception vectors. 443 */ 444 #define STD_EXCEPTION_PSERIES(vec, label) \ 445 SET_SCRATCH0(r13); /* save r13 */ \ 446 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \ 447 EXC_STD, KVMTEST_PR, vec); \ 448 449 /* Version of above for when we have to branch out-of-line */ 450 #define __OOL_EXCEPTION(vec, label, hdlr) \ 451 SET_SCRATCH0(r13) \ 452 EXCEPTION_PROLOG_0(PACA_EXGEN) \ 453 b hdlr; 454 455 #define STD_EXCEPTION_PSERIES_OOL(vec, label) \ 456 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \ 457 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD) 458 459 #define STD_EXCEPTION_HV(loc, vec, label) \ 460 SET_SCRATCH0(r13); /* save r13 */ \ 461 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \ 462 EXC_HV, KVMTEST_HV, vec); 463 464 #define STD_EXCEPTION_HV_OOL(vec, label) \ 465 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \ 466 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) 467 468 #define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 469 /* No guest interrupts come through here */ \ 470 SET_SCRATCH0(r13); /* save r13 */ \ 471 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, EXC_STD, NOTEST, vec); 472 473 #define STD_RELON_EXCEPTION_PSERIES_OOL(vec, label) \ 474 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \ 475 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_STD) 476 477 #define STD_RELON_EXCEPTION_HV(loc, vec, label) \ 478 SET_SCRATCH0(r13); /* save r13 */ \ 479 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, \ 480 EXC_HV, KVMTEST_HV, vec); 481 482 #define STD_RELON_EXCEPTION_HV_OOL(vec, label) \ 483 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \ 484 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV) 485 486 /* This associate vector numbers with bits in paca->irq_happened */ 487 #define SOFTEN_VALUE_0x500 PACA_IRQ_EE 488 #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC 489 #define SOFTEN_VALUE_0x980 PACA_IRQ_DEC 490 #define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL 491 #define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL 492 #define SOFTEN_VALUE_0xe60 PACA_IRQ_HMI 493 #define SOFTEN_VALUE_0xea0 PACA_IRQ_EE 494 495 #define __SOFTEN_TEST(h, vec) \ 496 lbz r10,PACASOFTIRQEN(r13); \ 497 cmpwi r10,0; \ 498 li r10,SOFTEN_VALUE_##vec; \ 499 beq masked_##h##interrupt 500 501 #define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec) 502 503 #define SOFTEN_TEST_PR(vec) \ 504 KVMTEST(EXC_STD, vec); \ 505 _SOFTEN_TEST(EXC_STD, vec) 506 507 #define SOFTEN_TEST_HV(vec) \ 508 KVMTEST(EXC_HV, vec); \ 509 _SOFTEN_TEST(EXC_HV, vec) 510 511 #define KVMTEST_PR(vec) \ 512 KVMTEST(EXC_STD, vec) 513 514 #define KVMTEST_HV(vec) \ 515 KVMTEST(EXC_HV, vec) 516 517 #define SOFTEN_NOTEST_PR(vec) _SOFTEN_TEST(EXC_STD, vec) 518 #define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec) 519 520 #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 521 SET_SCRATCH0(r13); /* save r13 */ \ 522 EXCEPTION_PROLOG_0(PACA_EXGEN); \ 523 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 524 EXCEPTION_PROLOG_PSERIES_1(label, h); 525 526 #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 527 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) 528 529 #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \ 530 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 531 EXC_STD, SOFTEN_TEST_PR) 532 533 #define MASKABLE_EXCEPTION_PSERIES_OOL(vec, label) \ 534 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, vec); \ 535 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD) 536 537 #define MASKABLE_EXCEPTION_HV(loc, vec, label) \ 538 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 539 EXC_HV, SOFTEN_TEST_HV) 540 541 #define MASKABLE_EXCEPTION_HV_OOL(vec, label) \ 542 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \ 543 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) 544 545 #define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 546 SET_SCRATCH0(r13); /* save r13 */ \ 547 EXCEPTION_PROLOG_0(PACA_EXGEN); \ 548 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 549 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 550 551 #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 552 __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) 553 554 #define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 555 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 556 EXC_STD, SOFTEN_NOTEST_PR) 557 558 #define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label) \ 559 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 560 EXC_HV, SOFTEN_TEST_HV) 561 562 #define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label) \ 563 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \ 564 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV) 565 566 /* 567 * Our exception common code can be passed various "additions" 568 * to specify the behaviour of interrupts, whether to kick the 569 * runlatch, etc... 570 */ 571 572 /* 573 * This addition reconciles our actual IRQ state with the various software 574 * flags that track it. This may call C code. 575 */ 576 #define ADD_RECONCILE RECONCILE_IRQ_STATE(r10,r11) 577 578 #define ADD_NVGPRS \ 579 bl save_nvgprs 580 581 #define RUNLATCH_ON \ 582 BEGIN_FTR_SECTION \ 583 CURRENT_THREAD_INFO(r3, r1); \ 584 ld r4,TI_LOCAL_FLAGS(r3); \ 585 andi. r0,r4,_TLF_RUNLATCH; \ 586 beql ppc64_runlatch_on_trampoline; \ 587 END_FTR_SECTION_IFSET(CPU_FTR_CTRL) 588 589 #define EXCEPTION_COMMON(area, trap, label, hdlr, ret, additions) \ 590 EXCEPTION_PROLOG_COMMON(trap, area); \ 591 /* Volatile regs are potentially clobbered here */ \ 592 additions; \ 593 addi r3,r1,STACK_FRAME_OVERHEAD; \ 594 bl hdlr; \ 595 b ret 596 597 /* 598 * Exception where stack is already set in r1, r1 is saved in r10, and it 599 * continues rather than returns. 600 */ 601 #define EXCEPTION_COMMON_NORET_STACK(area, trap, label, hdlr, additions) \ 602 EXCEPTION_PROLOG_COMMON_1(); \ 603 EXCEPTION_PROLOG_COMMON_2(area); \ 604 EXCEPTION_PROLOG_COMMON_3(trap); \ 605 /* Volatile regs are potentially clobbered here */ \ 606 additions; \ 607 addi r3,r1,STACK_FRAME_OVERHEAD; \ 608 bl hdlr 609 610 #define STD_EXCEPTION_COMMON(trap, label, hdlr) \ 611 EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr, \ 612 ret_from_except, ADD_NVGPRS;ADD_RECONCILE) 613 614 /* 615 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur 616 * in the idle task and therefore need the special idle handling 617 * (finish nap and runlatch) 618 */ 619 #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \ 620 EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr, \ 621 ret_from_except_lite, FINISH_NAP;ADD_RECONCILE;RUNLATCH_ON) 622 623 /* 624 * When the idle code in power4_idle puts the CPU into NAP mode, 625 * it has to do so in a loop, and relies on the external interrupt 626 * and decrementer interrupt entry code to get it out of the loop. 627 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags 628 * to signal that it is in the loop and needs help to get out. 629 */ 630 #ifdef CONFIG_PPC_970_NAP 631 #define FINISH_NAP \ 632 BEGIN_FTR_SECTION \ 633 CURRENT_THREAD_INFO(r11, r1); \ 634 ld r9,TI_LOCAL_FLAGS(r11); \ 635 andi. r10,r9,_TLF_NAPPING; \ 636 bnel power4_fixup_nap; \ 637 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) 638 #else 639 #define FINISH_NAP 640 #endif 641 642 #endif /* _ASM_POWERPC_EXCEPTION_H */ 643