1 #ifndef _ASM_POWERPC_EXCEPTION_H 2 #define _ASM_POWERPC_EXCEPTION_H 3 /* 4 * Extracted from head_64.S 5 * 6 * PowerPC version 7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 8 * 9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP 10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> 11 * Adapted for Power Macintosh by Paul Mackerras. 12 * Low-level exception handlers and MMU support 13 * rewritten by Paul Mackerras. 14 * Copyright (C) 1996 Paul Mackerras. 15 * 16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and 17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com 18 * 19 * This file contains the low-level support and setup for the 20 * PowerPC-64 platform, including trap and interrupt dispatch. 21 * 22 * This program is free software; you can redistribute it and/or 23 * modify it under the terms of the GNU General Public License 24 * as published by the Free Software Foundation; either version 25 * 2 of the License, or (at your option) any later version. 26 */ 27 /* 28 * The following macros define the code that appears as 29 * the prologue to each of the exception handlers. They 30 * are split into two parts to allow a single kernel binary 31 * to be used for pSeries and iSeries. 32 * 33 * We make as much of the exception code common between native 34 * exception handlers (including pSeries LPAR) and iSeries LPAR 35 * implementations as possible. 36 */ 37 38 #define EX_R9 0 39 #define EX_R10 8 40 #define EX_R11 16 41 #define EX_R12 24 42 #define EX_R13 32 43 #define EX_SRR0 40 44 #define EX_DAR 48 45 #define EX_DSISR 56 46 #define EX_CCR 60 47 #define EX_R3 64 48 #define EX_LR 72 49 #define EX_CFAR 80 50 51 #ifdef CONFIG_RELOCATABLE 52 #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 53 ld r12,PACAKBASE(r13); /* get high part of &label */ \ 54 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 55 LOAD_HANDLER(r12,label); \ 56 mtlr r12; \ 57 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 58 li r10,MSR_RI; \ 59 mtmsrd r10,1; /* Set RI (EE=0) */ \ 60 blr; 61 #else 62 /* If not relocatable, we can jump directly -- and save messing with LR */ 63 #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 64 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 65 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 66 li r10,MSR_RI; \ 67 mtmsrd r10,1; /* Set RI (EE=0) */ \ 68 b label; 69 #endif 70 71 /* 72 * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on 73 * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which 74 * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr. 75 */ 76 #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \ 77 EXCEPTION_PROLOG_1(area, extra, vec); \ 78 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 79 80 /* 81 * We're short on space and time in the exception prolog, so we can't 82 * use the normal SET_REG_IMMEDIATE macro. Normally we just need the 83 * low halfword of the address, but for Kdump we need the whole low 84 * word. 85 */ 86 #define LOAD_HANDLER(reg, label) \ 87 /* Handlers must be within 64K of kbase, which must be 64k aligned */ \ 88 ori reg,reg,(label)-_stext; /* virt addr of handler ... */ 89 90 /* Exception register prefixes */ 91 #define EXC_HV H 92 #define EXC_STD 93 94 #if defined(CONFIG_RELOCATABLE) 95 /* 96 * If we support interrupts with relocation on AND we're a relocatable 97 * kernel, we need to use LR to get to the 2nd level handler. So, save/restore 98 * it when required. 99 */ 100 #define SAVE_LR(reg, area) mflr reg ; std reg,area+EX_LR(r13) 101 #define GET_LR(reg, area) ld reg,area+EX_LR(r13) 102 #define RESTORE_LR(reg, area) ld reg,area+EX_LR(r13) ; mtlr reg 103 #else 104 /* ...else LR is unused and in register. */ 105 #define SAVE_LR(reg, area) 106 #define GET_LR(reg, area) mflr reg 107 #define RESTORE_LR(reg, area) 108 #endif 109 110 #define __EXCEPTION_PROLOG_1(area, extra, vec) \ 111 GET_PACA(r13); \ 112 std r9,area+EX_R9(r13); /* save r9 - r12 */ \ 113 std r10,area+EX_R10(r13); \ 114 BEGIN_FTR_SECTION_NESTED(66); \ 115 mfspr r10,SPRN_CFAR; \ 116 std r10,area+EX_CFAR(r13); \ 117 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \ 118 SAVE_LR(r10, area); \ 119 mfcr r9; \ 120 extra(vec); \ 121 std r11,area+EX_R11(r13); \ 122 std r12,area+EX_R12(r13); \ 123 GET_SCRATCH0(r10); \ 124 std r10,area+EX_R13(r13) 125 #define EXCEPTION_PROLOG_1(area, extra, vec) \ 126 __EXCEPTION_PROLOG_1(area, extra, vec) 127 128 #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \ 129 ld r12,PACAKBASE(r13); /* get high part of &label */ \ 130 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 131 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 132 LOAD_HANDLER(r12,label) \ 133 mtspr SPRN_##h##SRR0,r12; \ 134 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 135 mtspr SPRN_##h##SRR1,r10; \ 136 h##rfid; \ 137 b . /* prevent speculative execution */ 138 #define EXCEPTION_PROLOG_PSERIES_1(label, h) \ 139 __EXCEPTION_PROLOG_PSERIES_1(label, h) 140 141 #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \ 142 EXCEPTION_PROLOG_1(area, extra, vec); \ 143 EXCEPTION_PROLOG_PSERIES_1(label, h); 144 145 #define __KVMTEST(n) \ 146 lbz r10,HSTATE_IN_GUEST(r13); \ 147 cmpwi r10,0; \ 148 bne do_kvm_##n 149 150 #define __KVM_HANDLER(area, h, n) \ 151 do_kvm_##n: \ 152 ld r10,area+EX_R10(r13); \ 153 stw r9,HSTATE_SCRATCH1(r13); \ 154 ld r9,area+EX_R9(r13); \ 155 std r12,HSTATE_SCRATCH0(r13); \ 156 li r12,n; \ 157 b kvmppc_interrupt 158 159 #define __KVM_HANDLER_SKIP(area, h, n) \ 160 do_kvm_##n: \ 161 cmpwi r10,KVM_GUEST_MODE_SKIP; \ 162 ld r10,area+EX_R10(r13); \ 163 beq 89f; \ 164 stw r9,HSTATE_SCRATCH1(r13); \ 165 ld r9,area+EX_R9(r13); \ 166 std r12,HSTATE_SCRATCH0(r13); \ 167 li r12,n; \ 168 b kvmppc_interrupt; \ 169 89: mtocrf 0x80,r9; \ 170 ld r9,area+EX_R9(r13); \ 171 b kvmppc_skip_##h##interrupt 172 173 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER 174 #define KVMTEST(n) __KVMTEST(n) 175 #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n) 176 #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n) 177 178 #else 179 #define KVMTEST(n) 180 #define KVM_HANDLER(area, h, n) 181 #define KVM_HANDLER_SKIP(area, h, n) 182 #endif 183 184 #ifdef CONFIG_KVM_BOOK3S_PR 185 #define KVMTEST_PR(n) __KVMTEST(n) 186 #define KVM_HANDLER_PR(area, h, n) __KVM_HANDLER(area, h, n) 187 #define KVM_HANDLER_PR_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n) 188 189 #else 190 #define KVMTEST_PR(n) 191 #define KVM_HANDLER_PR(area, h, n) 192 #define KVM_HANDLER_PR_SKIP(area, h, n) 193 #endif 194 195 #define NOTEST(n) 196 197 /* 198 * The common exception prolog is used for all except a few exceptions 199 * such as a segment miss on a kernel address. We have to be prepared 200 * to take another exception from the point where we first touch the 201 * kernel stack onwards. 202 * 203 * On entry r13 points to the paca, r9-r13 are saved in the paca, 204 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and 205 * SRR1, and relocation is on. 206 */ 207 #define EXCEPTION_PROLOG_COMMON(n, area) \ 208 andi. r10,r12,MSR_PR; /* See if coming from user */ \ 209 mr r10,r1; /* Save r1 */ \ 210 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \ 211 beq- 1f; \ 212 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \ 213 1: cmpdi cr1,r1,0; /* check if r1 is in userspace */ \ 214 blt+ cr1,3f; /* abort if it is */ \ 215 li r1,(n); /* will be reloaded later */ \ 216 sth r1,PACA_TRAP_SAVE(r13); \ 217 std r3,area+EX_R3(r13); \ 218 addi r3,r13,area; /* r3 -> where regs are saved*/ \ 219 RESTORE_LR(r1, area); \ 220 b bad_stack; \ 221 3: std r9,_CCR(r1); /* save CR in stackframe */ \ 222 std r11,_NIP(r1); /* save SRR0 in stackframe */ \ 223 std r12,_MSR(r1); /* save SRR1 in stackframe */ \ 224 std r10,0(r1); /* make stack chain pointer */ \ 225 std r0,GPR0(r1); /* save r0 in stackframe */ \ 226 std r10,GPR1(r1); /* save r1 in stackframe */ \ 227 ACCOUNT_CPU_USER_ENTRY(r9, r10); \ 228 std r2,GPR2(r1); /* save r2 in stackframe */ \ 229 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \ 230 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \ 231 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \ 232 ld r10,area+EX_R10(r13); \ 233 std r9,GPR9(r1); \ 234 std r10,GPR10(r1); \ 235 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \ 236 ld r10,area+EX_R12(r13); \ 237 ld r11,area+EX_R13(r13); \ 238 std r9,GPR11(r1); \ 239 std r10,GPR12(r1); \ 240 std r11,GPR13(r1); \ 241 BEGIN_FTR_SECTION_NESTED(66); \ 242 ld r10,area+EX_CFAR(r13); \ 243 std r10,ORIG_GPR3(r1); \ 244 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \ 245 GET_LR(r9,area); /* Get LR, later save to stack */ \ 246 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \ 247 std r9,_LINK(r1); \ 248 mfctr r10; /* save CTR in stackframe */ \ 249 std r10,_CTR(r1); \ 250 lbz r10,PACASOFTIRQEN(r13); \ 251 mfspr r11,SPRN_XER; /* save XER in stackframe */ \ 252 std r10,SOFTE(r1); \ 253 std r11,_XER(r1); \ 254 li r9,(n)+1; \ 255 std r9,_TRAP(r1); /* set trap number */ \ 256 li r10,0; \ 257 ld r11,exception_marker@toc(r2); \ 258 std r10,RESULT(r1); /* clear regs->result */ \ 259 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ \ 260 ACCOUNT_STOLEN_TIME 261 262 /* 263 * Exception vectors. 264 */ 265 #define STD_EXCEPTION_PSERIES(loc, vec, label) \ 266 . = loc; \ 267 .globl label##_pSeries; \ 268 label##_pSeries: \ 269 HMT_MEDIUM; \ 270 SET_SCRATCH0(r13); /* save r13 */ \ 271 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 272 EXC_STD, KVMTEST_PR, vec) 273 274 #define STD_EXCEPTION_HV(loc, vec, label) \ 275 . = loc; \ 276 .globl label##_hv; \ 277 label##_hv: \ 278 HMT_MEDIUM; \ 279 SET_SCRATCH0(r13); /* save r13 */ \ 280 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 281 EXC_HV, KVMTEST, vec) 282 283 #define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 284 . = loc; \ 285 .globl label##_relon_pSeries; \ 286 label##_relon_pSeries: \ 287 HMT_MEDIUM; \ 288 /* No guest interrupts come through here */ \ 289 SET_SCRATCH0(r13); /* save r13 */ \ 290 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 291 EXC_STD, KVMTEST_PR, vec) 292 293 #define STD_RELON_EXCEPTION_HV(loc, vec, label) \ 294 . = loc; \ 295 .globl label##_relon_hv; \ 296 label##_relon_hv: \ 297 HMT_MEDIUM; \ 298 /* No guest interrupts come through here */ \ 299 SET_SCRATCH0(r13); /* save r13 */ \ 300 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 301 EXC_HV, KVMTEST, vec) 302 303 /* This associate vector numbers with bits in paca->irq_happened */ 304 #define SOFTEN_VALUE_0x500 PACA_IRQ_EE 305 #define SOFTEN_VALUE_0x502 PACA_IRQ_EE 306 #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC 307 #define SOFTEN_VALUE_0x982 PACA_IRQ_DEC 308 #define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL 309 #define SOFTEN_VALUE_0xe82 PACA_IRQ_DBELL 310 311 #define __SOFTEN_TEST(h, vec) \ 312 lbz r10,PACASOFTIRQEN(r13); \ 313 cmpwi r10,0; \ 314 li r10,SOFTEN_VALUE_##vec; \ 315 beq masked_##h##interrupt 316 #define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec) 317 318 #define SOFTEN_TEST_PR(vec) \ 319 KVMTEST_PR(vec); \ 320 _SOFTEN_TEST(EXC_STD, vec) 321 322 #define SOFTEN_TEST_HV(vec) \ 323 KVMTEST(vec); \ 324 _SOFTEN_TEST(EXC_HV, vec) 325 326 #define SOFTEN_TEST_HV_201(vec) \ 327 KVMTEST(vec); \ 328 _SOFTEN_TEST(EXC_STD, vec) 329 330 #define SOFTEN_NOTEST_PR(vec) _SOFTEN_TEST(EXC_STD, vec) 331 #define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec) 332 333 #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 334 HMT_MEDIUM; \ 335 SET_SCRATCH0(r13); /* save r13 */ \ 336 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 337 EXCEPTION_PROLOG_PSERIES_1(label##_common, h); 338 #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 339 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) 340 341 #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \ 342 . = loc; \ 343 .globl label##_pSeries; \ 344 label##_pSeries: \ 345 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 346 EXC_STD, SOFTEN_TEST_PR) 347 348 #define MASKABLE_EXCEPTION_HV(loc, vec, label) \ 349 . = loc; \ 350 .globl label##_hv; \ 351 label##_hv: \ 352 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 353 EXC_HV, SOFTEN_TEST_HV) 354 355 #define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 356 HMT_MEDIUM; \ 357 SET_SCRATCH0(r13); /* save r13 */ \ 358 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 359 EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, h); 360 #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 361 __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) 362 363 #define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 364 . = loc; \ 365 .globl label##_relon_pSeries; \ 366 label##_relon_pSeries: \ 367 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 368 EXC_STD, SOFTEN_NOTEST_PR) 369 370 #define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label) \ 371 . = loc; \ 372 .globl label##_relon_hv; \ 373 label##_relon_hv: \ 374 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 375 EXC_HV, SOFTEN_NOTEST_HV) 376 377 /* 378 * Our exception common code can be passed various "additions" 379 * to specify the behaviour of interrupts, whether to kick the 380 * runlatch, etc... 381 */ 382 383 /* Exception addition: Hard disable interrupts */ 384 #define DISABLE_INTS SOFT_DISABLE_INTS(r10,r11) 385 386 #define ADD_NVGPRS \ 387 bl .save_nvgprs 388 389 #define RUNLATCH_ON \ 390 BEGIN_FTR_SECTION \ 391 CURRENT_THREAD_INFO(r3, r1); \ 392 ld r4,TI_LOCAL_FLAGS(r3); \ 393 andi. r0,r4,_TLF_RUNLATCH; \ 394 beql ppc64_runlatch_on_trampoline; \ 395 END_FTR_SECTION_IFSET(CPU_FTR_CTRL) 396 397 #define EXCEPTION_COMMON(trap, label, hdlr, ret, additions) \ 398 .align 7; \ 399 .globl label##_common; \ 400 label##_common: \ 401 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \ 402 additions; \ 403 addi r3,r1,STACK_FRAME_OVERHEAD; \ 404 bl hdlr; \ 405 b ret 406 407 #define STD_EXCEPTION_COMMON(trap, label, hdlr) \ 408 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except, \ 409 ADD_NVGPRS;DISABLE_INTS) 410 411 /* 412 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur 413 * in the idle task and therefore need the special idle handling 414 * (finish nap and runlatch) 415 */ 416 #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \ 417 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except_lite, \ 418 FINISH_NAP;RUNLATCH_ON;DISABLE_INTS) 419 420 /* 421 * When the idle code in power4_idle puts the CPU into NAP mode, 422 * it has to do so in a loop, and relies on the external interrupt 423 * and decrementer interrupt entry code to get it out of the loop. 424 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags 425 * to signal that it is in the loop and needs help to get out. 426 */ 427 #ifdef CONFIG_PPC_970_NAP 428 #define FINISH_NAP \ 429 BEGIN_FTR_SECTION \ 430 CURRENT_THREAD_INFO(r11, r1); \ 431 ld r9,TI_LOCAL_FLAGS(r11); \ 432 andi. r10,r9,_TLF_NAPPING; \ 433 bnel power4_fixup_nap; \ 434 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) 435 #else 436 #define FINISH_NAP 437 #endif 438 439 #endif /* _ASM_POWERPC_EXCEPTION_H */ 440