1 #ifndef _ASM_POWERPC_EXCEPTION_H 2 #define _ASM_POWERPC_EXCEPTION_H 3 /* 4 * Extracted from head_64.S 5 * 6 * PowerPC version 7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 8 * 9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP 10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> 11 * Adapted for Power Macintosh by Paul Mackerras. 12 * Low-level exception handlers and MMU support 13 * rewritten by Paul Mackerras. 14 * Copyright (C) 1996 Paul Mackerras. 15 * 16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and 17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com 18 * 19 * This file contains the low-level support and setup for the 20 * PowerPC-64 platform, including trap and interrupt dispatch. 21 * 22 * This program is free software; you can redistribute it and/or 23 * modify it under the terms of the GNU General Public License 24 * as published by the Free Software Foundation; either version 25 * 2 of the License, or (at your option) any later version. 26 */ 27 /* 28 * The following macros define the code that appears as 29 * the prologue to each of the exception handlers. They 30 * are split into two parts to allow a single kernel binary 31 * to be used for pSeries and iSeries. 32 * 33 * We make as much of the exception code common between native 34 * exception handlers (including pSeries LPAR) and iSeries LPAR 35 * implementations as possible. 36 */ 37 #include <asm/head-64.h> 38 39 /* PACA save area offsets (exgen, exmc, etc) */ 40 #define EX_R9 0 41 #define EX_R10 8 42 #define EX_R11 16 43 #define EX_R12 24 44 #define EX_R13 32 45 #define EX_DAR 40 46 #define EX_DSISR 48 47 #define EX_CCR 52 48 #define EX_CFAR 56 49 #define EX_PPR 64 50 #define EX_CTR 72 51 52 #define EX_SIZE 10 /* size in u64 units */ 53 54 /* 55 * EX_LR is only used in EXSLB and where it does not overlap with EX_DAR 56 * EX_CCR similarly with DSISR, but being 4 byte registers there is a hole 57 * in the save area so it's not necessary to overlap them. Could be used 58 * for future savings though if another 4 byte register was to be saved. 59 */ 60 #define EX_LR EX_DAR 61 62 /* 63 * EX_R3 is only used by the bad_stack handler. bad_stack reloads and 64 * saves DAR from SPRN_DAR, and EX_DAR is not used. So EX_R3 can overlap 65 * with EX_DAR. 66 */ 67 #define EX_R3 EX_DAR 68 69 #ifdef CONFIG_RELOCATABLE 70 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 71 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 72 LOAD_HANDLER(r12,label); \ 73 mtctr r12; \ 74 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 75 li r10,MSR_RI; \ 76 mtmsrd r10,1; /* Set RI (EE=0) */ \ 77 bctr; 78 #else 79 /* If not relocatable, we can jump directly -- and save messing with LR */ 80 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 81 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 82 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 83 li r10,MSR_RI; \ 84 mtmsrd r10,1; /* Set RI (EE=0) */ \ 85 b label; 86 #endif 87 #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 88 __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 89 90 /* 91 * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on 92 * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which 93 * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr. 94 */ 95 #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \ 96 EXCEPTION_PROLOG_0(area); \ 97 EXCEPTION_PROLOG_1(area, extra, vec); \ 98 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 99 100 /* 101 * We're short on space and time in the exception prolog, so we can't 102 * use the normal LOAD_REG_IMMEDIATE macro to load the address of label. 103 * Instead we get the base of the kernel from paca->kernelbase and or in the low 104 * part of label. This requires that the label be within 64KB of kernelbase, and 105 * that kernelbase be 64K aligned. 106 */ 107 #define LOAD_HANDLER(reg, label) \ 108 ld reg,PACAKBASE(r13); /* get high part of &label */ \ 109 ori reg,reg,FIXED_SYMBOL_ABS_ADDR(label); 110 111 #define __LOAD_HANDLER(reg, label) \ 112 ld reg,PACAKBASE(r13); \ 113 ori reg,reg,(ABS_ADDR(label))@l; 114 115 /* 116 * Branches from unrelocated code (e.g., interrupts) to labels outside 117 * head-y require >64K offsets. 118 */ 119 #define __LOAD_FAR_HANDLER(reg, label) \ 120 ld reg,PACAKBASE(r13); \ 121 ori reg,reg,(ABS_ADDR(label))@l; \ 122 addis reg,reg,(ABS_ADDR(label))@h; 123 124 /* Exception register prefixes */ 125 #define EXC_HV H 126 #define EXC_STD 127 128 #if defined(CONFIG_RELOCATABLE) 129 /* 130 * If we support interrupts with relocation on AND we're a relocatable kernel, 131 * we need to use CTR to get to the 2nd level handler. So, save/restore it 132 * when required. 133 */ 134 #define SAVE_CTR(reg, area) mfctr reg ; std reg,area+EX_CTR(r13) 135 #define GET_CTR(reg, area) ld reg,area+EX_CTR(r13) 136 #define RESTORE_CTR(reg, area) ld reg,area+EX_CTR(r13) ; mtctr reg 137 #else 138 /* ...else CTR is unused and in register. */ 139 #define SAVE_CTR(reg, area) 140 #define GET_CTR(reg, area) mfctr reg 141 #define RESTORE_CTR(reg, area) 142 #endif 143 144 /* 145 * PPR save/restore macros used in exceptions_64s.S 146 * Used for P7 or later processors 147 */ 148 #define SAVE_PPR(area, ra, rb) \ 149 BEGIN_FTR_SECTION_NESTED(940) \ 150 ld ra,PACACURRENT(r13); \ 151 ld rb,area+EX_PPR(r13); /* Read PPR from paca */ \ 152 std rb,TASKTHREADPPR(ra); \ 153 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940) 154 155 #define RESTORE_PPR_PACA(area, ra) \ 156 BEGIN_FTR_SECTION_NESTED(941) \ 157 ld ra,area+EX_PPR(r13); \ 158 mtspr SPRN_PPR,ra; \ 159 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941) 160 161 /* 162 * Get an SPR into a register if the CPU has the given feature 163 */ 164 #define OPT_GET_SPR(ra, spr, ftr) \ 165 BEGIN_FTR_SECTION_NESTED(943) \ 166 mfspr ra,spr; \ 167 END_FTR_SECTION_NESTED(ftr,ftr,943) 168 169 /* 170 * Set an SPR from a register if the CPU has the given feature 171 */ 172 #define OPT_SET_SPR(ra, spr, ftr) \ 173 BEGIN_FTR_SECTION_NESTED(943) \ 174 mtspr spr,ra; \ 175 END_FTR_SECTION_NESTED(ftr,ftr,943) 176 177 /* 178 * Save a register to the PACA if the CPU has the given feature 179 */ 180 #define OPT_SAVE_REG_TO_PACA(offset, ra, ftr) \ 181 BEGIN_FTR_SECTION_NESTED(943) \ 182 std ra,offset(r13); \ 183 END_FTR_SECTION_NESTED(ftr,ftr,943) 184 185 #define EXCEPTION_PROLOG_0(area) \ 186 GET_PACA(r13); \ 187 std r9,area+EX_R9(r13); /* save r9 */ \ 188 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \ 189 HMT_MEDIUM; \ 190 std r10,area+EX_R10(r13); /* save r10 - r12 */ \ 191 OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR) 192 193 #define __EXCEPTION_PROLOG_1(area, extra, vec) \ 194 OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \ 195 OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \ 196 SAVE_CTR(r10, area); \ 197 mfcr r9; \ 198 extra(vec); \ 199 std r11,area+EX_R11(r13); \ 200 std r12,area+EX_R12(r13); \ 201 GET_SCRATCH0(r10); \ 202 std r10,area+EX_R13(r13) 203 #define EXCEPTION_PROLOG_1(area, extra, vec) \ 204 __EXCEPTION_PROLOG_1(area, extra, vec) 205 206 #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \ 207 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 208 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 209 LOAD_HANDLER(r12,label) \ 210 mtspr SPRN_##h##SRR0,r12; \ 211 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 212 mtspr SPRN_##h##SRR1,r10; \ 213 h##rfid; \ 214 b . /* prevent speculative execution */ 215 #define EXCEPTION_PROLOG_PSERIES_1(label, h) \ 216 __EXCEPTION_PROLOG_PSERIES_1(label, h) 217 218 /* _NORI variant keeps MSR_RI clear */ 219 #define __EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) \ 220 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 221 xori r10,r10,MSR_RI; /* Clear MSR_RI */ \ 222 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 223 LOAD_HANDLER(r12,label) \ 224 mtspr SPRN_##h##SRR0,r12; \ 225 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 226 mtspr SPRN_##h##SRR1,r10; \ 227 h##rfid; \ 228 b . /* prevent speculative execution */ 229 230 #define EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) \ 231 __EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) 232 233 #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \ 234 EXCEPTION_PROLOG_0(area); \ 235 EXCEPTION_PROLOG_1(area, extra, vec); \ 236 EXCEPTION_PROLOG_PSERIES_1(label, h); 237 238 #define __KVMTEST(h, n) \ 239 lbz r10,HSTATE_IN_GUEST(r13); \ 240 cmpwi r10,0; \ 241 bne do_kvm_##h##n 242 243 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 244 /* 245 * If hv is possible, interrupts come into to the hv version 246 * of the kvmppc_interrupt code, which then jumps to the PR handler, 247 * kvmppc_interrupt_pr, if the guest is a PR guest. 248 */ 249 #define kvmppc_interrupt kvmppc_interrupt_hv 250 #else 251 #define kvmppc_interrupt kvmppc_interrupt_pr 252 #endif 253 254 /* 255 * Branch to label using its 0xC000 address. This results in instruction 256 * address suitable for MSR[IR]=0 or 1, which allows relocation to be turned 257 * on using mtmsr rather than rfid. 258 * 259 * This could set the 0xc bits for !RELOCATABLE as an immediate, rather than 260 * load KBASE for a slight optimisation. 261 */ 262 #define BRANCH_TO_C000(reg, label) \ 263 __LOAD_HANDLER(reg, label); \ 264 mtctr reg; \ 265 bctr 266 267 #ifdef CONFIG_RELOCATABLE 268 #define BRANCH_TO_COMMON(reg, label) \ 269 __LOAD_HANDLER(reg, label); \ 270 mtctr reg; \ 271 bctr 272 273 #define BRANCH_LINK_TO_FAR(label) \ 274 __LOAD_FAR_HANDLER(r12, label); \ 275 mtctr r12; \ 276 bctrl 277 278 /* 279 * KVM requires __LOAD_FAR_HANDLER. 280 * 281 * __BRANCH_TO_KVM_EXIT branches are also a special case because they 282 * explicitly use r9 then reload it from PACA before branching. Hence 283 * the double-underscore. 284 */ 285 #define __BRANCH_TO_KVM_EXIT(area, label) \ 286 mfctr r9; \ 287 std r9,HSTATE_SCRATCH1(r13); \ 288 __LOAD_FAR_HANDLER(r9, label); \ 289 mtctr r9; \ 290 ld r9,area+EX_R9(r13); \ 291 bctr 292 293 #else 294 #define BRANCH_TO_COMMON(reg, label) \ 295 b label 296 297 #define BRANCH_LINK_TO_FAR(label) \ 298 bl label 299 300 #define __BRANCH_TO_KVM_EXIT(area, label) \ 301 ld r9,area+EX_R9(r13); \ 302 b label 303 304 #endif 305 306 /* Do not enable RI */ 307 #define EXCEPTION_PROLOG_PSERIES_NORI(area, label, h, extra, vec) \ 308 EXCEPTION_PROLOG_0(area); \ 309 EXCEPTION_PROLOG_1(area, extra, vec); \ 310 EXCEPTION_PROLOG_PSERIES_1_NORI(label, h); 311 312 313 #define __KVM_HANDLER(area, h, n) \ 314 BEGIN_FTR_SECTION_NESTED(947) \ 315 ld r10,area+EX_CFAR(r13); \ 316 std r10,HSTATE_CFAR(r13); \ 317 END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947); \ 318 BEGIN_FTR_SECTION_NESTED(948) \ 319 ld r10,area+EX_PPR(r13); \ 320 std r10,HSTATE_PPR(r13); \ 321 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 322 ld r10,area+EX_R10(r13); \ 323 std r12,HSTATE_SCRATCH0(r13); \ 324 sldi r12,r9,32; \ 325 ori r12,r12,(n); \ 326 /* This reloads r9 before branching to kvmppc_interrupt */ \ 327 __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt) 328 329 #define __KVM_HANDLER_SKIP(area, h, n) \ 330 cmpwi r10,KVM_GUEST_MODE_SKIP; \ 331 beq 89f; \ 332 BEGIN_FTR_SECTION_NESTED(948) \ 333 ld r10,area+EX_PPR(r13); \ 334 std r10,HSTATE_PPR(r13); \ 335 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 336 ld r10,area+EX_R10(r13); \ 337 std r12,HSTATE_SCRATCH0(r13); \ 338 sldi r12,r9,32; \ 339 ori r12,r12,(n); \ 340 /* This reloads r9 before branching to kvmppc_interrupt */ \ 341 __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt); \ 342 89: mtocrf 0x80,r9; \ 343 ld r9,area+EX_R9(r13); \ 344 ld r10,area+EX_R10(r13); \ 345 b kvmppc_skip_##h##interrupt 346 347 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER 348 #define KVMTEST(h, n) __KVMTEST(h, n) 349 #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n) 350 #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n) 351 352 #else 353 #define KVMTEST(h, n) 354 #define KVM_HANDLER(area, h, n) 355 #define KVM_HANDLER_SKIP(area, h, n) 356 #endif 357 358 #define NOTEST(n) 359 360 #define EXCEPTION_PROLOG_COMMON_1() \ 361 std r9,_CCR(r1); /* save CR in stackframe */ \ 362 std r11,_NIP(r1); /* save SRR0 in stackframe */ \ 363 std r12,_MSR(r1); /* save SRR1 in stackframe */ \ 364 std r10,0(r1); /* make stack chain pointer */ \ 365 std r0,GPR0(r1); /* save r0 in stackframe */ \ 366 std r10,GPR1(r1); /* save r1 in stackframe */ \ 367 368 369 /* 370 * The common exception prolog is used for all except a few exceptions 371 * such as a segment miss on a kernel address. We have to be prepared 372 * to take another exception from the point where we first touch the 373 * kernel stack onwards. 374 * 375 * On entry r13 points to the paca, r9-r13 are saved in the paca, 376 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and 377 * SRR1, and relocation is on. 378 */ 379 #define EXCEPTION_PROLOG_COMMON(n, area) \ 380 andi. r10,r12,MSR_PR; /* See if coming from user */ \ 381 mr r10,r1; /* Save r1 */ \ 382 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \ 383 beq- 1f; \ 384 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \ 385 1: cmpdi cr1,r1,-INT_FRAME_SIZE; /* check if r1 is in userspace */ \ 386 blt+ cr1,3f; /* abort if it is */ \ 387 li r1,(n); /* will be reloaded later */ \ 388 sth r1,PACA_TRAP_SAVE(r13); \ 389 std r3,area+EX_R3(r13); \ 390 addi r3,r13,area; /* r3 -> where regs are saved*/ \ 391 RESTORE_CTR(r1, area); \ 392 b bad_stack; \ 393 3: EXCEPTION_PROLOG_COMMON_1(); \ 394 beq 4f; /* if from kernel mode */ \ 395 ACCOUNT_CPU_USER_ENTRY(r13, r9, r10); \ 396 SAVE_PPR(area, r9, r10); \ 397 4: EXCEPTION_PROLOG_COMMON_2(area) \ 398 EXCEPTION_PROLOG_COMMON_3(n) \ 399 ACCOUNT_STOLEN_TIME 400 401 /* Save original regs values from save area to stack frame. */ 402 #define EXCEPTION_PROLOG_COMMON_2(area) \ 403 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \ 404 ld r10,area+EX_R10(r13); \ 405 std r9,GPR9(r1); \ 406 std r10,GPR10(r1); \ 407 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \ 408 ld r10,area+EX_R12(r13); \ 409 ld r11,area+EX_R13(r13); \ 410 std r9,GPR11(r1); \ 411 std r10,GPR12(r1); \ 412 std r11,GPR13(r1); \ 413 BEGIN_FTR_SECTION_NESTED(66); \ 414 ld r10,area+EX_CFAR(r13); \ 415 std r10,ORIG_GPR3(r1); \ 416 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \ 417 GET_CTR(r10, area); \ 418 std r10,_CTR(r1); 419 420 #define EXCEPTION_PROLOG_COMMON_3(n) \ 421 std r2,GPR2(r1); /* save r2 in stackframe */ \ 422 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \ 423 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \ 424 mflr r9; /* Get LR, later save to stack */ \ 425 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \ 426 std r9,_LINK(r1); \ 427 lbz r10,PACASOFTIRQEN(r13); \ 428 mfspr r11,SPRN_XER; /* save XER in stackframe */ \ 429 std r10,SOFTE(r1); \ 430 std r11,_XER(r1); \ 431 li r9,(n)+1; \ 432 std r9,_TRAP(r1); /* set trap number */ \ 433 li r10,0; \ 434 ld r11,exception_marker@toc(r2); \ 435 std r10,RESULT(r1); /* clear regs->result */ \ 436 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ 437 438 /* 439 * Exception vectors. 440 */ 441 #define STD_EXCEPTION_PSERIES(vec, label) \ 442 SET_SCRATCH0(r13); /* save r13 */ \ 443 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \ 444 EXC_STD, KVMTEST_PR, vec); \ 445 446 /* Version of above for when we have to branch out-of-line */ 447 #define __OOL_EXCEPTION(vec, label, hdlr) \ 448 SET_SCRATCH0(r13) \ 449 EXCEPTION_PROLOG_0(PACA_EXGEN) \ 450 b hdlr; 451 452 #define STD_EXCEPTION_PSERIES_OOL(vec, label) \ 453 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \ 454 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD) 455 456 #define STD_EXCEPTION_HV(loc, vec, label) \ 457 SET_SCRATCH0(r13); /* save r13 */ \ 458 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \ 459 EXC_HV, KVMTEST_HV, vec); 460 461 #define STD_EXCEPTION_HV_OOL(vec, label) \ 462 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \ 463 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) 464 465 #define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 466 /* No guest interrupts come through here */ \ 467 SET_SCRATCH0(r13); /* save r13 */ \ 468 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, EXC_STD, NOTEST, vec); 469 470 #define STD_RELON_EXCEPTION_PSERIES_OOL(vec, label) \ 471 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \ 472 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_STD) 473 474 #define STD_RELON_EXCEPTION_HV(loc, vec, label) \ 475 SET_SCRATCH0(r13); /* save r13 */ \ 476 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, \ 477 EXC_HV, KVMTEST_HV, vec); 478 479 #define STD_RELON_EXCEPTION_HV_OOL(vec, label) \ 480 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \ 481 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV) 482 483 /* This associate vector numbers with bits in paca->irq_happened */ 484 #define SOFTEN_VALUE_0x500 PACA_IRQ_EE 485 #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC 486 #define SOFTEN_VALUE_0x980 PACA_IRQ_DEC 487 #define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL 488 #define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL 489 #define SOFTEN_VALUE_0xe60 PACA_IRQ_HMI 490 #define SOFTEN_VALUE_0xea0 PACA_IRQ_EE 491 492 #define __SOFTEN_TEST(h, vec) \ 493 lbz r10,PACASOFTIRQEN(r13); \ 494 cmpwi r10,0; \ 495 li r10,SOFTEN_VALUE_##vec; \ 496 beq masked_##h##interrupt 497 498 #define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec) 499 500 #define SOFTEN_TEST_PR(vec) \ 501 KVMTEST(EXC_STD, vec); \ 502 _SOFTEN_TEST(EXC_STD, vec) 503 504 #define SOFTEN_TEST_HV(vec) \ 505 KVMTEST(EXC_HV, vec); \ 506 _SOFTEN_TEST(EXC_HV, vec) 507 508 #define KVMTEST_PR(vec) \ 509 KVMTEST(EXC_STD, vec) 510 511 #define KVMTEST_HV(vec) \ 512 KVMTEST(EXC_HV, vec) 513 514 #define SOFTEN_NOTEST_PR(vec) _SOFTEN_TEST(EXC_STD, vec) 515 #define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec) 516 517 #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 518 SET_SCRATCH0(r13); /* save r13 */ \ 519 EXCEPTION_PROLOG_0(PACA_EXGEN); \ 520 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 521 EXCEPTION_PROLOG_PSERIES_1(label, h); 522 523 #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 524 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) 525 526 #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \ 527 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 528 EXC_STD, SOFTEN_TEST_PR) 529 530 #define MASKABLE_EXCEPTION_PSERIES_OOL(vec, label) \ 531 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, vec); \ 532 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD) 533 534 #define MASKABLE_EXCEPTION_HV(loc, vec, label) \ 535 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 536 EXC_HV, SOFTEN_TEST_HV) 537 538 #define MASKABLE_EXCEPTION_HV_OOL(vec, label) \ 539 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \ 540 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) 541 542 #define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 543 SET_SCRATCH0(r13); /* save r13 */ \ 544 EXCEPTION_PROLOG_0(PACA_EXGEN); \ 545 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 546 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 547 548 #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 549 __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) 550 551 #define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 552 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 553 EXC_STD, SOFTEN_NOTEST_PR) 554 555 #define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label) \ 556 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 557 EXC_HV, SOFTEN_TEST_HV) 558 559 #define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label) \ 560 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \ 561 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV) 562 563 /* 564 * Our exception common code can be passed various "additions" 565 * to specify the behaviour of interrupts, whether to kick the 566 * runlatch, etc... 567 */ 568 569 /* 570 * This addition reconciles our actual IRQ state with the various software 571 * flags that track it. This may call C code. 572 */ 573 #define ADD_RECONCILE RECONCILE_IRQ_STATE(r10,r11) 574 575 #define ADD_NVGPRS \ 576 bl save_nvgprs 577 578 #define RUNLATCH_ON \ 579 BEGIN_FTR_SECTION \ 580 CURRENT_THREAD_INFO(r3, r1); \ 581 ld r4,TI_LOCAL_FLAGS(r3); \ 582 andi. r0,r4,_TLF_RUNLATCH; \ 583 beql ppc64_runlatch_on_trampoline; \ 584 END_FTR_SECTION_IFSET(CPU_FTR_CTRL) 585 586 #define EXCEPTION_COMMON(area, trap, label, hdlr, ret, additions) \ 587 EXCEPTION_PROLOG_COMMON(trap, area); \ 588 /* Volatile regs are potentially clobbered here */ \ 589 additions; \ 590 addi r3,r1,STACK_FRAME_OVERHEAD; \ 591 bl hdlr; \ 592 b ret 593 594 /* 595 * Exception where stack is already set in r1, r1 is saved in r10, and it 596 * continues rather than returns. 597 */ 598 #define EXCEPTION_COMMON_NORET_STACK(area, trap, label, hdlr, additions) \ 599 EXCEPTION_PROLOG_COMMON_1(); \ 600 EXCEPTION_PROLOG_COMMON_2(area); \ 601 EXCEPTION_PROLOG_COMMON_3(trap); \ 602 /* Volatile regs are potentially clobbered here */ \ 603 additions; \ 604 addi r3,r1,STACK_FRAME_OVERHEAD; \ 605 bl hdlr 606 607 #define STD_EXCEPTION_COMMON(trap, label, hdlr) \ 608 EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr, \ 609 ret_from_except, ADD_NVGPRS;ADD_RECONCILE) 610 611 /* 612 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur 613 * in the idle task and therefore need the special idle handling 614 * (finish nap and runlatch) 615 */ 616 #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \ 617 EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr, \ 618 ret_from_except_lite, FINISH_NAP;ADD_RECONCILE;RUNLATCH_ON) 619 620 /* 621 * When the idle code in power4_idle puts the CPU into NAP mode, 622 * it has to do so in a loop, and relies on the external interrupt 623 * and decrementer interrupt entry code to get it out of the loop. 624 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags 625 * to signal that it is in the loop and needs help to get out. 626 */ 627 #ifdef CONFIG_PPC_970_NAP 628 #define FINISH_NAP \ 629 BEGIN_FTR_SECTION \ 630 CURRENT_THREAD_INFO(r11, r1); \ 631 ld r9,TI_LOCAL_FLAGS(r11); \ 632 andi. r10,r9,_TLF_NAPPING; \ 633 bnel power4_fixup_nap; \ 634 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) 635 #else 636 #define FINISH_NAP 637 #endif 638 639 #endif /* _ASM_POWERPC_EXCEPTION_H */ 640