1 #ifndef _ASM_POWERPC_EXCEPTION_H 2 #define _ASM_POWERPC_EXCEPTION_H 3 /* 4 * Extracted from head_64.S 5 * 6 * PowerPC version 7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 8 * 9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP 10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> 11 * Adapted for Power Macintosh by Paul Mackerras. 12 * Low-level exception handlers and MMU support 13 * rewritten by Paul Mackerras. 14 * Copyright (C) 1996 Paul Mackerras. 15 * 16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and 17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com 18 * 19 * This file contains the low-level support and setup for the 20 * PowerPC-64 platform, including trap and interrupt dispatch. 21 * 22 * This program is free software; you can redistribute it and/or 23 * modify it under the terms of the GNU General Public License 24 * as published by the Free Software Foundation; either version 25 * 2 of the License, or (at your option) any later version. 26 */ 27 /* 28 * The following macros define the code that appears as 29 * the prologue to each of the exception handlers. They 30 * are split into two parts to allow a single kernel binary 31 * to be used for pSeries and iSeries. 32 * 33 * We make as much of the exception code common between native 34 * exception handlers (including pSeries LPAR) and iSeries LPAR 35 * implementations as possible. 36 */ 37 38 #define EX_R9 0 39 #define EX_R10 8 40 #define EX_R11 16 41 #define EX_R12 24 42 #define EX_R13 32 43 #define EX_SRR0 40 44 #define EX_DAR 48 45 #define EX_DSISR 56 46 #define EX_CCR 60 47 #define EX_R3 64 48 #define EX_LR 72 49 #define EX_CFAR 80 50 51 /* 52 * We're short on space and time in the exception prolog, so we can't 53 * use the normal SET_REG_IMMEDIATE macro. Normally we just need the 54 * low halfword of the address, but for Kdump we need the whole low 55 * word. 56 */ 57 #define LOAD_HANDLER(reg, label) \ 58 /* Handlers must be within 64K of kbase, which must be 64k aligned */ \ 59 ori reg,reg,(label)-_stext; /* virt addr of handler ... */ 60 61 /* Exception register prefixes */ 62 #define EXC_HV H 63 #define EXC_STD 64 65 #define __EXCEPTION_PROLOG_1(area, extra, vec) \ 66 GET_PACA(r13); \ 67 std r9,area+EX_R9(r13); /* save r9 - r12 */ \ 68 std r10,area+EX_R10(r13); \ 69 BEGIN_FTR_SECTION_NESTED(66); \ 70 mfspr r10,SPRN_CFAR; \ 71 std r10,area+EX_CFAR(r13); \ 72 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \ 73 mfcr r9; \ 74 extra(vec); \ 75 std r11,area+EX_R11(r13); \ 76 std r12,area+EX_R12(r13); \ 77 GET_SCRATCH0(r10); \ 78 std r10,area+EX_R13(r13) 79 #define EXCEPTION_PROLOG_1(area, extra, vec) \ 80 __EXCEPTION_PROLOG_1(area, extra, vec) 81 82 #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \ 83 ld r12,PACAKBASE(r13); /* get high part of &label */ \ 84 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 85 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 86 LOAD_HANDLER(r12,label) \ 87 mtspr SPRN_##h##SRR0,r12; \ 88 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 89 mtspr SPRN_##h##SRR1,r10; \ 90 h##rfid; \ 91 b . /* prevent speculative execution */ 92 #define EXCEPTION_PROLOG_PSERIES_1(label, h) \ 93 __EXCEPTION_PROLOG_PSERIES_1(label, h) 94 95 #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \ 96 EXCEPTION_PROLOG_1(area, extra, vec); \ 97 EXCEPTION_PROLOG_PSERIES_1(label, h); 98 99 #define __KVMTEST(n) \ 100 lbz r10,HSTATE_IN_GUEST(r13); \ 101 cmpwi r10,0; \ 102 bne do_kvm_##n 103 104 #define __KVM_HANDLER(area, h, n) \ 105 do_kvm_##n: \ 106 ld r10,area+EX_R10(r13); \ 107 stw r9,HSTATE_SCRATCH1(r13); \ 108 ld r9,area+EX_R9(r13); \ 109 std r12,HSTATE_SCRATCH0(r13); \ 110 li r12,n; \ 111 b kvmppc_interrupt 112 113 #define __KVM_HANDLER_SKIP(area, h, n) \ 114 do_kvm_##n: \ 115 cmpwi r10,KVM_GUEST_MODE_SKIP; \ 116 ld r10,area+EX_R10(r13); \ 117 beq 89f; \ 118 stw r9,HSTATE_SCRATCH1(r13); \ 119 ld r9,area+EX_R9(r13); \ 120 std r12,HSTATE_SCRATCH0(r13); \ 121 li r12,n; \ 122 b kvmppc_interrupt; \ 123 89: mtocrf 0x80,r9; \ 124 ld r9,area+EX_R9(r13); \ 125 b kvmppc_skip_##h##interrupt 126 127 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER 128 #define KVMTEST(n) __KVMTEST(n) 129 #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n) 130 #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n) 131 132 #else 133 #define KVMTEST(n) 134 #define KVM_HANDLER(area, h, n) 135 #define KVM_HANDLER_SKIP(area, h, n) 136 #endif 137 138 #ifdef CONFIG_KVM_BOOK3S_PR 139 #define KVMTEST_PR(n) __KVMTEST(n) 140 #define KVM_HANDLER_PR(area, h, n) __KVM_HANDLER(area, h, n) 141 #define KVM_HANDLER_PR_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n) 142 143 #else 144 #define KVMTEST_PR(n) 145 #define KVM_HANDLER_PR(area, h, n) 146 #define KVM_HANDLER_PR_SKIP(area, h, n) 147 #endif 148 149 #define NOTEST(n) 150 151 /* 152 * The common exception prolog is used for all except a few exceptions 153 * such as a segment miss on a kernel address. We have to be prepared 154 * to take another exception from the point where we first touch the 155 * kernel stack onwards. 156 * 157 * On entry r13 points to the paca, r9-r13 are saved in the paca, 158 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and 159 * SRR1, and relocation is on. 160 */ 161 #define EXCEPTION_PROLOG_COMMON(n, area) \ 162 andi. r10,r12,MSR_PR; /* See if coming from user */ \ 163 mr r10,r1; /* Save r1 */ \ 164 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \ 165 beq- 1f; \ 166 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \ 167 1: cmpdi cr1,r1,0; /* check if r1 is in userspace */ \ 168 blt+ cr1,3f; /* abort if it is */ \ 169 li r1,(n); /* will be reloaded later */ \ 170 sth r1,PACA_TRAP_SAVE(r13); \ 171 std r3,area+EX_R3(r13); \ 172 addi r3,r13,area; /* r3 -> where regs are saved*/ \ 173 b bad_stack; \ 174 3: std r9,_CCR(r1); /* save CR in stackframe */ \ 175 std r11,_NIP(r1); /* save SRR0 in stackframe */ \ 176 std r12,_MSR(r1); /* save SRR1 in stackframe */ \ 177 std r10,0(r1); /* make stack chain pointer */ \ 178 std r0,GPR0(r1); /* save r0 in stackframe */ \ 179 std r10,GPR1(r1); /* save r1 in stackframe */ \ 180 ACCOUNT_CPU_USER_ENTRY(r9, r10); \ 181 std r2,GPR2(r1); /* save r2 in stackframe */ \ 182 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \ 183 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \ 184 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \ 185 ld r10,area+EX_R10(r13); \ 186 std r9,GPR9(r1); \ 187 std r10,GPR10(r1); \ 188 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \ 189 ld r10,area+EX_R12(r13); \ 190 ld r11,area+EX_R13(r13); \ 191 std r9,GPR11(r1); \ 192 std r10,GPR12(r1); \ 193 std r11,GPR13(r1); \ 194 BEGIN_FTR_SECTION_NESTED(66); \ 195 ld r10,area+EX_CFAR(r13); \ 196 std r10,ORIG_GPR3(r1); \ 197 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \ 198 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \ 199 mflr r9; /* save LR in stackframe */ \ 200 std r9,_LINK(r1); \ 201 mfctr r10; /* save CTR in stackframe */ \ 202 std r10,_CTR(r1); \ 203 lbz r10,PACASOFTIRQEN(r13); \ 204 mfspr r11,SPRN_XER; /* save XER in stackframe */ \ 205 std r10,SOFTE(r1); \ 206 std r11,_XER(r1); \ 207 li r9,(n)+1; \ 208 std r9,_TRAP(r1); /* set trap number */ \ 209 li r10,0; \ 210 ld r11,exception_marker@toc(r2); \ 211 std r10,RESULT(r1); /* clear regs->result */ \ 212 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ \ 213 ACCOUNT_STOLEN_TIME 214 215 /* 216 * Exception vectors. 217 */ 218 #define STD_EXCEPTION_PSERIES(loc, vec, label) \ 219 . = loc; \ 220 .globl label##_pSeries; \ 221 label##_pSeries: \ 222 HMT_MEDIUM; \ 223 SET_SCRATCH0(r13); /* save r13 */ \ 224 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 225 EXC_STD, KVMTEST_PR, vec) 226 227 #define STD_EXCEPTION_HV(loc, vec, label) \ 228 . = loc; \ 229 .globl label##_hv; \ 230 label##_hv: \ 231 HMT_MEDIUM; \ 232 SET_SCRATCH0(r13); /* save r13 */ \ 233 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 234 EXC_HV, KVMTEST, vec) 235 236 /* This associate vector numbers with bits in paca->irq_happened */ 237 #define SOFTEN_VALUE_0x500 PACA_IRQ_EE 238 #define SOFTEN_VALUE_0x502 PACA_IRQ_EE 239 #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC 240 #define SOFTEN_VALUE_0x982 PACA_IRQ_DEC 241 242 #define __SOFTEN_TEST(h, vec) \ 243 lbz r10,PACASOFTIRQEN(r13); \ 244 cmpwi r10,0; \ 245 li r10,SOFTEN_VALUE_##vec; \ 246 beq masked_##h##interrupt 247 #define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec) 248 249 #define SOFTEN_TEST_PR(vec) \ 250 KVMTEST_PR(vec); \ 251 _SOFTEN_TEST(EXC_STD, vec) 252 253 #define SOFTEN_TEST_HV(vec) \ 254 KVMTEST(vec); \ 255 _SOFTEN_TEST(EXC_HV, vec) 256 257 #define SOFTEN_TEST_HV_201(vec) \ 258 KVMTEST(vec); \ 259 _SOFTEN_TEST(EXC_STD, vec) 260 261 #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 262 HMT_MEDIUM; \ 263 SET_SCRATCH0(r13); /* save r13 */ \ 264 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 265 EXCEPTION_PROLOG_PSERIES_1(label##_common, h); 266 #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 267 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) 268 269 #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \ 270 . = loc; \ 271 .globl label##_pSeries; \ 272 label##_pSeries: \ 273 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 274 EXC_STD, SOFTEN_TEST_PR) 275 276 #define MASKABLE_EXCEPTION_HV(loc, vec, label) \ 277 . = loc; \ 278 .globl label##_hv; \ 279 label##_hv: \ 280 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 281 EXC_HV, SOFTEN_TEST_HV) 282 283 /* 284 * Our exception common code can be passed various "additions" 285 * to specify the behaviour of interrupts, whether to kick the 286 * runlatch, etc... 287 */ 288 289 /* Exception addition: Hard disable interrupts */ 290 #define DISABLE_INTS SOFT_DISABLE_INTS(r10,r11) 291 292 #define ADD_NVGPRS \ 293 bl .save_nvgprs 294 295 #define RUNLATCH_ON \ 296 BEGIN_FTR_SECTION \ 297 CURRENT_THREAD_INFO(r3, r1); \ 298 ld r4,TI_LOCAL_FLAGS(r3); \ 299 andi. r0,r4,_TLF_RUNLATCH; \ 300 beql ppc64_runlatch_on_trampoline; \ 301 END_FTR_SECTION_IFSET(CPU_FTR_CTRL) 302 303 #define EXCEPTION_COMMON(trap, label, hdlr, ret, additions) \ 304 .align 7; \ 305 .globl label##_common; \ 306 label##_common: \ 307 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \ 308 additions; \ 309 addi r3,r1,STACK_FRAME_OVERHEAD; \ 310 bl hdlr; \ 311 b ret 312 313 #define STD_EXCEPTION_COMMON(trap, label, hdlr) \ 314 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except, \ 315 ADD_NVGPRS;DISABLE_INTS) 316 317 /* 318 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur 319 * in the idle task and therefore need the special idle handling 320 * (finish nap and runlatch) 321 */ 322 #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \ 323 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except_lite, \ 324 FINISH_NAP;RUNLATCH_ON;DISABLE_INTS) 325 326 /* 327 * When the idle code in power4_idle puts the CPU into NAP mode, 328 * it has to do so in a loop, and relies on the external interrupt 329 * and decrementer interrupt entry code to get it out of the loop. 330 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags 331 * to signal that it is in the loop and needs help to get out. 332 */ 333 #ifdef CONFIG_PPC_970_NAP 334 #define FINISH_NAP \ 335 BEGIN_FTR_SECTION \ 336 CURRENT_THREAD_INFO(r11, r1); \ 337 ld r9,TI_LOCAL_FLAGS(r11); \ 338 andi. r10,r9,_TLF_NAPPING; \ 339 bnel power4_fixup_nap; \ 340 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) 341 #else 342 #define FINISH_NAP 343 #endif 344 345 #endif /* _ASM_POWERPC_EXCEPTION_H */ 346