1 #ifndef _ASM_POWERPC_EXCEPTION_H 2 #define _ASM_POWERPC_EXCEPTION_H 3 /* 4 * Extracted from head_64.S 5 * 6 * PowerPC version 7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 8 * 9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP 10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> 11 * Adapted for Power Macintosh by Paul Mackerras. 12 * Low-level exception handlers and MMU support 13 * rewritten by Paul Mackerras. 14 * Copyright (C) 1996 Paul Mackerras. 15 * 16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and 17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com 18 * 19 * This file contains the low-level support and setup for the 20 * PowerPC-64 platform, including trap and interrupt dispatch. 21 * 22 * This program is free software; you can redistribute it and/or 23 * modify it under the terms of the GNU General Public License 24 * as published by the Free Software Foundation; either version 25 * 2 of the License, or (at your option) any later version. 26 */ 27 /* 28 * The following macros define the code that appears as 29 * the prologue to each of the exception handlers. They 30 * are split into two parts to allow a single kernel binary 31 * to be used for pSeries and iSeries. 32 * 33 * We make as much of the exception code common between native 34 * exception handlers (including pSeries LPAR) and iSeries LPAR 35 * implementations as possible. 36 */ 37 38 #define EX_R9 0 39 #define EX_R10 8 40 #define EX_R11 16 41 #define EX_R12 24 42 #define EX_R13 32 43 #define EX_SRR0 40 44 #define EX_DAR 48 45 #define EX_DSISR 56 46 #define EX_CCR 60 47 #define EX_R3 64 48 #define EX_LR 72 49 #define EX_CFAR 80 50 #define EX_PPR 88 /* SMT thread status register (priority) */ 51 52 #ifdef CONFIG_RELOCATABLE 53 #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 54 ld r12,PACAKBASE(r13); /* get high part of &label */ \ 55 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 56 LOAD_HANDLER(r12,label); \ 57 mtlr r12; \ 58 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 59 li r10,MSR_RI; \ 60 mtmsrd r10,1; /* Set RI (EE=0) */ \ 61 blr; 62 #else 63 /* If not relocatable, we can jump directly -- and save messing with LR */ 64 #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 65 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 66 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 67 li r10,MSR_RI; \ 68 mtmsrd r10,1; /* Set RI (EE=0) */ \ 69 b label; 70 #endif 71 72 /* 73 * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on 74 * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which 75 * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr. 76 */ 77 #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \ 78 EXCEPTION_PROLOG_1(area, extra, vec); \ 79 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 80 81 /* 82 * We're short on space and time in the exception prolog, so we can't 83 * use the normal SET_REG_IMMEDIATE macro. Normally we just need the 84 * low halfword of the address, but for Kdump we need the whole low 85 * word. 86 */ 87 #define LOAD_HANDLER(reg, label) \ 88 /* Handlers must be within 64K of kbase, which must be 64k aligned */ \ 89 ori reg,reg,(label)-_stext; /* virt addr of handler ... */ 90 91 /* Exception register prefixes */ 92 #define EXC_HV H 93 #define EXC_STD 94 95 #if defined(CONFIG_RELOCATABLE) 96 /* 97 * If we support interrupts with relocation on AND we're a relocatable 98 * kernel, we need to use LR to get to the 2nd level handler. So, save/restore 99 * it when required. 100 */ 101 #define SAVE_LR(reg, area) mflr reg ; std reg,area+EX_LR(r13) 102 #define GET_LR(reg, area) ld reg,area+EX_LR(r13) 103 #define RESTORE_LR(reg, area) ld reg,area+EX_LR(r13) ; mtlr reg 104 #else 105 /* ...else LR is unused and in register. */ 106 #define SAVE_LR(reg, area) 107 #define GET_LR(reg, area) mflr reg 108 #define RESTORE_LR(reg, area) 109 #endif 110 111 /* 112 * PPR save/restore macros used in exceptions_64s.S 113 * Used for P7 or later processors 114 */ 115 #define SAVE_PPR(area, ra, rb) \ 116 BEGIN_FTR_SECTION_NESTED(940) \ 117 ld ra,PACACURRENT(r13); \ 118 ld rb,area+EX_PPR(r13); /* Read PPR from paca */ \ 119 std rb,TASKTHREADPPR(ra); \ 120 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940) 121 122 #define RESTORE_PPR_PACA(area, ra) \ 123 BEGIN_FTR_SECTION_NESTED(941) \ 124 ld ra,area+EX_PPR(r13); \ 125 mtspr SPRN_PPR,ra; \ 126 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941) 127 128 /* 129 * Increase the priority on systems where PPR save/restore is not 130 * implemented/ supported. 131 */ 132 #define HMT_MEDIUM_PPR_DISCARD \ 133 BEGIN_FTR_SECTION_NESTED(942) \ 134 HMT_MEDIUM; \ 135 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,0,942) /*non P7*/ 136 137 /* 138 * Save PPR in paca whenever some register is available to use. 139 * Then increase the priority. 140 */ 141 #define HMT_MEDIUM_PPR_SAVE(area, ra) \ 142 BEGIN_FTR_SECTION_NESTED(943) \ 143 mfspr ra,SPRN_PPR; \ 144 std ra,area+EX_PPR(r13); \ 145 HMT_MEDIUM; \ 146 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,943) 147 148 #define __EXCEPTION_PROLOG_1(area, extra, vec) \ 149 GET_PACA(r13); \ 150 std r9,area+EX_R9(r13); /* save r9 */ \ 151 HMT_MEDIUM_PPR_SAVE(area, r9); \ 152 std r10,area+EX_R10(r13); /* save r10 - r12 */ \ 153 BEGIN_FTR_SECTION_NESTED(66); \ 154 mfspr r10,SPRN_CFAR; \ 155 std r10,area+EX_CFAR(r13); \ 156 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \ 157 SAVE_LR(r10, area); \ 158 mfcr r9; \ 159 extra(vec); \ 160 std r11,area+EX_R11(r13); \ 161 std r12,area+EX_R12(r13); \ 162 GET_SCRATCH0(r10); \ 163 std r10,area+EX_R13(r13) 164 #define EXCEPTION_PROLOG_1(area, extra, vec) \ 165 __EXCEPTION_PROLOG_1(area, extra, vec) 166 167 #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \ 168 ld r12,PACAKBASE(r13); /* get high part of &label */ \ 169 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 170 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 171 LOAD_HANDLER(r12,label) \ 172 mtspr SPRN_##h##SRR0,r12; \ 173 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 174 mtspr SPRN_##h##SRR1,r10; \ 175 h##rfid; \ 176 b . /* prevent speculative execution */ 177 #define EXCEPTION_PROLOG_PSERIES_1(label, h) \ 178 __EXCEPTION_PROLOG_PSERIES_1(label, h) 179 180 #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \ 181 EXCEPTION_PROLOG_1(area, extra, vec); \ 182 EXCEPTION_PROLOG_PSERIES_1(label, h); 183 184 #define __KVMTEST(n) \ 185 lbz r10,HSTATE_IN_GUEST(r13); \ 186 cmpwi r10,0; \ 187 bne do_kvm_##n 188 189 #define __KVM_HANDLER(area, h, n) \ 190 do_kvm_##n: \ 191 ld r10,area+EX_R10(r13); \ 192 stw r9,HSTATE_SCRATCH1(r13); \ 193 ld r9,area+EX_R9(r13); \ 194 std r12,HSTATE_SCRATCH0(r13); \ 195 li r12,n; \ 196 b kvmppc_interrupt 197 198 #define __KVM_HANDLER_SKIP(area, h, n) \ 199 do_kvm_##n: \ 200 cmpwi r10,KVM_GUEST_MODE_SKIP; \ 201 ld r10,area+EX_R10(r13); \ 202 beq 89f; \ 203 stw r9,HSTATE_SCRATCH1(r13); \ 204 ld r9,area+EX_R9(r13); \ 205 std r12,HSTATE_SCRATCH0(r13); \ 206 li r12,n; \ 207 b kvmppc_interrupt; \ 208 89: mtocrf 0x80,r9; \ 209 ld r9,area+EX_R9(r13); \ 210 b kvmppc_skip_##h##interrupt 211 212 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER 213 #define KVMTEST(n) __KVMTEST(n) 214 #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n) 215 #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n) 216 217 #else 218 #define KVMTEST(n) 219 #define KVM_HANDLER(area, h, n) 220 #define KVM_HANDLER_SKIP(area, h, n) 221 #endif 222 223 #ifdef CONFIG_KVM_BOOK3S_PR 224 #define KVMTEST_PR(n) __KVMTEST(n) 225 #define KVM_HANDLER_PR(area, h, n) __KVM_HANDLER(area, h, n) 226 #define KVM_HANDLER_PR_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n) 227 228 #else 229 #define KVMTEST_PR(n) 230 #define KVM_HANDLER_PR(area, h, n) 231 #define KVM_HANDLER_PR_SKIP(area, h, n) 232 #endif 233 234 #define NOTEST(n) 235 236 /* 237 * The common exception prolog is used for all except a few exceptions 238 * such as a segment miss on a kernel address. We have to be prepared 239 * to take another exception from the point where we first touch the 240 * kernel stack onwards. 241 * 242 * On entry r13 points to the paca, r9-r13 are saved in the paca, 243 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and 244 * SRR1, and relocation is on. 245 */ 246 #define EXCEPTION_PROLOG_COMMON(n, area) \ 247 andi. r10,r12,MSR_PR; /* See if coming from user */ \ 248 mr r10,r1; /* Save r1 */ \ 249 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \ 250 beq- 1f; \ 251 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \ 252 1: cmpdi cr1,r1,0; /* check if r1 is in userspace */ \ 253 blt+ cr1,3f; /* abort if it is */ \ 254 li r1,(n); /* will be reloaded later */ \ 255 sth r1,PACA_TRAP_SAVE(r13); \ 256 std r3,area+EX_R3(r13); \ 257 addi r3,r13,area; /* r3 -> where regs are saved*/ \ 258 RESTORE_LR(r1, area); \ 259 b bad_stack; \ 260 3: std r9,_CCR(r1); /* save CR in stackframe */ \ 261 std r11,_NIP(r1); /* save SRR0 in stackframe */ \ 262 std r12,_MSR(r1); /* save SRR1 in stackframe */ \ 263 std r10,0(r1); /* make stack chain pointer */ \ 264 std r0,GPR0(r1); /* save r0 in stackframe */ \ 265 std r10,GPR1(r1); /* save r1 in stackframe */ \ 266 beq 4f; /* if from kernel mode */ \ 267 ACCOUNT_CPU_USER_ENTRY(r9, r10); \ 268 SAVE_PPR(area, r9, r10); \ 269 4: std r2,GPR2(r1); /* save r2 in stackframe */ \ 270 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \ 271 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \ 272 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \ 273 ld r10,area+EX_R10(r13); \ 274 std r9,GPR9(r1); \ 275 std r10,GPR10(r1); \ 276 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \ 277 ld r10,area+EX_R12(r13); \ 278 ld r11,area+EX_R13(r13); \ 279 std r9,GPR11(r1); \ 280 std r10,GPR12(r1); \ 281 std r11,GPR13(r1); \ 282 BEGIN_FTR_SECTION_NESTED(66); \ 283 ld r10,area+EX_CFAR(r13); \ 284 std r10,ORIG_GPR3(r1); \ 285 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \ 286 GET_LR(r9,area); /* Get LR, later save to stack */ \ 287 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \ 288 std r9,_LINK(r1); \ 289 mfctr r10; /* save CTR in stackframe */ \ 290 std r10,_CTR(r1); \ 291 lbz r10,PACASOFTIRQEN(r13); \ 292 mfspr r11,SPRN_XER; /* save XER in stackframe */ \ 293 std r10,SOFTE(r1); \ 294 std r11,_XER(r1); \ 295 li r9,(n)+1; \ 296 std r9,_TRAP(r1); /* set trap number */ \ 297 li r10,0; \ 298 ld r11,exception_marker@toc(r2); \ 299 std r10,RESULT(r1); /* clear regs->result */ \ 300 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ \ 301 ACCOUNT_STOLEN_TIME 302 303 /* 304 * Exception vectors. 305 */ 306 #define STD_EXCEPTION_PSERIES(loc, vec, label) \ 307 . = loc; \ 308 .globl label##_pSeries; \ 309 label##_pSeries: \ 310 HMT_MEDIUM_PPR_DISCARD; \ 311 SET_SCRATCH0(r13); /* save r13 */ \ 312 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 313 EXC_STD, KVMTEST_PR, vec) 314 315 #define STD_EXCEPTION_HV(loc, vec, label) \ 316 . = loc; \ 317 .globl label##_hv; \ 318 label##_hv: \ 319 HMT_MEDIUM_PPR_DISCARD; \ 320 SET_SCRATCH0(r13); /* save r13 */ \ 321 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 322 EXC_HV, KVMTEST, vec) 323 324 #define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 325 . = loc; \ 326 .globl label##_relon_pSeries; \ 327 label##_relon_pSeries: \ 328 HMT_MEDIUM_PPR_DISCARD; \ 329 /* No guest interrupts come through here */ \ 330 SET_SCRATCH0(r13); /* save r13 */ \ 331 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 332 EXC_STD, KVMTEST_PR, vec) 333 334 #define STD_RELON_EXCEPTION_HV(loc, vec, label) \ 335 . = loc; \ 336 .globl label##_relon_hv; \ 337 label##_relon_hv: \ 338 HMT_MEDIUM_PPR_DISCARD; \ 339 /* No guest interrupts come through here */ \ 340 SET_SCRATCH0(r13); /* save r13 */ \ 341 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 342 EXC_HV, KVMTEST, vec) 343 344 /* This associate vector numbers with bits in paca->irq_happened */ 345 #define SOFTEN_VALUE_0x500 PACA_IRQ_EE 346 #define SOFTEN_VALUE_0x502 PACA_IRQ_EE 347 #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC 348 #define SOFTEN_VALUE_0x982 PACA_IRQ_DEC 349 #define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL 350 #define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL 351 #define SOFTEN_VALUE_0xe82 PACA_IRQ_DBELL 352 353 #define __SOFTEN_TEST(h, vec) \ 354 lbz r10,PACASOFTIRQEN(r13); \ 355 cmpwi r10,0; \ 356 li r10,SOFTEN_VALUE_##vec; \ 357 beq masked_##h##interrupt 358 #define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec) 359 360 #define SOFTEN_TEST_PR(vec) \ 361 KVMTEST_PR(vec); \ 362 _SOFTEN_TEST(EXC_STD, vec) 363 364 #define SOFTEN_TEST_HV(vec) \ 365 KVMTEST(vec); \ 366 _SOFTEN_TEST(EXC_HV, vec) 367 368 #define SOFTEN_TEST_HV_201(vec) \ 369 KVMTEST(vec); \ 370 _SOFTEN_TEST(EXC_STD, vec) 371 372 #define SOFTEN_NOTEST_PR(vec) _SOFTEN_TEST(EXC_STD, vec) 373 #define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec) 374 375 #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 376 HMT_MEDIUM_PPR_DISCARD; \ 377 SET_SCRATCH0(r13); /* save r13 */ \ 378 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 379 EXCEPTION_PROLOG_PSERIES_1(label##_common, h); 380 #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 381 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) 382 383 #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \ 384 . = loc; \ 385 .globl label##_pSeries; \ 386 label##_pSeries: \ 387 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 388 EXC_STD, SOFTEN_TEST_PR) 389 390 #define MASKABLE_EXCEPTION_HV(loc, vec, label) \ 391 . = loc; \ 392 .globl label##_hv; \ 393 label##_hv: \ 394 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 395 EXC_HV, SOFTEN_TEST_HV) 396 397 #define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 398 HMT_MEDIUM_PPR_DISCARD; \ 399 SET_SCRATCH0(r13); /* save r13 */ \ 400 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 401 EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, h); 402 #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 403 __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) 404 405 #define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 406 . = loc; \ 407 .globl label##_relon_pSeries; \ 408 label##_relon_pSeries: \ 409 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 410 EXC_STD, SOFTEN_NOTEST_PR) 411 412 #define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label) \ 413 . = loc; \ 414 .globl label##_relon_hv; \ 415 label##_relon_hv: \ 416 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 417 EXC_HV, SOFTEN_NOTEST_HV) 418 419 /* 420 * Our exception common code can be passed various "additions" 421 * to specify the behaviour of interrupts, whether to kick the 422 * runlatch, etc... 423 */ 424 425 /* Exception addition: Hard disable interrupts */ 426 #define DISABLE_INTS SOFT_DISABLE_INTS(r10,r11) 427 428 #define ADD_NVGPRS \ 429 bl .save_nvgprs 430 431 #define RUNLATCH_ON \ 432 BEGIN_FTR_SECTION \ 433 CURRENT_THREAD_INFO(r3, r1); \ 434 ld r4,TI_LOCAL_FLAGS(r3); \ 435 andi. r0,r4,_TLF_RUNLATCH; \ 436 beql ppc64_runlatch_on_trampoline; \ 437 END_FTR_SECTION_IFSET(CPU_FTR_CTRL) 438 439 #define EXCEPTION_COMMON(trap, label, hdlr, ret, additions) \ 440 .align 7; \ 441 .globl label##_common; \ 442 label##_common: \ 443 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \ 444 additions; \ 445 addi r3,r1,STACK_FRAME_OVERHEAD; \ 446 bl hdlr; \ 447 b ret 448 449 #define STD_EXCEPTION_COMMON(trap, label, hdlr) \ 450 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except, \ 451 ADD_NVGPRS;DISABLE_INTS) 452 453 /* 454 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur 455 * in the idle task and therefore need the special idle handling 456 * (finish nap and runlatch) 457 */ 458 #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \ 459 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except_lite, \ 460 FINISH_NAP;RUNLATCH_ON;DISABLE_INTS) 461 462 /* 463 * When the idle code in power4_idle puts the CPU into NAP mode, 464 * it has to do so in a loop, and relies on the external interrupt 465 * and decrementer interrupt entry code to get it out of the loop. 466 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags 467 * to signal that it is in the loop and needs help to get out. 468 */ 469 #ifdef CONFIG_PPC_970_NAP 470 #define FINISH_NAP \ 471 BEGIN_FTR_SECTION \ 472 CURRENT_THREAD_INFO(r11, r1); \ 473 ld r9,TI_LOCAL_FLAGS(r11); \ 474 andi. r10,r9,_TLF_NAPPING; \ 475 bnel power4_fixup_nap; \ 476 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) 477 #else 478 #define FINISH_NAP 479 #endif 480 481 #endif /* _ASM_POWERPC_EXCEPTION_H */ 482