1 #ifndef _ASM_POWERPC_EXCEPTION_H 2 #define _ASM_POWERPC_EXCEPTION_H 3 /* 4 * Extracted from head_64.S 5 * 6 * PowerPC version 7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 8 * 9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP 10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> 11 * Adapted for Power Macintosh by Paul Mackerras. 12 * Low-level exception handlers and MMU support 13 * rewritten by Paul Mackerras. 14 * Copyright (C) 1996 Paul Mackerras. 15 * 16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and 17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com 18 * 19 * This file contains the low-level support and setup for the 20 * PowerPC-64 platform, including trap and interrupt dispatch. 21 * 22 * This program is free software; you can redistribute it and/or 23 * modify it under the terms of the GNU General Public License 24 * as published by the Free Software Foundation; either version 25 * 2 of the License, or (at your option) any later version. 26 */ 27 /* 28 * The following macros define the code that appears as 29 * the prologue to each of the exception handlers. They 30 * are split into two parts to allow a single kernel binary 31 * to be used for pSeries and iSeries. 32 * 33 * We make as much of the exception code common between native 34 * exception handlers (including pSeries LPAR) and iSeries LPAR 35 * implementations as possible. 36 */ 37 #include <asm/head-64.h> 38 39 /* PACA save area offsets (exgen, exmc, etc) */ 40 #define EX_R9 0 41 #define EX_R10 8 42 #define EX_R11 16 43 #define EX_R12 24 44 #define EX_R13 32 45 #define EX_DAR 40 46 #define EX_DSISR 48 47 #define EX_CCR 52 48 #define EX_R3 56 49 #define EX_LR 64 50 #define EX_CFAR 72 51 #define EX_PPR 80 /* SMT thread status register (priority) */ 52 #define EX_CTR 88 53 54 #define EX_SIZE 12 /* size in u64 units */ 55 56 #ifdef CONFIG_RELOCATABLE 57 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 58 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 59 LOAD_HANDLER(r12,label); \ 60 mtctr r12; \ 61 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 62 li r10,MSR_RI; \ 63 mtmsrd r10,1; /* Set RI (EE=0) */ \ 64 bctr; 65 #else 66 /* If not relocatable, we can jump directly -- and save messing with LR */ 67 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 68 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 69 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 70 li r10,MSR_RI; \ 71 mtmsrd r10,1; /* Set RI (EE=0) */ \ 72 b label; 73 #endif 74 #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 75 __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 76 77 /* 78 * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on 79 * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which 80 * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr. 81 */ 82 #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \ 83 EXCEPTION_PROLOG_0(area); \ 84 EXCEPTION_PROLOG_1(area, extra, vec); \ 85 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 86 87 /* 88 * We're short on space and time in the exception prolog, so we can't 89 * use the normal LOAD_REG_IMMEDIATE macro to load the address of label. 90 * Instead we get the base of the kernel from paca->kernelbase and or in the low 91 * part of label. This requires that the label be within 64KB of kernelbase, and 92 * that kernelbase be 64K aligned. 93 */ 94 #define LOAD_HANDLER(reg, label) \ 95 ld reg,PACAKBASE(r13); /* get high part of &label */ \ 96 ori reg,reg,FIXED_SYMBOL_ABS_ADDR(label); 97 98 #define __LOAD_HANDLER(reg, label) \ 99 ld reg,PACAKBASE(r13); \ 100 ori reg,reg,(ABS_ADDR(label))@l; 101 102 /* 103 * Branches from unrelocated code (e.g., interrupts) to labels outside 104 * head-y require >64K offsets. 105 */ 106 #define __LOAD_FAR_HANDLER(reg, label) \ 107 ld reg,PACAKBASE(r13); \ 108 ori reg,reg,(ABS_ADDR(label))@l; \ 109 addis reg,reg,(ABS_ADDR(label))@h; 110 111 /* Exception register prefixes */ 112 #define EXC_HV H 113 #define EXC_STD 114 115 #if defined(CONFIG_RELOCATABLE) 116 /* 117 * If we support interrupts with relocation on AND we're a relocatable kernel, 118 * we need to use CTR to get to the 2nd level handler. So, save/restore it 119 * when required. 120 */ 121 #define SAVE_CTR(reg, area) mfctr reg ; std reg,area+EX_CTR(r13) 122 #define GET_CTR(reg, area) ld reg,area+EX_CTR(r13) 123 #define RESTORE_CTR(reg, area) ld reg,area+EX_CTR(r13) ; mtctr reg 124 #else 125 /* ...else CTR is unused and in register. */ 126 #define SAVE_CTR(reg, area) 127 #define GET_CTR(reg, area) mfctr reg 128 #define RESTORE_CTR(reg, area) 129 #endif 130 131 /* 132 * PPR save/restore macros used in exceptions_64s.S 133 * Used for P7 or later processors 134 */ 135 #define SAVE_PPR(area, ra, rb) \ 136 BEGIN_FTR_SECTION_NESTED(940) \ 137 ld ra,PACACURRENT(r13); \ 138 ld rb,area+EX_PPR(r13); /* Read PPR from paca */ \ 139 std rb,TASKTHREADPPR(ra); \ 140 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940) 141 142 #define RESTORE_PPR_PACA(area, ra) \ 143 BEGIN_FTR_SECTION_NESTED(941) \ 144 ld ra,area+EX_PPR(r13); \ 145 mtspr SPRN_PPR,ra; \ 146 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941) 147 148 /* 149 * Get an SPR into a register if the CPU has the given feature 150 */ 151 #define OPT_GET_SPR(ra, spr, ftr) \ 152 BEGIN_FTR_SECTION_NESTED(943) \ 153 mfspr ra,spr; \ 154 END_FTR_SECTION_NESTED(ftr,ftr,943) 155 156 /* 157 * Set an SPR from a register if the CPU has the given feature 158 */ 159 #define OPT_SET_SPR(ra, spr, ftr) \ 160 BEGIN_FTR_SECTION_NESTED(943) \ 161 mtspr spr,ra; \ 162 END_FTR_SECTION_NESTED(ftr,ftr,943) 163 164 /* 165 * Save a register to the PACA if the CPU has the given feature 166 */ 167 #define OPT_SAVE_REG_TO_PACA(offset, ra, ftr) \ 168 BEGIN_FTR_SECTION_NESTED(943) \ 169 std ra,offset(r13); \ 170 END_FTR_SECTION_NESTED(ftr,ftr,943) 171 172 #define EXCEPTION_PROLOG_0(area) \ 173 GET_PACA(r13); \ 174 std r9,area+EX_R9(r13); /* save r9 */ \ 175 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \ 176 HMT_MEDIUM; \ 177 std r10,area+EX_R10(r13); /* save r10 - r12 */ \ 178 OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR) 179 180 #define __EXCEPTION_PROLOG_1(area, extra, vec) \ 181 OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \ 182 OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \ 183 SAVE_CTR(r10, area); \ 184 mfcr r9; \ 185 extra(vec); \ 186 std r11,area+EX_R11(r13); \ 187 std r12,area+EX_R12(r13); \ 188 GET_SCRATCH0(r10); \ 189 std r10,area+EX_R13(r13) 190 #define EXCEPTION_PROLOG_1(area, extra, vec) \ 191 __EXCEPTION_PROLOG_1(area, extra, vec) 192 193 #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \ 194 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 195 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 196 LOAD_HANDLER(r12,label) \ 197 mtspr SPRN_##h##SRR0,r12; \ 198 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 199 mtspr SPRN_##h##SRR1,r10; \ 200 h##rfid; \ 201 b . /* prevent speculative execution */ 202 #define EXCEPTION_PROLOG_PSERIES_1(label, h) \ 203 __EXCEPTION_PROLOG_PSERIES_1(label, h) 204 205 /* _NORI variant keeps MSR_RI clear */ 206 #define __EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) \ 207 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 208 xori r10,r10,MSR_RI; /* Clear MSR_RI */ \ 209 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 210 LOAD_HANDLER(r12,label) \ 211 mtspr SPRN_##h##SRR0,r12; \ 212 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 213 mtspr SPRN_##h##SRR1,r10; \ 214 h##rfid; \ 215 b . /* prevent speculative execution */ 216 217 #define EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) \ 218 __EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) 219 220 #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \ 221 EXCEPTION_PROLOG_0(area); \ 222 EXCEPTION_PROLOG_1(area, extra, vec); \ 223 EXCEPTION_PROLOG_PSERIES_1(label, h); 224 225 #define __KVMTEST(h, n) \ 226 lbz r10,HSTATE_IN_GUEST(r13); \ 227 cmpwi r10,0; \ 228 bne do_kvm_##h##n 229 230 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 231 /* 232 * If hv is possible, interrupts come into to the hv version 233 * of the kvmppc_interrupt code, which then jumps to the PR handler, 234 * kvmppc_interrupt_pr, if the guest is a PR guest. 235 */ 236 #define kvmppc_interrupt kvmppc_interrupt_hv 237 #else 238 #define kvmppc_interrupt kvmppc_interrupt_pr 239 #endif 240 241 /* 242 * Branch to label using its 0xC000 address. This results in instruction 243 * address suitable for MSR[IR]=0 or 1, which allows relocation to be turned 244 * on using mtmsr rather than rfid. 245 * 246 * This could set the 0xc bits for !RELOCATABLE as an immediate, rather than 247 * load KBASE for a slight optimisation. 248 */ 249 #define BRANCH_TO_C000(reg, label) \ 250 __LOAD_HANDLER(reg, label); \ 251 mtctr reg; \ 252 bctr 253 254 #ifdef CONFIG_RELOCATABLE 255 #define BRANCH_TO_COMMON(reg, label) \ 256 __LOAD_HANDLER(reg, label); \ 257 mtctr reg; \ 258 bctr 259 260 #define BRANCH_LINK_TO_FAR(label) \ 261 __LOAD_FAR_HANDLER(r12, label); \ 262 mtctr r12; \ 263 bctrl 264 265 /* 266 * KVM requires __LOAD_FAR_HANDLER. 267 * 268 * __BRANCH_TO_KVM_EXIT branches are also a special case because they 269 * explicitly use r9 then reload it from PACA before branching. Hence 270 * the double-underscore. 271 */ 272 #define __BRANCH_TO_KVM_EXIT(area, label) \ 273 mfctr r9; \ 274 std r9,HSTATE_SCRATCH1(r13); \ 275 __LOAD_FAR_HANDLER(r9, label); \ 276 mtctr r9; \ 277 ld r9,area+EX_R9(r13); \ 278 bctr 279 280 #else 281 #define BRANCH_TO_COMMON(reg, label) \ 282 b label 283 284 #define BRANCH_LINK_TO_FAR(label) \ 285 bl label 286 287 #define __BRANCH_TO_KVM_EXIT(area, label) \ 288 ld r9,area+EX_R9(r13); \ 289 b label 290 291 #endif 292 293 /* Do not enable RI */ 294 #define EXCEPTION_PROLOG_PSERIES_NORI(area, label, h, extra, vec) \ 295 EXCEPTION_PROLOG_0(area); \ 296 EXCEPTION_PROLOG_1(area, extra, vec); \ 297 EXCEPTION_PROLOG_PSERIES_1_NORI(label, h); 298 299 300 #define __KVM_HANDLER(area, h, n) \ 301 BEGIN_FTR_SECTION_NESTED(947) \ 302 ld r10,area+EX_CFAR(r13); \ 303 std r10,HSTATE_CFAR(r13); \ 304 END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947); \ 305 BEGIN_FTR_SECTION_NESTED(948) \ 306 ld r10,area+EX_PPR(r13); \ 307 std r10,HSTATE_PPR(r13); \ 308 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 309 ld r10,area+EX_R10(r13); \ 310 std r12,HSTATE_SCRATCH0(r13); \ 311 sldi r12,r9,32; \ 312 ori r12,r12,(n); \ 313 /* This reloads r9 before branching to kvmppc_interrupt */ \ 314 __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt) 315 316 #define __KVM_HANDLER_SKIP(area, h, n) \ 317 cmpwi r10,KVM_GUEST_MODE_SKIP; \ 318 beq 89f; \ 319 BEGIN_FTR_SECTION_NESTED(948) \ 320 ld r10,area+EX_PPR(r13); \ 321 std r10,HSTATE_PPR(r13); \ 322 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 323 ld r10,area+EX_R10(r13); \ 324 std r12,HSTATE_SCRATCH0(r13); \ 325 sldi r12,r9,32; \ 326 ori r12,r12,(n); \ 327 /* This reloads r9 before branching to kvmppc_interrupt */ \ 328 __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt); \ 329 89: mtocrf 0x80,r9; \ 330 ld r9,area+EX_R9(r13); \ 331 ld r10,area+EX_R10(r13); \ 332 b kvmppc_skip_##h##interrupt 333 334 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER 335 #define KVMTEST(h, n) __KVMTEST(h, n) 336 #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n) 337 #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n) 338 339 #else 340 #define KVMTEST(h, n) 341 #define KVM_HANDLER(area, h, n) 342 #define KVM_HANDLER_SKIP(area, h, n) 343 #endif 344 345 #define NOTEST(n) 346 347 #define EXCEPTION_PROLOG_COMMON_1() \ 348 std r9,_CCR(r1); /* save CR in stackframe */ \ 349 std r11,_NIP(r1); /* save SRR0 in stackframe */ \ 350 std r12,_MSR(r1); /* save SRR1 in stackframe */ \ 351 std r10,0(r1); /* make stack chain pointer */ \ 352 std r0,GPR0(r1); /* save r0 in stackframe */ \ 353 std r10,GPR1(r1); /* save r1 in stackframe */ \ 354 355 356 /* 357 * The common exception prolog is used for all except a few exceptions 358 * such as a segment miss on a kernel address. We have to be prepared 359 * to take another exception from the point where we first touch the 360 * kernel stack onwards. 361 * 362 * On entry r13 points to the paca, r9-r13 are saved in the paca, 363 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and 364 * SRR1, and relocation is on. 365 */ 366 #define EXCEPTION_PROLOG_COMMON(n, area) \ 367 andi. r10,r12,MSR_PR; /* See if coming from user */ \ 368 mr r10,r1; /* Save r1 */ \ 369 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \ 370 beq- 1f; \ 371 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \ 372 1: cmpdi cr1,r1,-INT_FRAME_SIZE; /* check if r1 is in userspace */ \ 373 blt+ cr1,3f; /* abort if it is */ \ 374 li r1,(n); /* will be reloaded later */ \ 375 sth r1,PACA_TRAP_SAVE(r13); \ 376 std r3,area+EX_R3(r13); \ 377 addi r3,r13,area; /* r3 -> where regs are saved*/ \ 378 RESTORE_CTR(r1, area); \ 379 b bad_stack; \ 380 3: EXCEPTION_PROLOG_COMMON_1(); \ 381 beq 4f; /* if from kernel mode */ \ 382 ACCOUNT_CPU_USER_ENTRY(r13, r9, r10); \ 383 SAVE_PPR(area, r9, r10); \ 384 4: EXCEPTION_PROLOG_COMMON_2(area) \ 385 EXCEPTION_PROLOG_COMMON_3(n) \ 386 ACCOUNT_STOLEN_TIME 387 388 /* Save original regs values from save area to stack frame. */ 389 #define EXCEPTION_PROLOG_COMMON_2(area) \ 390 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \ 391 ld r10,area+EX_R10(r13); \ 392 std r9,GPR9(r1); \ 393 std r10,GPR10(r1); \ 394 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \ 395 ld r10,area+EX_R12(r13); \ 396 ld r11,area+EX_R13(r13); \ 397 std r9,GPR11(r1); \ 398 std r10,GPR12(r1); \ 399 std r11,GPR13(r1); \ 400 BEGIN_FTR_SECTION_NESTED(66); \ 401 ld r10,area+EX_CFAR(r13); \ 402 std r10,ORIG_GPR3(r1); \ 403 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \ 404 GET_CTR(r10, area); \ 405 std r10,_CTR(r1); 406 407 #define EXCEPTION_PROLOG_COMMON_3(n) \ 408 std r2,GPR2(r1); /* save r2 in stackframe */ \ 409 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \ 410 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \ 411 mflr r9; /* Get LR, later save to stack */ \ 412 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \ 413 std r9,_LINK(r1); \ 414 lbz r10,PACASOFTIRQEN(r13); \ 415 mfspr r11,SPRN_XER; /* save XER in stackframe */ \ 416 std r10,SOFTE(r1); \ 417 std r11,_XER(r1); \ 418 li r9,(n)+1; \ 419 std r9,_TRAP(r1); /* set trap number */ \ 420 li r10,0; \ 421 ld r11,exception_marker@toc(r2); \ 422 std r10,RESULT(r1); /* clear regs->result */ \ 423 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ 424 425 /* 426 * Exception vectors. 427 */ 428 #define STD_EXCEPTION_PSERIES(vec, label) \ 429 SET_SCRATCH0(r13); /* save r13 */ \ 430 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \ 431 EXC_STD, KVMTEST_PR, vec); \ 432 433 /* Version of above for when we have to branch out-of-line */ 434 #define __OOL_EXCEPTION(vec, label, hdlr) \ 435 SET_SCRATCH0(r13) \ 436 EXCEPTION_PROLOG_0(PACA_EXGEN) \ 437 b hdlr; 438 439 #define STD_EXCEPTION_PSERIES_OOL(vec, label) \ 440 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \ 441 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD) 442 443 #define STD_EXCEPTION_HV(loc, vec, label) \ 444 SET_SCRATCH0(r13); /* save r13 */ \ 445 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \ 446 EXC_HV, KVMTEST_HV, vec); 447 448 #define STD_EXCEPTION_HV_OOL(vec, label) \ 449 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \ 450 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) 451 452 #define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 453 /* No guest interrupts come through here */ \ 454 SET_SCRATCH0(r13); /* save r13 */ \ 455 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, EXC_STD, NOTEST, vec); 456 457 #define STD_RELON_EXCEPTION_PSERIES_OOL(vec, label) \ 458 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \ 459 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_STD) 460 461 #define STD_RELON_EXCEPTION_HV(loc, vec, label) \ 462 SET_SCRATCH0(r13); /* save r13 */ \ 463 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, \ 464 EXC_HV, KVMTEST_HV, vec); 465 466 #define STD_RELON_EXCEPTION_HV_OOL(vec, label) \ 467 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \ 468 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV) 469 470 /* This associate vector numbers with bits in paca->irq_happened */ 471 #define SOFTEN_VALUE_0x500 PACA_IRQ_EE 472 #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC 473 #define SOFTEN_VALUE_0x980 PACA_IRQ_DEC 474 #define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL 475 #define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL 476 #define SOFTEN_VALUE_0xe60 PACA_IRQ_HMI 477 #define SOFTEN_VALUE_0xea0 PACA_IRQ_EE 478 479 #define __SOFTEN_TEST(h, vec) \ 480 lbz r10,PACASOFTIRQEN(r13); \ 481 cmpwi r10,0; \ 482 li r10,SOFTEN_VALUE_##vec; \ 483 beq masked_##h##interrupt 484 485 #define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec) 486 487 #define SOFTEN_TEST_PR(vec) \ 488 KVMTEST(EXC_STD, vec); \ 489 _SOFTEN_TEST(EXC_STD, vec) 490 491 #define SOFTEN_TEST_HV(vec) \ 492 KVMTEST(EXC_HV, vec); \ 493 _SOFTEN_TEST(EXC_HV, vec) 494 495 #define KVMTEST_PR(vec) \ 496 KVMTEST(EXC_STD, vec) 497 498 #define KVMTEST_HV(vec) \ 499 KVMTEST(EXC_HV, vec) 500 501 #define SOFTEN_NOTEST_PR(vec) _SOFTEN_TEST(EXC_STD, vec) 502 #define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec) 503 504 #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 505 SET_SCRATCH0(r13); /* save r13 */ \ 506 EXCEPTION_PROLOG_0(PACA_EXGEN); \ 507 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 508 EXCEPTION_PROLOG_PSERIES_1(label, h); 509 510 #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 511 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) 512 513 #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \ 514 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 515 EXC_STD, SOFTEN_TEST_PR) 516 517 #define MASKABLE_EXCEPTION_PSERIES_OOL(vec, label) \ 518 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, vec); \ 519 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD) 520 521 #define MASKABLE_EXCEPTION_HV(loc, vec, label) \ 522 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 523 EXC_HV, SOFTEN_TEST_HV) 524 525 #define MASKABLE_EXCEPTION_HV_OOL(vec, label) \ 526 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \ 527 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) 528 529 #define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 530 SET_SCRATCH0(r13); /* save r13 */ \ 531 EXCEPTION_PROLOG_0(PACA_EXGEN); \ 532 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 533 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 534 535 #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 536 __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) 537 538 #define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 539 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 540 EXC_STD, SOFTEN_NOTEST_PR) 541 542 #define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label) \ 543 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 544 EXC_HV, SOFTEN_TEST_HV) 545 546 #define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label) \ 547 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \ 548 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV) 549 550 /* 551 * Our exception common code can be passed various "additions" 552 * to specify the behaviour of interrupts, whether to kick the 553 * runlatch, etc... 554 */ 555 556 /* 557 * This addition reconciles our actual IRQ state with the various software 558 * flags that track it. This may call C code. 559 */ 560 #define ADD_RECONCILE RECONCILE_IRQ_STATE(r10,r11) 561 562 #define ADD_NVGPRS \ 563 bl save_nvgprs 564 565 #define RUNLATCH_ON \ 566 BEGIN_FTR_SECTION \ 567 CURRENT_THREAD_INFO(r3, r1); \ 568 ld r4,TI_LOCAL_FLAGS(r3); \ 569 andi. r0,r4,_TLF_RUNLATCH; \ 570 beql ppc64_runlatch_on_trampoline; \ 571 END_FTR_SECTION_IFSET(CPU_FTR_CTRL) 572 573 #define EXCEPTION_COMMON(area, trap, label, hdlr, ret, additions) \ 574 EXCEPTION_PROLOG_COMMON(trap, area); \ 575 /* Volatile regs are potentially clobbered here */ \ 576 additions; \ 577 addi r3,r1,STACK_FRAME_OVERHEAD; \ 578 bl hdlr; \ 579 b ret 580 581 /* 582 * Exception where stack is already set in r1, r1 is saved in r10, and it 583 * continues rather than returns. 584 */ 585 #define EXCEPTION_COMMON_NORET_STACK(area, trap, label, hdlr, additions) \ 586 EXCEPTION_PROLOG_COMMON_1(); \ 587 EXCEPTION_PROLOG_COMMON_2(area); \ 588 EXCEPTION_PROLOG_COMMON_3(trap); \ 589 /* Volatile regs are potentially clobbered here */ \ 590 additions; \ 591 addi r3,r1,STACK_FRAME_OVERHEAD; \ 592 bl hdlr 593 594 #define STD_EXCEPTION_COMMON(trap, label, hdlr) \ 595 EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr, \ 596 ret_from_except, ADD_NVGPRS;ADD_RECONCILE) 597 598 /* 599 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur 600 * in the idle task and therefore need the special idle handling 601 * (finish nap and runlatch) 602 */ 603 #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \ 604 EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr, \ 605 ret_from_except_lite, FINISH_NAP;ADD_RECONCILE;RUNLATCH_ON) 606 607 /* 608 * When the idle code in power4_idle puts the CPU into NAP mode, 609 * it has to do so in a loop, and relies on the external interrupt 610 * and decrementer interrupt entry code to get it out of the loop. 611 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags 612 * to signal that it is in the loop and needs help to get out. 613 */ 614 #ifdef CONFIG_PPC_970_NAP 615 #define FINISH_NAP \ 616 BEGIN_FTR_SECTION \ 617 CURRENT_THREAD_INFO(r11, r1); \ 618 ld r9,TI_LOCAL_FLAGS(r11); \ 619 andi. r10,r9,_TLF_NAPPING; \ 620 bnel power4_fixup_nap; \ 621 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) 622 #else 623 #define FINISH_NAP 624 #endif 625 626 #endif /* _ASM_POWERPC_EXCEPTION_H */ 627