1 #ifndef _ASM_POWERPC_EXCEPTION_H 2 #define _ASM_POWERPC_EXCEPTION_H 3 /* 4 * Extracted from head_64.S 5 * 6 * PowerPC version 7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 8 * 9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP 10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> 11 * Adapted for Power Macintosh by Paul Mackerras. 12 * Low-level exception handlers and MMU support 13 * rewritten by Paul Mackerras. 14 * Copyright (C) 1996 Paul Mackerras. 15 * 16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and 17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com 18 * 19 * This file contains the low-level support and setup for the 20 * PowerPC-64 platform, including trap and interrupt dispatch. 21 * 22 * This program is free software; you can redistribute it and/or 23 * modify it under the terms of the GNU General Public License 24 * as published by the Free Software Foundation; either version 25 * 2 of the License, or (at your option) any later version. 26 */ 27 /* 28 * The following macros define the code that appears as 29 * the prologue to each of the exception handlers. They 30 * are split into two parts to allow a single kernel binary 31 * to be used for pSeries and iSeries. 32 * 33 * We make as much of the exception code common between native 34 * exception handlers (including pSeries LPAR) and iSeries LPAR 35 * implementations as possible. 36 */ 37 #include <asm/head-64.h> 38 39 #define EX_R9 0 40 #define EX_R10 8 41 #define EX_R11 16 42 #define EX_R12 24 43 #define EX_R13 32 44 #define EX_SRR0 40 45 #define EX_DAR 48 46 #define EX_DSISR 56 47 #define EX_CCR 60 48 #define EX_R3 64 49 #define EX_LR 72 50 #define EX_CFAR 80 51 #define EX_PPR 88 /* SMT thread status register (priority) */ 52 #define EX_CTR 96 53 54 #ifdef CONFIG_RELOCATABLE 55 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 56 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 57 LOAD_HANDLER(r12,label); \ 58 mtctr r12; \ 59 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 60 li r10,MSR_RI; \ 61 mtmsrd r10,1; /* Set RI (EE=0) */ \ 62 bctr; 63 #else 64 /* If not relocatable, we can jump directly -- and save messing with LR */ 65 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 66 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 67 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 68 li r10,MSR_RI; \ 69 mtmsrd r10,1; /* Set RI (EE=0) */ \ 70 b label; 71 #endif 72 #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 73 __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 74 75 /* 76 * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on 77 * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which 78 * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr. 79 */ 80 #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \ 81 EXCEPTION_PROLOG_0(area); \ 82 EXCEPTION_PROLOG_1(area, extra, vec); \ 83 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 84 85 /* 86 * We're short on space and time in the exception prolog, so we can't 87 * use the normal LOAD_REG_IMMEDIATE macro to load the address of label. 88 * Instead we get the base of the kernel from paca->kernelbase and or in the low 89 * part of label. This requires that the label be within 64KB of kernelbase, and 90 * that kernelbase be 64K aligned. 91 */ 92 #define LOAD_HANDLER(reg, label) \ 93 ld reg,PACAKBASE(r13); /* get high part of &label */ \ 94 ori reg,reg,FIXED_SYMBOL_ABS_ADDR(label); 95 96 #define __LOAD_HANDLER(reg, label) \ 97 ld reg,PACAKBASE(r13); \ 98 ori reg,reg,(ABS_ADDR(label))@l; 99 100 /* 101 * Branches from unrelocated code (e.g., interrupts) to labels outside 102 * head-y require >64K offsets. 103 */ 104 #define __LOAD_FAR_HANDLER(reg, label) \ 105 ld reg,PACAKBASE(r13); \ 106 ori reg,reg,(ABS_ADDR(label))@l; \ 107 addis reg,reg,(ABS_ADDR(label))@h; 108 109 /* Exception register prefixes */ 110 #define EXC_HV H 111 #define EXC_STD 112 113 #if defined(CONFIG_RELOCATABLE) 114 /* 115 * If we support interrupts with relocation on AND we're a relocatable kernel, 116 * we need to use CTR to get to the 2nd level handler. So, save/restore it 117 * when required. 118 */ 119 #define SAVE_CTR(reg, area) mfctr reg ; std reg,area+EX_CTR(r13) 120 #define GET_CTR(reg, area) ld reg,area+EX_CTR(r13) 121 #define RESTORE_CTR(reg, area) ld reg,area+EX_CTR(r13) ; mtctr reg 122 #else 123 /* ...else CTR is unused and in register. */ 124 #define SAVE_CTR(reg, area) 125 #define GET_CTR(reg, area) mfctr reg 126 #define RESTORE_CTR(reg, area) 127 #endif 128 129 /* 130 * PPR save/restore macros used in exceptions_64s.S 131 * Used for P7 or later processors 132 */ 133 #define SAVE_PPR(area, ra, rb) \ 134 BEGIN_FTR_SECTION_NESTED(940) \ 135 ld ra,PACACURRENT(r13); \ 136 ld rb,area+EX_PPR(r13); /* Read PPR from paca */ \ 137 std rb,TASKTHREADPPR(ra); \ 138 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940) 139 140 #define RESTORE_PPR_PACA(area, ra) \ 141 BEGIN_FTR_SECTION_NESTED(941) \ 142 ld ra,area+EX_PPR(r13); \ 143 mtspr SPRN_PPR,ra; \ 144 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941) 145 146 /* 147 * Get an SPR into a register if the CPU has the given feature 148 */ 149 #define OPT_GET_SPR(ra, spr, ftr) \ 150 BEGIN_FTR_SECTION_NESTED(943) \ 151 mfspr ra,spr; \ 152 END_FTR_SECTION_NESTED(ftr,ftr,943) 153 154 /* 155 * Set an SPR from a register if the CPU has the given feature 156 */ 157 #define OPT_SET_SPR(ra, spr, ftr) \ 158 BEGIN_FTR_SECTION_NESTED(943) \ 159 mtspr spr,ra; \ 160 END_FTR_SECTION_NESTED(ftr,ftr,943) 161 162 /* 163 * Save a register to the PACA if the CPU has the given feature 164 */ 165 #define OPT_SAVE_REG_TO_PACA(offset, ra, ftr) \ 166 BEGIN_FTR_SECTION_NESTED(943) \ 167 std ra,offset(r13); \ 168 END_FTR_SECTION_NESTED(ftr,ftr,943) 169 170 #define EXCEPTION_PROLOG_0_PACA(area) \ 171 std r9,area+EX_R9(r13); /* save r9 */ \ 172 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \ 173 HMT_MEDIUM; \ 174 std r10,area+EX_R10(r13); /* save r10 - r12 */ \ 175 OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR) 176 177 #define EXCEPTION_PROLOG_0(area) \ 178 GET_PACA(r13); \ 179 EXCEPTION_PROLOG_0_PACA(area) 180 181 #define __EXCEPTION_PROLOG_1(area, extra, vec) \ 182 OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \ 183 OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \ 184 SAVE_CTR(r10, area); \ 185 mfcr r9; \ 186 extra(vec); \ 187 std r11,area+EX_R11(r13); \ 188 std r12,area+EX_R12(r13); \ 189 GET_SCRATCH0(r10); \ 190 std r10,area+EX_R13(r13) 191 #define EXCEPTION_PROLOG_1(area, extra, vec) \ 192 __EXCEPTION_PROLOG_1(area, extra, vec) 193 194 #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \ 195 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 196 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 197 LOAD_HANDLER(r12,label) \ 198 mtspr SPRN_##h##SRR0,r12; \ 199 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 200 mtspr SPRN_##h##SRR1,r10; \ 201 h##rfid; \ 202 b . /* prevent speculative execution */ 203 #define EXCEPTION_PROLOG_PSERIES_1(label, h) \ 204 __EXCEPTION_PROLOG_PSERIES_1(label, h) 205 206 #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \ 207 EXCEPTION_PROLOG_0(area); \ 208 EXCEPTION_PROLOG_1(area, extra, vec); \ 209 EXCEPTION_PROLOG_PSERIES_1(label, h); 210 211 /* Have the PACA in r13 already */ 212 #define EXCEPTION_PROLOG_PSERIES_PACA(area, label, h, extra, vec) \ 213 EXCEPTION_PROLOG_0_PACA(area); \ 214 EXCEPTION_PROLOG_1(area, extra, vec); \ 215 EXCEPTION_PROLOG_PSERIES_1(label, h); 216 217 #define __KVMTEST(h, n) \ 218 lbz r10,HSTATE_IN_GUEST(r13); \ 219 cmpwi r10,0; \ 220 bne do_kvm_##h##n 221 222 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 223 /* 224 * If hv is possible, interrupts come into to the hv version 225 * of the kvmppc_interrupt code, which then jumps to the PR handler, 226 * kvmppc_interrupt_pr, if the guest is a PR guest. 227 */ 228 #define kvmppc_interrupt kvmppc_interrupt_hv 229 #else 230 #define kvmppc_interrupt kvmppc_interrupt_pr 231 #endif 232 233 #ifdef CONFIG_RELOCATABLE 234 #define BRANCH_TO_COMMON(reg, label) \ 235 __LOAD_HANDLER(reg, label); \ 236 mtctr reg; \ 237 bctr 238 239 #define BRANCH_LINK_TO_FAR(reg, label) \ 240 __LOAD_FAR_HANDLER(reg, label); \ 241 mtctr reg; \ 242 bctrl 243 244 /* 245 * KVM requires __LOAD_FAR_HANDLER. 246 * 247 * __BRANCH_TO_KVM_EXIT branches are also a special case because they 248 * explicitly use r9 then reload it from PACA before branching. Hence 249 * the double-underscore. 250 */ 251 #define __BRANCH_TO_KVM_EXIT(area, label) \ 252 mfctr r9; \ 253 std r9,HSTATE_SCRATCH1(r13); \ 254 __LOAD_FAR_HANDLER(r9, label); \ 255 mtctr r9; \ 256 ld r9,area+EX_R9(r13); \ 257 bctr 258 259 #else 260 #define BRANCH_TO_COMMON(reg, label) \ 261 b label 262 263 #define BRANCH_LINK_TO_FAR(reg, label) \ 264 bl label 265 266 #define __BRANCH_TO_KVM_EXIT(area, label) \ 267 ld r9,area+EX_R9(r13); \ 268 b label 269 270 #endif 271 272 273 #define __KVM_HANDLER(area, h, n) \ 274 BEGIN_FTR_SECTION_NESTED(947) \ 275 ld r10,area+EX_CFAR(r13); \ 276 std r10,HSTATE_CFAR(r13); \ 277 END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947); \ 278 BEGIN_FTR_SECTION_NESTED(948) \ 279 ld r10,area+EX_PPR(r13); \ 280 std r10,HSTATE_PPR(r13); \ 281 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 282 ld r10,area+EX_R10(r13); \ 283 std r12,HSTATE_SCRATCH0(r13); \ 284 sldi r12,r9,32; \ 285 ori r12,r12,(n); \ 286 /* This reloads r9 before branching to kvmppc_interrupt */ \ 287 __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt) 288 289 #define __KVM_HANDLER_SKIP(area, h, n) \ 290 cmpwi r10,KVM_GUEST_MODE_SKIP; \ 291 beq 89f; \ 292 BEGIN_FTR_SECTION_NESTED(948) \ 293 ld r10,area+EX_PPR(r13); \ 294 std r10,HSTATE_PPR(r13); \ 295 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 296 ld r10,area+EX_R10(r13); \ 297 std r12,HSTATE_SCRATCH0(r13); \ 298 sldi r12,r9,32; \ 299 ori r12,r12,(n); \ 300 /* This reloads r9 before branching to kvmppc_interrupt */ \ 301 __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt); \ 302 89: mtocrf 0x80,r9; \ 303 ld r9,area+EX_R9(r13); \ 304 ld r10,area+EX_R10(r13); \ 305 b kvmppc_skip_##h##interrupt 306 307 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER 308 #define KVMTEST(h, n) __KVMTEST(h, n) 309 #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n) 310 #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n) 311 312 #else 313 #define KVMTEST(h, n) 314 #define KVM_HANDLER(area, h, n) 315 #define KVM_HANDLER_SKIP(area, h, n) 316 #endif 317 318 #define NOTEST(n) 319 320 /* 321 * The common exception prolog is used for all except a few exceptions 322 * such as a segment miss on a kernel address. We have to be prepared 323 * to take another exception from the point where we first touch the 324 * kernel stack onwards. 325 * 326 * On entry r13 points to the paca, r9-r13 are saved in the paca, 327 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and 328 * SRR1, and relocation is on. 329 */ 330 #define EXCEPTION_PROLOG_COMMON(n, area) \ 331 andi. r10,r12,MSR_PR; /* See if coming from user */ \ 332 mr r10,r1; /* Save r1 */ \ 333 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \ 334 beq- 1f; \ 335 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \ 336 1: cmpdi cr1,r1,-INT_FRAME_SIZE; /* check if r1 is in userspace */ \ 337 blt+ cr1,3f; /* abort if it is */ \ 338 li r1,(n); /* will be reloaded later */ \ 339 sth r1,PACA_TRAP_SAVE(r13); \ 340 std r3,area+EX_R3(r13); \ 341 addi r3,r13,area; /* r3 -> where regs are saved*/ \ 342 RESTORE_CTR(r1, area); \ 343 b bad_stack; \ 344 3: std r9,_CCR(r1); /* save CR in stackframe */ \ 345 std r11,_NIP(r1); /* save SRR0 in stackframe */ \ 346 std r12,_MSR(r1); /* save SRR1 in stackframe */ \ 347 std r10,0(r1); /* make stack chain pointer */ \ 348 std r0,GPR0(r1); /* save r0 in stackframe */ \ 349 std r10,GPR1(r1); /* save r1 in stackframe */ \ 350 beq 4f; /* if from kernel mode */ \ 351 ACCOUNT_CPU_USER_ENTRY(r13, r9, r10); \ 352 SAVE_PPR(area, r9, r10); \ 353 4: EXCEPTION_PROLOG_COMMON_2(area) \ 354 EXCEPTION_PROLOG_COMMON_3(n) \ 355 ACCOUNT_STOLEN_TIME 356 357 /* Save original regs values from save area to stack frame. */ 358 #define EXCEPTION_PROLOG_COMMON_2(area) \ 359 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \ 360 ld r10,area+EX_R10(r13); \ 361 std r9,GPR9(r1); \ 362 std r10,GPR10(r1); \ 363 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \ 364 ld r10,area+EX_R12(r13); \ 365 ld r11,area+EX_R13(r13); \ 366 std r9,GPR11(r1); \ 367 std r10,GPR12(r1); \ 368 std r11,GPR13(r1); \ 369 BEGIN_FTR_SECTION_NESTED(66); \ 370 ld r10,area+EX_CFAR(r13); \ 371 std r10,ORIG_GPR3(r1); \ 372 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \ 373 GET_CTR(r10, area); \ 374 std r10,_CTR(r1); 375 376 #define EXCEPTION_PROLOG_COMMON_3(n) \ 377 std r2,GPR2(r1); /* save r2 in stackframe */ \ 378 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \ 379 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \ 380 mflr r9; /* Get LR, later save to stack */ \ 381 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \ 382 std r9,_LINK(r1); \ 383 lbz r10,PACASOFTIRQEN(r13); \ 384 mfspr r11,SPRN_XER; /* save XER in stackframe */ \ 385 std r10,SOFTE(r1); \ 386 std r11,_XER(r1); \ 387 li r9,(n)+1; \ 388 std r9,_TRAP(r1); /* set trap number */ \ 389 li r10,0; \ 390 ld r11,exception_marker@toc(r2); \ 391 std r10,RESULT(r1); /* clear regs->result */ \ 392 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ 393 394 /* 395 * Exception vectors. 396 */ 397 #define STD_EXCEPTION_PSERIES(vec, label) \ 398 SET_SCRATCH0(r13); /* save r13 */ \ 399 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \ 400 EXC_STD, KVMTEST_PR, vec); \ 401 402 /* Version of above for when we have to branch out-of-line */ 403 #define __OOL_EXCEPTION(vec, label, hdlr) \ 404 SET_SCRATCH0(r13) \ 405 EXCEPTION_PROLOG_0(PACA_EXGEN) \ 406 b hdlr; 407 408 #define STD_EXCEPTION_PSERIES_OOL(vec, label) \ 409 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \ 410 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD) 411 412 #define STD_EXCEPTION_HV(loc, vec, label) \ 413 SET_SCRATCH0(r13); /* save r13 */ \ 414 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \ 415 EXC_HV, KVMTEST_HV, vec); 416 417 #define STD_EXCEPTION_HV_OOL(vec, label) \ 418 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \ 419 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) 420 421 #define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 422 /* No guest interrupts come through here */ \ 423 SET_SCRATCH0(r13); /* save r13 */ \ 424 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, EXC_STD, NOTEST, vec); 425 426 #define STD_RELON_EXCEPTION_PSERIES_OOL(vec, label) \ 427 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \ 428 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_STD) 429 430 #define STD_RELON_EXCEPTION_HV(loc, vec, label) \ 431 SET_SCRATCH0(r13); /* save r13 */ \ 432 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, \ 433 EXC_HV, KVMTEST_HV, vec); 434 435 #define STD_RELON_EXCEPTION_HV_OOL(vec, label) \ 436 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \ 437 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV) 438 439 /* This associate vector numbers with bits in paca->irq_happened */ 440 #define SOFTEN_VALUE_0x500 PACA_IRQ_EE 441 #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC 442 #define SOFTEN_VALUE_0x980 PACA_IRQ_DEC 443 #define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL 444 #define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL 445 #define SOFTEN_VALUE_0xe60 PACA_IRQ_HMI 446 #define SOFTEN_VALUE_0xea0 PACA_IRQ_EE 447 448 #define __SOFTEN_TEST(h, vec) \ 449 lbz r10,PACASOFTIRQEN(r13); \ 450 cmpwi r10,0; \ 451 li r10,SOFTEN_VALUE_##vec; \ 452 beq masked_##h##interrupt 453 454 #define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec) 455 456 #define SOFTEN_TEST_PR(vec) \ 457 KVMTEST(EXC_STD, vec); \ 458 _SOFTEN_TEST(EXC_STD, vec) 459 460 #define SOFTEN_TEST_HV(vec) \ 461 KVMTEST(EXC_HV, vec); \ 462 _SOFTEN_TEST(EXC_HV, vec) 463 464 #define KVMTEST_PR(vec) \ 465 KVMTEST(EXC_STD, vec) 466 467 #define KVMTEST_HV(vec) \ 468 KVMTEST(EXC_HV, vec) 469 470 #define SOFTEN_NOTEST_PR(vec) _SOFTEN_TEST(EXC_STD, vec) 471 #define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec) 472 473 #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 474 SET_SCRATCH0(r13); /* save r13 */ \ 475 EXCEPTION_PROLOG_0(PACA_EXGEN); \ 476 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 477 EXCEPTION_PROLOG_PSERIES_1(label, h); 478 479 #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 480 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) 481 482 #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \ 483 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 484 EXC_STD, SOFTEN_TEST_PR) 485 486 #define MASKABLE_EXCEPTION_PSERIES_OOL(vec, label) \ 487 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, vec); \ 488 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD) 489 490 #define MASKABLE_EXCEPTION_HV(loc, vec, label) \ 491 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 492 EXC_HV, SOFTEN_TEST_HV) 493 494 #define MASKABLE_EXCEPTION_HV_OOL(vec, label) \ 495 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \ 496 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) 497 498 #define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 499 SET_SCRATCH0(r13); /* save r13 */ \ 500 EXCEPTION_PROLOG_0(PACA_EXGEN); \ 501 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 502 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 503 504 #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 505 __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) 506 507 #define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 508 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 509 EXC_STD, SOFTEN_NOTEST_PR) 510 511 #define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label) \ 512 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 513 EXC_HV, SOFTEN_TEST_HV) 514 515 #define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label) \ 516 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \ 517 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV) 518 519 /* 520 * Our exception common code can be passed various "additions" 521 * to specify the behaviour of interrupts, whether to kick the 522 * runlatch, etc... 523 */ 524 525 /* 526 * This addition reconciles our actual IRQ state with the various software 527 * flags that track it. This may call C code. 528 */ 529 #define ADD_RECONCILE RECONCILE_IRQ_STATE(r10,r11) 530 531 #define ADD_NVGPRS \ 532 bl save_nvgprs 533 534 #define RUNLATCH_ON \ 535 BEGIN_FTR_SECTION \ 536 CURRENT_THREAD_INFO(r3, r1); \ 537 ld r4,TI_LOCAL_FLAGS(r3); \ 538 andi. r0,r4,_TLF_RUNLATCH; \ 539 beql ppc64_runlatch_on_trampoline; \ 540 END_FTR_SECTION_IFSET(CPU_FTR_CTRL) 541 542 #define EXCEPTION_COMMON(trap, label, hdlr, ret, additions) \ 543 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \ 544 /* Volatile regs are potentially clobbered here */ \ 545 additions; \ 546 addi r3,r1,STACK_FRAME_OVERHEAD; \ 547 bl hdlr; \ 548 b ret 549 550 #define STD_EXCEPTION_COMMON(trap, label, hdlr) \ 551 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except, \ 552 ADD_NVGPRS;ADD_RECONCILE) 553 554 /* 555 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur 556 * in the idle task and therefore need the special idle handling 557 * (finish nap and runlatch) 558 */ 559 #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \ 560 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except_lite, \ 561 FINISH_NAP;ADD_RECONCILE;RUNLATCH_ON) 562 563 /* 564 * When the idle code in power4_idle puts the CPU into NAP mode, 565 * it has to do so in a loop, and relies on the external interrupt 566 * and decrementer interrupt entry code to get it out of the loop. 567 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags 568 * to signal that it is in the loop and needs help to get out. 569 */ 570 #ifdef CONFIG_PPC_970_NAP 571 #define FINISH_NAP \ 572 BEGIN_FTR_SECTION \ 573 CURRENT_THREAD_INFO(r11, r1); \ 574 ld r9,TI_LOCAL_FLAGS(r11); \ 575 andi. r10,r9,_TLF_NAPPING; \ 576 bnel power4_fixup_nap; \ 577 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) 578 #else 579 #define FINISH_NAP 580 #endif 581 582 #endif /* _ASM_POWERPC_EXCEPTION_H */ 583