1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 #ifndef _ASM_POWERPC_EXCEPTION_H 3 #define _ASM_POWERPC_EXCEPTION_H 4 /* 5 * Extracted from head_64.S 6 * 7 * PowerPC version 8 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 9 * 10 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP 11 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> 12 * Adapted for Power Macintosh by Paul Mackerras. 13 * Low-level exception handlers and MMU support 14 * rewritten by Paul Mackerras. 15 * Copyright (C) 1996 Paul Mackerras. 16 * 17 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and 18 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com 19 * 20 * This file contains the low-level support and setup for the 21 * PowerPC-64 platform, including trap and interrupt dispatch. 22 */ 23 /* 24 * The following macros define the code that appears as 25 * the prologue to each of the exception handlers. They 26 * are split into two parts to allow a single kernel binary 27 * to be used for pSeries and iSeries. 28 * 29 * We make as much of the exception code common between native 30 * exception handlers (including pSeries LPAR) and iSeries LPAR 31 * implementations as possible. 32 */ 33 #include <asm/feature-fixups.h> 34 35 /* PACA save area size in u64 units (exgen, exmc, etc) */ 36 #define EX_SIZE 10 37 38 /* 39 * maximum recursive depth of MCE exceptions 40 */ 41 #define MAX_MCE_DEPTH 4 42 43 #ifdef __ASSEMBLY__ 44 45 #define STF_ENTRY_BARRIER_SLOT \ 46 STF_ENTRY_BARRIER_FIXUP_SECTION; \ 47 nop; \ 48 nop; \ 49 nop 50 51 #define STF_EXIT_BARRIER_SLOT \ 52 STF_EXIT_BARRIER_FIXUP_SECTION; \ 53 nop; \ 54 nop; \ 55 nop; \ 56 nop; \ 57 nop; \ 58 nop 59 60 #define ENTRY_FLUSH_SLOT \ 61 ENTRY_FLUSH_FIXUP_SECTION; \ 62 nop; \ 63 nop; \ 64 nop; 65 66 /* 67 * r10 must be free to use, r13 must be paca 68 */ 69 #define INTERRUPT_TO_KERNEL \ 70 STF_ENTRY_BARRIER_SLOT; \ 71 ENTRY_FLUSH_SLOT 72 73 /* 74 * Macros for annotating the expected destination of (h)rfid 75 * 76 * The nop instructions allow us to insert one or more instructions to flush the 77 * L1-D cache when returning to userspace or a guest. 78 * 79 * powerpc relies on return from interrupt/syscall being context synchronising 80 * (which hrfid, rfid, and rfscv are) to support ARCH_HAS_MEMBARRIER_SYNC_CORE 81 * without additional synchronisation instructions. 82 * 83 * soft-masked interrupt replay does not include a context-synchronising rfid, 84 * but those always return to kernel, the sync is only required when returning 85 * to user. 86 */ 87 #define RFI_FLUSH_SLOT \ 88 RFI_FLUSH_FIXUP_SECTION; \ 89 nop; \ 90 nop; \ 91 nop 92 93 #define RFI_TO_KERNEL \ 94 rfid 95 96 #define RFI_TO_USER \ 97 STF_EXIT_BARRIER_SLOT; \ 98 RFI_FLUSH_SLOT; \ 99 rfid; \ 100 b rfi_flush_fallback 101 102 #define RFI_TO_USER_OR_KERNEL \ 103 STF_EXIT_BARRIER_SLOT; \ 104 RFI_FLUSH_SLOT; \ 105 rfid; \ 106 b rfi_flush_fallback 107 108 #define RFI_TO_GUEST \ 109 STF_EXIT_BARRIER_SLOT; \ 110 RFI_FLUSH_SLOT; \ 111 rfid; \ 112 b rfi_flush_fallback 113 114 #define HRFI_TO_KERNEL \ 115 hrfid 116 117 #define HRFI_TO_USER \ 118 STF_EXIT_BARRIER_SLOT; \ 119 RFI_FLUSH_SLOT; \ 120 hrfid; \ 121 b hrfi_flush_fallback 122 123 #define HRFI_TO_USER_OR_KERNEL \ 124 STF_EXIT_BARRIER_SLOT; \ 125 RFI_FLUSH_SLOT; \ 126 hrfid; \ 127 b hrfi_flush_fallback 128 129 #define HRFI_TO_GUEST \ 130 STF_EXIT_BARRIER_SLOT; \ 131 RFI_FLUSH_SLOT; \ 132 hrfid; \ 133 b hrfi_flush_fallback 134 135 #define HRFI_TO_UNKNOWN \ 136 STF_EXIT_BARRIER_SLOT; \ 137 RFI_FLUSH_SLOT; \ 138 hrfid; \ 139 b hrfi_flush_fallback 140 141 #define RFSCV_TO_USER \ 142 STF_EXIT_BARRIER_SLOT; \ 143 RFI_FLUSH_SLOT; \ 144 RFSCV; \ 145 b rfscv_flush_fallback 146 147 #else /* __ASSEMBLY__ */ 148 /* Prototype for function defined in exceptions-64s.S */ 149 void do_uaccess_flush(void); 150 #endif /* __ASSEMBLY__ */ 151 152 #endif /* _ASM_POWERPC_EXCEPTION_H */ 153