18aa34ab8SBenjamin Herrenschmidt #ifndef _ASM_POWERPC_EXCEPTION_H 28aa34ab8SBenjamin Herrenschmidt #define _ASM_POWERPC_EXCEPTION_H 38aa34ab8SBenjamin Herrenschmidt /* 48aa34ab8SBenjamin Herrenschmidt * Extracted from head_64.S 58aa34ab8SBenjamin Herrenschmidt * 68aa34ab8SBenjamin Herrenschmidt * PowerPC version 78aa34ab8SBenjamin Herrenschmidt * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 88aa34ab8SBenjamin Herrenschmidt * 98aa34ab8SBenjamin Herrenschmidt * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP 108aa34ab8SBenjamin Herrenschmidt * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> 118aa34ab8SBenjamin Herrenschmidt * Adapted for Power Macintosh by Paul Mackerras. 128aa34ab8SBenjamin Herrenschmidt * Low-level exception handlers and MMU support 138aa34ab8SBenjamin Herrenschmidt * rewritten by Paul Mackerras. 148aa34ab8SBenjamin Herrenschmidt * Copyright (C) 1996 Paul Mackerras. 158aa34ab8SBenjamin Herrenschmidt * 168aa34ab8SBenjamin Herrenschmidt * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and 178aa34ab8SBenjamin Herrenschmidt * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com 188aa34ab8SBenjamin Herrenschmidt * 198aa34ab8SBenjamin Herrenschmidt * This file contains the low-level support and setup for the 208aa34ab8SBenjamin Herrenschmidt * PowerPC-64 platform, including trap and interrupt dispatch. 218aa34ab8SBenjamin Herrenschmidt * 228aa34ab8SBenjamin Herrenschmidt * This program is free software; you can redistribute it and/or 238aa34ab8SBenjamin Herrenschmidt * modify it under the terms of the GNU General Public License 248aa34ab8SBenjamin Herrenschmidt * as published by the Free Software Foundation; either version 258aa34ab8SBenjamin Herrenschmidt * 2 of the License, or (at your option) any later version. 268aa34ab8SBenjamin Herrenschmidt */ 278aa34ab8SBenjamin Herrenschmidt /* 288aa34ab8SBenjamin Herrenschmidt * The following macros define the code that appears as 298aa34ab8SBenjamin Herrenschmidt * the prologue to each of the exception handlers. They 308aa34ab8SBenjamin Herrenschmidt * are split into two parts to allow a single kernel binary 318aa34ab8SBenjamin Herrenschmidt * to be used for pSeries and iSeries. 328aa34ab8SBenjamin Herrenschmidt * 338aa34ab8SBenjamin Herrenschmidt * We make as much of the exception code common between native 348aa34ab8SBenjamin Herrenschmidt * exception handlers (including pSeries LPAR) and iSeries LPAR 358aa34ab8SBenjamin Herrenschmidt * implementations as possible. 368aa34ab8SBenjamin Herrenschmidt */ 37da2bc464SMichael Ellerman #include <asm/head-64.h> 388aa34ab8SBenjamin Herrenschmidt 398c388514SNicholas Piggin /* PACA save area offsets (exgen, exmc, etc) */ 408aa34ab8SBenjamin Herrenschmidt #define EX_R9 0 418aa34ab8SBenjamin Herrenschmidt #define EX_R10 8 428aa34ab8SBenjamin Herrenschmidt #define EX_R11 16 438aa34ab8SBenjamin Herrenschmidt #define EX_R12 24 448aa34ab8SBenjamin Herrenschmidt #define EX_R13 32 4536670fcfSNicholas Piggin #define EX_DAR 40 4636670fcfSNicholas Piggin #define EX_DSISR 48 4736670fcfSNicholas Piggin #define EX_CCR 52 48635942aeSNicholas Piggin #define EX_CFAR 56 49635942aeSNicholas Piggin #define EX_PPR 64 508568f1e0SNicholas Piggin #if defined(CONFIG_RELOCATABLE) 51635942aeSNicholas Piggin #define EX_CTR 72 52635942aeSNicholas Piggin #define EX_SIZE 10 /* size in u64 units */ 538568f1e0SNicholas Piggin #else 548568f1e0SNicholas Piggin #define EX_SIZE 9 /* size in u64 units */ 558568f1e0SNicholas Piggin #endif 56dbeea1d6SNicholas Piggin 57dbeea1d6SNicholas Piggin /* 58ba41e1e1SBalbir Singh * maximum recursive depth of MCE exceptions 59ba41e1e1SBalbir Singh */ 60ba41e1e1SBalbir Singh #define MAX_MCE_DEPTH 4 61ba41e1e1SBalbir Singh 62ba41e1e1SBalbir Singh /* 63dbeea1d6SNicholas Piggin * EX_LR is only used in EXSLB and where it does not overlap with EX_DAR 64dbeea1d6SNicholas Piggin * EX_CCR similarly with DSISR, but being 4 byte registers there is a hole 65dbeea1d6SNicholas Piggin * in the save area so it's not necessary to overlap them. Could be used 66dbeea1d6SNicholas Piggin * for future savings though if another 4 byte register was to be saved. 67dbeea1d6SNicholas Piggin */ 68dbeea1d6SNicholas Piggin #define EX_LR EX_DAR 698c388514SNicholas Piggin 70635942aeSNicholas Piggin /* 71635942aeSNicholas Piggin * EX_R3 is only used by the bad_stack handler. bad_stack reloads and 72635942aeSNicholas Piggin * saves DAR from SPRN_DAR, and EX_DAR is not used. So EX_R3 can overlap 73635942aeSNicholas Piggin * with EX_DAR. 74635942aeSNicholas Piggin */ 75635942aeSNicholas Piggin #define EX_R3 EX_DAR 76635942aeSNicholas Piggin 774700dfafSMichael Neuling #ifdef CONFIG_RELOCATABLE 781707dd16SPaul Mackerras #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 794700dfafSMichael Neuling mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 804700dfafSMichael Neuling LOAD_HANDLER(r12,label); \ 81bc2e6c6aSMichael Neuling mtctr r12; \ 824700dfafSMichael Neuling mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 834700dfafSMichael Neuling li r10,MSR_RI; \ 844700dfafSMichael Neuling mtmsrd r10,1; /* Set RI (EE=0) */ \ 85bc2e6c6aSMichael Neuling bctr; 864700dfafSMichael Neuling #else 874700dfafSMichael Neuling /* If not relocatable, we can jump directly -- and save messing with LR */ 881707dd16SPaul Mackerras #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 894700dfafSMichael Neuling mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 904700dfafSMichael Neuling mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 914700dfafSMichael Neuling li r10,MSR_RI; \ 924700dfafSMichael Neuling mtmsrd r10,1; /* Set RI (EE=0) */ \ 934700dfafSMichael Neuling b label; 944700dfafSMichael Neuling #endif 951707dd16SPaul Mackerras #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 961707dd16SPaul Mackerras __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 974700dfafSMichael Neuling 984700dfafSMichael Neuling /* 994700dfafSMichael Neuling * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on 1004700dfafSMichael Neuling * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which 1014700dfafSMichael Neuling * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr. 1024700dfafSMichael Neuling */ 1034700dfafSMichael Neuling #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \ 1041707dd16SPaul Mackerras EXCEPTION_PROLOG_0(area); \ 1054700dfafSMichael Neuling EXCEPTION_PROLOG_1(area, extra, vec); \ 1064700dfafSMichael Neuling EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 1074700dfafSMichael Neuling 1088aa34ab8SBenjamin Herrenschmidt /* 1098aa34ab8SBenjamin Herrenschmidt * We're short on space and time in the exception prolog, so we can't 11027510235SMichael Ellerman * use the normal LOAD_REG_IMMEDIATE macro to load the address of label. 11127510235SMichael Ellerman * Instead we get the base of the kernel from paca->kernelbase and or in the low 11227510235SMichael Ellerman * part of label. This requires that the label be within 64KB of kernelbase, and 11327510235SMichael Ellerman * that kernelbase be 64K aligned. 1148aa34ab8SBenjamin Herrenschmidt */ 1158aa34ab8SBenjamin Herrenschmidt #define LOAD_HANDLER(reg, label) \ 116d8d42b05SMichael Ellerman ld reg,PACAKBASE(r13); /* get high part of &label */ \ 117e6740ae6SHugh Dickins ori reg,reg,FIXED_SYMBOL_ABS_ADDR(label); 1188aa34ab8SBenjamin Herrenschmidt 119fb479e44SNicholas Piggin #define __LOAD_HANDLER(reg, label) \ 120fb479e44SNicholas Piggin ld reg,PACAKBASE(r13); \ 121fb479e44SNicholas Piggin ori reg,reg,(ABS_ADDR(label))@l; 122fb479e44SNicholas Piggin 123a97a65d5SNicholas Piggin /* 124a97a65d5SNicholas Piggin * Branches from unrelocated code (e.g., interrupts) to labels outside 125a97a65d5SNicholas Piggin * head-y require >64K offsets. 126a97a65d5SNicholas Piggin */ 127a97a65d5SNicholas Piggin #define __LOAD_FAR_HANDLER(reg, label) \ 128a97a65d5SNicholas Piggin ld reg,PACAKBASE(r13); \ 129a97a65d5SNicholas Piggin ori reg,reg,(ABS_ADDR(label))@l; \ 130a97a65d5SNicholas Piggin addis reg,reg,(ABS_ADDR(label))@h; 131a97a65d5SNicholas Piggin 132a5d4f3adSBenjamin Herrenschmidt /* Exception register prefixes */ 133a5d4f3adSBenjamin Herrenschmidt #define EXC_HV H 134a5d4f3adSBenjamin Herrenschmidt #define EXC_STD 135a5d4f3adSBenjamin Herrenschmidt 1364700dfafSMichael Neuling #if defined(CONFIG_RELOCATABLE) 1374700dfafSMichael Neuling /* 138bc2e6c6aSMichael Neuling * If we support interrupts with relocation on AND we're a relocatable kernel, 139bc2e6c6aSMichael Neuling * we need to use CTR to get to the 2nd level handler. So, save/restore it 140bc2e6c6aSMichael Neuling * when required. 1414700dfafSMichael Neuling */ 142bc2e6c6aSMichael Neuling #define SAVE_CTR(reg, area) mfctr reg ; std reg,area+EX_CTR(r13) 143bc2e6c6aSMichael Neuling #define GET_CTR(reg, area) ld reg,area+EX_CTR(r13) 144bc2e6c6aSMichael Neuling #define RESTORE_CTR(reg, area) ld reg,area+EX_CTR(r13) ; mtctr reg 1454700dfafSMichael Neuling #else 146bc2e6c6aSMichael Neuling /* ...else CTR is unused and in register. */ 147bc2e6c6aSMichael Neuling #define SAVE_CTR(reg, area) 148bc2e6c6aSMichael Neuling #define GET_CTR(reg, area) mfctr reg 149bc2e6c6aSMichael Neuling #define RESTORE_CTR(reg, area) 1504700dfafSMichael Neuling #endif 1514700dfafSMichael Neuling 15213e7a8e8SHaren Myneni /* 15313e7a8e8SHaren Myneni * PPR save/restore macros used in exceptions_64s.S 15413e7a8e8SHaren Myneni * Used for P7 or later processors 15513e7a8e8SHaren Myneni */ 15613e7a8e8SHaren Myneni #define SAVE_PPR(area, ra, rb) \ 15713e7a8e8SHaren Myneni BEGIN_FTR_SECTION_NESTED(940) \ 15813e7a8e8SHaren Myneni ld ra,PACACURRENT(r13); \ 15913e7a8e8SHaren Myneni ld rb,area+EX_PPR(r13); /* Read PPR from paca */ \ 16013e7a8e8SHaren Myneni std rb,TASKTHREADPPR(ra); \ 16113e7a8e8SHaren Myneni END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940) 16213e7a8e8SHaren Myneni 16313e7a8e8SHaren Myneni #define RESTORE_PPR_PACA(area, ra) \ 16413e7a8e8SHaren Myneni BEGIN_FTR_SECTION_NESTED(941) \ 16513e7a8e8SHaren Myneni ld ra,area+EX_PPR(r13); \ 16613e7a8e8SHaren Myneni mtspr SPRN_PPR,ra; \ 16713e7a8e8SHaren Myneni END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941) 16813e7a8e8SHaren Myneni 16913e7a8e8SHaren Myneni /* 1701707dd16SPaul Mackerras * Get an SPR into a register if the CPU has the given feature 17113e7a8e8SHaren Myneni */ 1721707dd16SPaul Mackerras #define OPT_GET_SPR(ra, spr, ftr) \ 17313e7a8e8SHaren Myneni BEGIN_FTR_SECTION_NESTED(943) \ 1741707dd16SPaul Mackerras mfspr ra,spr; \ 1751707dd16SPaul Mackerras END_FTR_SECTION_NESTED(ftr,ftr,943) 17613e7a8e8SHaren Myneni 1771707dd16SPaul Mackerras /* 178d410ae21SMahesh Salgaonkar * Set an SPR from a register if the CPU has the given feature 179d410ae21SMahesh Salgaonkar */ 180d410ae21SMahesh Salgaonkar #define OPT_SET_SPR(ra, spr, ftr) \ 181d410ae21SMahesh Salgaonkar BEGIN_FTR_SECTION_NESTED(943) \ 182d410ae21SMahesh Salgaonkar mtspr spr,ra; \ 183d410ae21SMahesh Salgaonkar END_FTR_SECTION_NESTED(ftr,ftr,943) 184d410ae21SMahesh Salgaonkar 185d410ae21SMahesh Salgaonkar /* 1861707dd16SPaul Mackerras * Save a register to the PACA if the CPU has the given feature 1871707dd16SPaul Mackerras */ 1881707dd16SPaul Mackerras #define OPT_SAVE_REG_TO_PACA(offset, ra, ftr) \ 1891707dd16SPaul Mackerras BEGIN_FTR_SECTION_NESTED(943) \ 1901707dd16SPaul Mackerras std ra,offset(r13); \ 1911707dd16SPaul Mackerras END_FTR_SECTION_NESTED(ftr,ftr,943) 1921707dd16SPaul Mackerras 193544686caSNicholas Piggin #define EXCEPTION_PROLOG_0(area) \ 194544686caSNicholas Piggin GET_PACA(r13); \ 19544e9309fSHaren Myneni std r9,area+EX_R9(r13); /* save r9 */ \ 1961707dd16SPaul Mackerras OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \ 1971707dd16SPaul Mackerras HMT_MEDIUM; \ 19844e9309fSHaren Myneni std r10,area+EX_R10(r13); /* save r10 - r12 */ \ 1991707dd16SPaul Mackerras OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR) 2001707dd16SPaul Mackerras 201f14e953bSMadhavan Srinivasan #define __EXCEPTION_PROLOG_1_PRE(area) \ 2021707dd16SPaul Mackerras OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \ 2031707dd16SPaul Mackerras OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \ 204bc2e6c6aSMichael Neuling SAVE_CTR(r10, area); \ 205f14e953bSMadhavan Srinivasan mfcr r9; 206f14e953bSMadhavan Srinivasan 207f14e953bSMadhavan Srinivasan #define __EXCEPTION_PROLOG_1_POST(area) \ 208b01c8b54SPaul Mackerras std r11,area+EX_R11(r13); \ 209b01c8b54SPaul Mackerras std r12,area+EX_R12(r13); \ 210b01c8b54SPaul Mackerras GET_SCRATCH0(r10); \ 211b01c8b54SPaul Mackerras std r10,area+EX_R13(r13) 212f14e953bSMadhavan Srinivasan 213f14e953bSMadhavan Srinivasan /* 214f14e953bSMadhavan Srinivasan * This version of the EXCEPTION_PROLOG_1 will carry 215f14e953bSMadhavan Srinivasan * addition parameter called "bitmask" to support 216f14e953bSMadhavan Srinivasan * checking of the interrupt maskable level in the SOFTEN_TEST. 217f14e953bSMadhavan Srinivasan * Intended to be used in MASKABLE_EXCPETION_* macros. 218f14e953bSMadhavan Srinivasan */ 219f14e953bSMadhavan Srinivasan #define MASKABLE_EXCEPTION_PROLOG_1(area, extra, vec, bitmask) \ 220f14e953bSMadhavan Srinivasan __EXCEPTION_PROLOG_1_PRE(area); \ 221f14e953bSMadhavan Srinivasan extra(vec, bitmask); \ 222f14e953bSMadhavan Srinivasan __EXCEPTION_PROLOG_1_POST(area); 223f14e953bSMadhavan Srinivasan 224f14e953bSMadhavan Srinivasan /* 225f14e953bSMadhavan Srinivasan * This version of the EXCEPTION_PROLOG_1 is intended 226f14e953bSMadhavan Srinivasan * to be used in STD_EXCEPTION* macros 227f14e953bSMadhavan Srinivasan */ 228f14e953bSMadhavan Srinivasan #define _EXCEPTION_PROLOG_1(area, extra, vec) \ 229f14e953bSMadhavan Srinivasan __EXCEPTION_PROLOG_1_PRE(area); \ 230f14e953bSMadhavan Srinivasan extra(vec); \ 231f14e953bSMadhavan Srinivasan __EXCEPTION_PROLOG_1_POST(area); 232f14e953bSMadhavan Srinivasan 233b01c8b54SPaul Mackerras #define EXCEPTION_PROLOG_1(area, extra, vec) \ 234f14e953bSMadhavan Srinivasan _EXCEPTION_PROLOG_1(area, extra, vec) 2358aa34ab8SBenjamin Herrenschmidt 236a5d4f3adSBenjamin Herrenschmidt #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \ 2378aa34ab8SBenjamin Herrenschmidt ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 238a5d4f3adSBenjamin Herrenschmidt mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 2398aa34ab8SBenjamin Herrenschmidt LOAD_HANDLER(r12,label) \ 240a5d4f3adSBenjamin Herrenschmidt mtspr SPRN_##h##SRR0,r12; \ 241a5d4f3adSBenjamin Herrenschmidt mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 242a5d4f3adSBenjamin Herrenschmidt mtspr SPRN_##h##SRR1,r10; \ 243a5d4f3adSBenjamin Herrenschmidt h##rfid; \ 2448aa34ab8SBenjamin Herrenschmidt b . /* prevent speculative execution */ 245a5d4f3adSBenjamin Herrenschmidt #define EXCEPTION_PROLOG_PSERIES_1(label, h) \ 246a5d4f3adSBenjamin Herrenschmidt __EXCEPTION_PROLOG_PSERIES_1(label, h) 2478aa34ab8SBenjamin Herrenschmidt 24883a980f7SNicholas Piggin /* _NORI variant keeps MSR_RI clear */ 24983a980f7SNicholas Piggin #define __EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) \ 25083a980f7SNicholas Piggin ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 25183a980f7SNicholas Piggin xori r10,r10,MSR_RI; /* Clear MSR_RI */ \ 25283a980f7SNicholas Piggin mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 25383a980f7SNicholas Piggin LOAD_HANDLER(r12,label) \ 25483a980f7SNicholas Piggin mtspr SPRN_##h##SRR0,r12; \ 25583a980f7SNicholas Piggin mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 25683a980f7SNicholas Piggin mtspr SPRN_##h##SRR1,r10; \ 25783a980f7SNicholas Piggin h##rfid; \ 25883a980f7SNicholas Piggin b . /* prevent speculative execution */ 25983a980f7SNicholas Piggin 26083a980f7SNicholas Piggin #define EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) \ 26183a980f7SNicholas Piggin __EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) 26283a980f7SNicholas Piggin 263b01c8b54SPaul Mackerras #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \ 2641707dd16SPaul Mackerras EXCEPTION_PROLOG_0(area); \ 265b01c8b54SPaul Mackerras EXCEPTION_PROLOG_1(area, extra, vec); \ 266a5d4f3adSBenjamin Herrenschmidt EXCEPTION_PROLOG_PSERIES_1(label, h); 267c5a8c0c9SBenjamin Herrenschmidt 268da2bc464SMichael Ellerman #define __KVMTEST(h, n) \ 2693c42bf8aSPaul Mackerras lbz r10,HSTATE_IN_GUEST(r13); \ 270b01c8b54SPaul Mackerras cmpwi r10,0; \ 271da2bc464SMichael Ellerman bne do_kvm_##h##n 272b01c8b54SPaul Mackerras 273dd96b2c2SAneesh Kumar K.V #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 274dd96b2c2SAneesh Kumar K.V /* 275dd96b2c2SAneesh Kumar K.V * If hv is possible, interrupts come into to the hv version 276dd96b2c2SAneesh Kumar K.V * of the kvmppc_interrupt code, which then jumps to the PR handler, 277dd96b2c2SAneesh Kumar K.V * kvmppc_interrupt_pr, if the guest is a PR guest. 278dd96b2c2SAneesh Kumar K.V */ 279dd96b2c2SAneesh Kumar K.V #define kvmppc_interrupt kvmppc_interrupt_hv 280dd96b2c2SAneesh Kumar K.V #else 281dd96b2c2SAneesh Kumar K.V #define kvmppc_interrupt kvmppc_interrupt_pr 282dd96b2c2SAneesh Kumar K.V #endif 283dd96b2c2SAneesh Kumar K.V 284b51351e2SNicholas Piggin /* 285b51351e2SNicholas Piggin * Branch to label using its 0xC000 address. This results in instruction 286b51351e2SNicholas Piggin * address suitable for MSR[IR]=0 or 1, which allows relocation to be turned 287b51351e2SNicholas Piggin * on using mtmsr rather than rfid. 288b51351e2SNicholas Piggin * 289b51351e2SNicholas Piggin * This could set the 0xc bits for !RELOCATABLE as an immediate, rather than 290b51351e2SNicholas Piggin * load KBASE for a slight optimisation. 291b51351e2SNicholas Piggin */ 292b51351e2SNicholas Piggin #define BRANCH_TO_C000(reg, label) \ 293b51351e2SNicholas Piggin __LOAD_HANDLER(reg, label); \ 294b51351e2SNicholas Piggin mtctr reg; \ 295b51351e2SNicholas Piggin bctr 296b51351e2SNicholas Piggin 297fb479e44SNicholas Piggin #ifdef CONFIG_RELOCATABLE 298fb479e44SNicholas Piggin #define BRANCH_TO_COMMON(reg, label) \ 299fb479e44SNicholas Piggin __LOAD_HANDLER(reg, label); \ 300fb479e44SNicholas Piggin mtctr reg; \ 301fb479e44SNicholas Piggin bctr 302fb479e44SNicholas Piggin 303be5c5e84SMichael Ellerman #define BRANCH_LINK_TO_FAR(label) \ 304be5c5e84SMichael Ellerman __LOAD_FAR_HANDLER(r12, label); \ 305be5c5e84SMichael Ellerman mtctr r12; \ 3062337d207SNicholas Piggin bctrl 3072337d207SNicholas Piggin 308a97a65d5SNicholas Piggin /* 309a97a65d5SNicholas Piggin * KVM requires __LOAD_FAR_HANDLER. 310a97a65d5SNicholas Piggin * 311a97a65d5SNicholas Piggin * __BRANCH_TO_KVM_EXIT branches are also a special case because they 312a97a65d5SNicholas Piggin * explicitly use r9 then reload it from PACA before branching. Hence 313a97a65d5SNicholas Piggin * the double-underscore. 314a97a65d5SNicholas Piggin */ 315a97a65d5SNicholas Piggin #define __BRANCH_TO_KVM_EXIT(area, label) \ 316a97a65d5SNicholas Piggin mfctr r9; \ 317a97a65d5SNicholas Piggin std r9,HSTATE_SCRATCH1(r13); \ 318a97a65d5SNicholas Piggin __LOAD_FAR_HANDLER(r9, label); \ 319a97a65d5SNicholas Piggin mtctr r9; \ 320a97a65d5SNicholas Piggin ld r9,area+EX_R9(r13); \ 321a97a65d5SNicholas Piggin bctr 322a97a65d5SNicholas Piggin 323fb479e44SNicholas Piggin #else 324fb479e44SNicholas Piggin #define BRANCH_TO_COMMON(reg, label) \ 325fb479e44SNicholas Piggin b label 326fb479e44SNicholas Piggin 327be5c5e84SMichael Ellerman #define BRANCH_LINK_TO_FAR(label) \ 3282337d207SNicholas Piggin bl label 3292337d207SNicholas Piggin 330a97a65d5SNicholas Piggin #define __BRANCH_TO_KVM_EXIT(area, label) \ 331a97a65d5SNicholas Piggin ld r9,area+EX_R9(r13); \ 332a97a65d5SNicholas Piggin b label 333a97a65d5SNicholas Piggin 334fb479e44SNicholas Piggin #endif 335fb479e44SNicholas Piggin 336c4f3b52cSNicholas Piggin /* Do not enable RI */ 337c4f3b52cSNicholas Piggin #define EXCEPTION_PROLOG_PSERIES_NORI(area, label, h, extra, vec) \ 338c4f3b52cSNicholas Piggin EXCEPTION_PROLOG_0(area); \ 339c4f3b52cSNicholas Piggin EXCEPTION_PROLOG_1(area, extra, vec); \ 340c4f3b52cSNicholas Piggin EXCEPTION_PROLOG_PSERIES_1_NORI(label, h); 341c4f3b52cSNicholas Piggin 342a97a65d5SNicholas Piggin 343d3918e7fSNicholas Piggin #define __KVM_HANDLER(area, h, n) \ 3440acb9111SPaul Mackerras BEGIN_FTR_SECTION_NESTED(947) \ 3450acb9111SPaul Mackerras ld r10,area+EX_CFAR(r13); \ 3460acb9111SPaul Mackerras std r10,HSTATE_CFAR(r13); \ 3470acb9111SPaul Mackerras END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947); \ 3484b8473c9SPaul Mackerras BEGIN_FTR_SECTION_NESTED(948) \ 3494b8473c9SPaul Mackerras ld r10,area+EX_PPR(r13); \ 3504b8473c9SPaul Mackerras std r10,HSTATE_PPR(r13); \ 3514b8473c9SPaul Mackerras END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 352b01c8b54SPaul Mackerras ld r10,area+EX_R10(r13); \ 3533c42bf8aSPaul Mackerras std r12,HSTATE_SCRATCH0(r13); \ 354d3918e7fSNicholas Piggin sldi r12,r9,32; \ 355d3918e7fSNicholas Piggin ori r12,r12,(n); \ 356a97a65d5SNicholas Piggin /* This reloads r9 before branching to kvmppc_interrupt */ \ 357a97a65d5SNicholas Piggin __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt) 358b01c8b54SPaul Mackerras 359b01c8b54SPaul Mackerras #define __KVM_HANDLER_SKIP(area, h, n) \ 360b01c8b54SPaul Mackerras cmpwi r10,KVM_GUEST_MODE_SKIP; \ 361b01c8b54SPaul Mackerras beq 89f; \ 3624b8473c9SPaul Mackerras BEGIN_FTR_SECTION_NESTED(948) \ 363d3918e7fSNicholas Piggin ld r10,area+EX_PPR(r13); \ 364d3918e7fSNicholas Piggin std r10,HSTATE_PPR(r13); \ 3654b8473c9SPaul Mackerras END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 366d3918e7fSNicholas Piggin ld r10,area+EX_R10(r13); \ 3673c42bf8aSPaul Mackerras std r12,HSTATE_SCRATCH0(r13); \ 368d3918e7fSNicholas Piggin sldi r12,r9,32; \ 369d3918e7fSNicholas Piggin ori r12,r12,(n); \ 370a97a65d5SNicholas Piggin /* This reloads r9 before branching to kvmppc_interrupt */ \ 371a97a65d5SNicholas Piggin __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt); \ 372b01c8b54SPaul Mackerras 89: mtocrf 0x80,r9; \ 373b01c8b54SPaul Mackerras ld r9,area+EX_R9(r13); \ 374d3918e7fSNicholas Piggin ld r10,area+EX_R10(r13); \ 375b01c8b54SPaul Mackerras b kvmppc_skip_##h##interrupt 376b01c8b54SPaul Mackerras 377b01c8b54SPaul Mackerras #ifdef CONFIG_KVM_BOOK3S_64_HANDLER 378da2bc464SMichael Ellerman #define KVMTEST(h, n) __KVMTEST(h, n) 379b01c8b54SPaul Mackerras #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n) 380b01c8b54SPaul Mackerras #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n) 381b01c8b54SPaul Mackerras 382b01c8b54SPaul Mackerras #else 383da2bc464SMichael Ellerman #define KVMTEST(h, n) 384b01c8b54SPaul Mackerras #define KVM_HANDLER(area, h, n) 385b01c8b54SPaul Mackerras #define KVM_HANDLER_SKIP(area, h, n) 386b01c8b54SPaul Mackerras #endif 387b01c8b54SPaul Mackerras 388b01c8b54SPaul Mackerras #define NOTEST(n) 389b01c8b54SPaul Mackerras 390a4087a4dSNicholas Piggin #define EXCEPTION_PROLOG_COMMON_1() \ 391a4087a4dSNicholas Piggin std r9,_CCR(r1); /* save CR in stackframe */ \ 392a4087a4dSNicholas Piggin std r11,_NIP(r1); /* save SRR0 in stackframe */ \ 393a4087a4dSNicholas Piggin std r12,_MSR(r1); /* save SRR1 in stackframe */ \ 394a4087a4dSNicholas Piggin std r10,0(r1); /* make stack chain pointer */ \ 395a4087a4dSNicholas Piggin std r0,GPR0(r1); /* save r0 in stackframe */ \ 396a4087a4dSNicholas Piggin std r10,GPR1(r1); /* save r1 in stackframe */ \ 397a4087a4dSNicholas Piggin 398a4087a4dSNicholas Piggin 3998aa34ab8SBenjamin Herrenschmidt /* 4008aa34ab8SBenjamin Herrenschmidt * The common exception prolog is used for all except a few exceptions 4018aa34ab8SBenjamin Herrenschmidt * such as a segment miss on a kernel address. We have to be prepared 4028aa34ab8SBenjamin Herrenschmidt * to take another exception from the point where we first touch the 4038aa34ab8SBenjamin Herrenschmidt * kernel stack onwards. 4048aa34ab8SBenjamin Herrenschmidt * 4058aa34ab8SBenjamin Herrenschmidt * On entry r13 points to the paca, r9-r13 are saved in the paca, 4068aa34ab8SBenjamin Herrenschmidt * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and 4078aa34ab8SBenjamin Herrenschmidt * SRR1, and relocation is on. 4088aa34ab8SBenjamin Herrenschmidt */ 4098aa34ab8SBenjamin Herrenschmidt #define EXCEPTION_PROLOG_COMMON(n, area) \ 4108aa34ab8SBenjamin Herrenschmidt andi. r10,r12,MSR_PR; /* See if coming from user */ \ 4118aa34ab8SBenjamin Herrenschmidt mr r10,r1; /* Save r1 */ \ 4128aa34ab8SBenjamin Herrenschmidt subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \ 4138aa34ab8SBenjamin Herrenschmidt beq- 1f; \ 4148aa34ab8SBenjamin Herrenschmidt ld r1,PACAKSAVE(r13); /* kernel stack to use */ \ 41590ff5d68SMichael Neuling 1: cmpdi cr1,r1,-INT_FRAME_SIZE; /* check if r1 is in userspace */ \ 4161977b502SPaul Mackerras blt+ cr1,3f; /* abort if it is */ \ 4171977b502SPaul Mackerras li r1,(n); /* will be reloaded later */ \ 4188aa34ab8SBenjamin Herrenschmidt sth r1,PACA_TRAP_SAVE(r13); \ 4191977b502SPaul Mackerras std r3,area+EX_R3(r13); \ 4201977b502SPaul Mackerras addi r3,r13,area; /* r3 -> where regs are saved*/ \ 421bc2e6c6aSMichael Neuling RESTORE_CTR(r1, area); \ 4228aa34ab8SBenjamin Herrenschmidt b bad_stack; \ 423a4087a4dSNicholas Piggin 3: EXCEPTION_PROLOG_COMMON_1(); \ 4245d75b264SHaren Myneni beq 4f; /* if from kernel mode */ \ 425c223c903SChristophe Leroy ACCOUNT_CPU_USER_ENTRY(r13, r9, r10); \ 42644e9309fSHaren Myneni SAVE_PPR(area, r9, r10); \ 427b14a7253SMahesh Salgaonkar 4: EXCEPTION_PROLOG_COMMON_2(area) \ 428b14a7253SMahesh Salgaonkar EXCEPTION_PROLOG_COMMON_3(n) \ 429b14a7253SMahesh Salgaonkar ACCOUNT_STOLEN_TIME 430b14a7253SMahesh Salgaonkar 431b14a7253SMahesh Salgaonkar /* Save original regs values from save area to stack frame. */ 432b14a7253SMahesh Salgaonkar #define EXCEPTION_PROLOG_COMMON_2(area) \ 4338aa34ab8SBenjamin Herrenschmidt ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \ 4348aa34ab8SBenjamin Herrenschmidt ld r10,area+EX_R10(r13); \ 4358aa34ab8SBenjamin Herrenschmidt std r9,GPR9(r1); \ 4368aa34ab8SBenjamin Herrenschmidt std r10,GPR10(r1); \ 4378aa34ab8SBenjamin Herrenschmidt ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \ 4388aa34ab8SBenjamin Herrenschmidt ld r10,area+EX_R12(r13); \ 4398aa34ab8SBenjamin Herrenschmidt ld r11,area+EX_R13(r13); \ 4408aa34ab8SBenjamin Herrenschmidt std r9,GPR11(r1); \ 4418aa34ab8SBenjamin Herrenschmidt std r10,GPR12(r1); \ 4428aa34ab8SBenjamin Herrenschmidt std r11,GPR13(r1); \ 44348404f2eSPaul Mackerras BEGIN_FTR_SECTION_NESTED(66); \ 44448404f2eSPaul Mackerras ld r10,area+EX_CFAR(r13); \ 44548404f2eSPaul Mackerras std r10,ORIG_GPR3(r1); \ 44648404f2eSPaul Mackerras END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \ 447b14a7253SMahesh Salgaonkar GET_CTR(r10, area); \ 448b14a7253SMahesh Salgaonkar std r10,_CTR(r1); 449b14a7253SMahesh Salgaonkar 450b14a7253SMahesh Salgaonkar #define EXCEPTION_PROLOG_COMMON_3(n) \ 451b14a7253SMahesh Salgaonkar std r2,GPR2(r1); /* save r2 in stackframe */ \ 452b14a7253SMahesh Salgaonkar SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \ 453b14a7253SMahesh Salgaonkar SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \ 454bc2e6c6aSMichael Neuling mflr r9; /* Get LR, later save to stack */ \ 4558aa34ab8SBenjamin Herrenschmidt ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \ 4568aa34ab8SBenjamin Herrenschmidt std r9,_LINK(r1); \ 4574e26bc4aSMadhavan Srinivasan lbz r10,PACAIRQSOFTMASK(r13); \ 4588aa34ab8SBenjamin Herrenschmidt mfspr r11,SPRN_XER; /* save XER in stackframe */ \ 4598aa34ab8SBenjamin Herrenschmidt std r10,SOFTE(r1); \ 4608aa34ab8SBenjamin Herrenschmidt std r11,_XER(r1); \ 4618aa34ab8SBenjamin Herrenschmidt li r9,(n)+1; \ 4628aa34ab8SBenjamin Herrenschmidt std r9,_TRAP(r1); /* set trap number */ \ 4638aa34ab8SBenjamin Herrenschmidt li r10,0; \ 4648aa34ab8SBenjamin Herrenschmidt ld r11,exception_marker@toc(r2); \ 4658aa34ab8SBenjamin Herrenschmidt std r10,RESULT(r1); /* clear regs->result */ \ 466b14a7253SMahesh Salgaonkar std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ 4678aa34ab8SBenjamin Herrenschmidt 4688aa34ab8SBenjamin Herrenschmidt /* 4698aa34ab8SBenjamin Herrenschmidt * Exception vectors. 4708aa34ab8SBenjamin Herrenschmidt */ 4712613265cSMichael Ellerman #define STD_EXCEPTION_PSERIES(vec, label) \ 472673b189aSPaul Mackerras SET_SCRATCH0(r13); /* save r13 */ \ 473da2bc464SMichael Ellerman EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \ 474da2bc464SMichael Ellerman EXC_STD, KVMTEST_PR, vec); \ 4758aa34ab8SBenjamin Herrenschmidt 4761707dd16SPaul Mackerras /* Version of above for when we have to branch out-of-line */ 477da2bc464SMichael Ellerman #define __OOL_EXCEPTION(vec, label, hdlr) \ 478da2bc464SMichael Ellerman SET_SCRATCH0(r13) \ 479da2bc464SMichael Ellerman EXCEPTION_PROLOG_0(PACA_EXGEN) \ 480da2bc464SMichael Ellerman b hdlr; 481da2bc464SMichael Ellerman 4821707dd16SPaul Mackerras #define STD_EXCEPTION_PSERIES_OOL(vec, label) \ 483da2bc464SMichael Ellerman EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \ 484da2bc464SMichael Ellerman EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD) 4851707dd16SPaul Mackerras 486b3e6b5dfSBenjamin Herrenschmidt #define STD_EXCEPTION_HV(loc, vec, label) \ 487673b189aSPaul Mackerras SET_SCRATCH0(r13); /* save r13 */ \ 488da2bc464SMichael Ellerman EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \ 489da2bc464SMichael Ellerman EXC_HV, KVMTEST_HV, vec); 4908aa34ab8SBenjamin Herrenschmidt 4911707dd16SPaul Mackerras #define STD_EXCEPTION_HV_OOL(vec, label) \ 492da2bc464SMichael Ellerman EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \ 493da2bc464SMichael Ellerman EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) 4941707dd16SPaul Mackerras 4954700dfafSMichael Neuling #define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 4964700dfafSMichael Neuling /* No guest interrupts come through here */ \ 4974700dfafSMichael Neuling SET_SCRATCH0(r13); /* save r13 */ \ 498da2bc464SMichael Ellerman EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, EXC_STD, NOTEST, vec); 4994700dfafSMichael Neuling 5001707dd16SPaul Mackerras #define STD_RELON_EXCEPTION_PSERIES_OOL(vec, label) \ 501c9f69518SMichael Ellerman EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \ 502da2bc464SMichael Ellerman EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_STD) 5031707dd16SPaul Mackerras 5044700dfafSMichael Neuling #define STD_RELON_EXCEPTION_HV(loc, vec, label) \ 5054700dfafSMichael Neuling SET_SCRATCH0(r13); /* save r13 */ \ 506bc355125SPaul Mackerras EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, \ 507bc355125SPaul Mackerras EXC_HV, KVMTEST_HV, vec); 5084700dfafSMichael Neuling 5091707dd16SPaul Mackerras #define STD_RELON_EXCEPTION_HV_OOL(vec, label) \ 510bc355125SPaul Mackerras EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \ 511da2bc464SMichael Ellerman EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV) 5121707dd16SPaul Mackerras 5137230c564SBenjamin Herrenschmidt /* This associate vector numbers with bits in paca->irq_happened */ 5147230c564SBenjamin Herrenschmidt #define SOFTEN_VALUE_0x500 PACA_IRQ_EE 5157230c564SBenjamin Herrenschmidt #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC 516da2bc464SMichael Ellerman #define SOFTEN_VALUE_0x980 PACA_IRQ_DEC 5171dbdafecSIan Munsie #define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL 518655bb3f4SIan Munsie #define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL 5190869b6fdSMahesh Salgaonkar #define SOFTEN_VALUE_0xe60 PACA_IRQ_HMI 5209baaef0aSBenjamin Herrenschmidt #define SOFTEN_VALUE_0xea0 PACA_IRQ_EE 5217230c564SBenjamin Herrenschmidt 522f14e953bSMadhavan Srinivasan #define __SOFTEN_TEST(h, vec, bitmask) \ 5234e26bc4aSMadhavan Srinivasan lbz r10,PACAIRQSOFTMASK(r13); \ 524f14e953bSMadhavan Srinivasan andi. r10,r10,bitmask; \ 5257230c564SBenjamin Herrenschmidt li r10,SOFTEN_VALUE_##vec; \ 52601417c6cSMadhavan Srinivasan bne masked_##h##interrupt 527da2bc464SMichael Ellerman 528f14e953bSMadhavan Srinivasan #define _SOFTEN_TEST(h, vec, bitmask) __SOFTEN_TEST(h, vec, bitmask) 529b01c8b54SPaul Mackerras 530f14e953bSMadhavan Srinivasan #define SOFTEN_TEST_PR(vec, bitmask) \ 531da2bc464SMichael Ellerman KVMTEST(EXC_STD, vec); \ 532f14e953bSMadhavan Srinivasan _SOFTEN_TEST(EXC_STD, vec, bitmask) 533b01c8b54SPaul Mackerras 534f14e953bSMadhavan Srinivasan #define SOFTEN_TEST_HV(vec, bitmask) \ 535da2bc464SMichael Ellerman KVMTEST(EXC_HV, vec); \ 536f14e953bSMadhavan Srinivasan _SOFTEN_TEST(EXC_HV, vec, bitmask) 537b01c8b54SPaul Mackerras 538da2bc464SMichael Ellerman #define KVMTEST_PR(vec) \ 539da2bc464SMichael Ellerman KVMTEST(EXC_STD, vec) 540da2bc464SMichael Ellerman 541da2bc464SMichael Ellerman #define KVMTEST_HV(vec) \ 542da2bc464SMichael Ellerman KVMTEST(EXC_HV, vec) 543da2bc464SMichael Ellerman 544f14e953bSMadhavan Srinivasan #define SOFTEN_NOTEST_PR(vec, bitmask) _SOFTEN_TEST(EXC_STD, vec, bitmask) 545f14e953bSMadhavan Srinivasan #define SOFTEN_NOTEST_HV(vec, bitmask) _SOFTEN_TEST(EXC_HV, vec, bitmask) 5464700dfafSMichael Neuling 547f14e953bSMadhavan Srinivasan #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra, bitmask) \ 548b01c8b54SPaul Mackerras SET_SCRATCH0(r13); /* save r13 */ \ 5491707dd16SPaul Mackerras EXCEPTION_PROLOG_0(PACA_EXGEN); \ 550f14e953bSMadhavan Srinivasan MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec, bitmask); \ 551da2bc464SMichael Ellerman EXCEPTION_PROLOG_PSERIES_1(label, h); 5521707dd16SPaul Mackerras 553f14e953bSMadhavan Srinivasan #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra, bitmask) \ 554f14e953bSMadhavan Srinivasan __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra, bitmask) 555b3e6b5dfSBenjamin Herrenschmidt 556f14e953bSMadhavan Srinivasan #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label, bitmask) \ 557b01c8b54SPaul Mackerras _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 558f14e953bSMadhavan Srinivasan EXC_STD, SOFTEN_TEST_PR, bitmask) 559b3e6b5dfSBenjamin Herrenschmidt 560f14e953bSMadhavan Srinivasan #define MASKABLE_EXCEPTION_PSERIES_OOL(vec, label, bitmask) \ 561f14e953bSMadhavan Srinivasan MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, vec, bitmask);\ 562da2bc464SMichael Ellerman EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD) 563da2bc464SMichael Ellerman 564f14e953bSMadhavan Srinivasan #define MASKABLE_EXCEPTION_HV(loc, vec, label, bitmask) \ 565b01c8b54SPaul Mackerras _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 566f14e953bSMadhavan Srinivasan EXC_HV, SOFTEN_TEST_HV, bitmask) 5678aa34ab8SBenjamin Herrenschmidt 568f14e953bSMadhavan Srinivasan #define MASKABLE_EXCEPTION_HV_OOL(vec, label, bitmask) \ 569f14e953bSMadhavan Srinivasan MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec, bitmask);\ 570da2bc464SMichael Ellerman EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) 5711707dd16SPaul Mackerras 572f14e953bSMadhavan Srinivasan #define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra, bitmask) \ 5734700dfafSMichael Neuling SET_SCRATCH0(r13); /* save r13 */ \ 5741707dd16SPaul Mackerras EXCEPTION_PROLOG_0(PACA_EXGEN); \ 575f14e953bSMadhavan Srinivasan MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec, bitmask); \ 576da2bc464SMichael Ellerman EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 577da2bc464SMichael Ellerman 578f14e953bSMadhavan Srinivasan #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra, bitmask)\ 579f14e953bSMadhavan Srinivasan __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra, bitmask) 5804700dfafSMichael Neuling 581f14e953bSMadhavan Srinivasan #define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label, bitmask) \ 5824700dfafSMichael Neuling _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 583f14e953bSMadhavan Srinivasan EXC_STD, SOFTEN_NOTEST_PR, bitmask) 5844700dfafSMichael Neuling 585f14e953bSMadhavan Srinivasan #define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label, bitmask) \ 5864700dfafSMichael Neuling _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 587f14e953bSMadhavan Srinivasan EXC_HV, SOFTEN_TEST_HV, bitmask) 5884700dfafSMichael Neuling 589f14e953bSMadhavan Srinivasan #define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label, bitmask) \ 590f14e953bSMadhavan Srinivasan MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_NOTEST_HV, vec, bitmask);\ 591a050d20dSNicholas Piggin EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV) 5921707dd16SPaul Mackerras 5931b701179SBenjamin Herrenschmidt /* 5941b701179SBenjamin Herrenschmidt * Our exception common code can be passed various "additions" 5951b701179SBenjamin Herrenschmidt * to specify the behaviour of interrupts, whether to kick the 5961b701179SBenjamin Herrenschmidt * runlatch, etc... 5971b701179SBenjamin Herrenschmidt */ 5981b701179SBenjamin Herrenschmidt 5999daf112bSMichael Ellerman /* 6009daf112bSMichael Ellerman * This addition reconciles our actual IRQ state with the various software 6019daf112bSMichael Ellerman * flags that track it. This may call C code. 6029daf112bSMichael Ellerman */ 6039daf112bSMichael Ellerman #define ADD_RECONCILE RECONCILE_IRQ_STATE(r10,r11) 6048aa34ab8SBenjamin Herrenschmidt 605fe1952fcSBenjamin Herrenschmidt #define ADD_NVGPRS \ 606b1576fecSAnton Blanchard bl save_nvgprs 607fe1952fcSBenjamin Herrenschmidt 608fe1952fcSBenjamin Herrenschmidt #define RUNLATCH_ON \ 609fe1952fcSBenjamin Herrenschmidt BEGIN_FTR_SECTION \ 6109778b696SStuart Yoder CURRENT_THREAD_INFO(r3, r1); \ 611fe1952fcSBenjamin Herrenschmidt ld r4,TI_LOCAL_FLAGS(r3); \ 612fe1952fcSBenjamin Herrenschmidt andi. r0,r4,_TLF_RUNLATCH; \ 613fe1952fcSBenjamin Herrenschmidt beql ppc64_runlatch_on_trampoline; \ 614fe1952fcSBenjamin Herrenschmidt END_FTR_SECTION_IFSET(CPU_FTR_CTRL) 615fe1952fcSBenjamin Herrenschmidt 616a3d96f70SNicholas Piggin #define EXCEPTION_COMMON(area, trap, label, hdlr, ret, additions) \ 617a3d96f70SNicholas Piggin EXCEPTION_PROLOG_COMMON(trap, area); \ 618a1d711c5SMichael Ellerman /* Volatile regs are potentially clobbered here */ \ 619fe1952fcSBenjamin Herrenschmidt additions; \ 6208aa34ab8SBenjamin Herrenschmidt addi r3,r1,STACK_FRAME_OVERHEAD; \ 6218aa34ab8SBenjamin Herrenschmidt bl hdlr; \ 622fe1952fcSBenjamin Herrenschmidt b ret 623fe1952fcSBenjamin Herrenschmidt 624b1ee8a3dSNicholas Piggin /* 625b1ee8a3dSNicholas Piggin * Exception where stack is already set in r1, r1 is saved in r10, and it 626b1ee8a3dSNicholas Piggin * continues rather than returns. 627b1ee8a3dSNicholas Piggin */ 628b1ee8a3dSNicholas Piggin #define EXCEPTION_COMMON_NORET_STACK(area, trap, label, hdlr, additions) \ 629b1ee8a3dSNicholas Piggin EXCEPTION_PROLOG_COMMON_1(); \ 630b1ee8a3dSNicholas Piggin EXCEPTION_PROLOG_COMMON_2(area); \ 631b1ee8a3dSNicholas Piggin EXCEPTION_PROLOG_COMMON_3(trap); \ 632b1ee8a3dSNicholas Piggin /* Volatile regs are potentially clobbered here */ \ 633b1ee8a3dSNicholas Piggin additions; \ 634b1ee8a3dSNicholas Piggin addi r3,r1,STACK_FRAME_OVERHEAD; \ 635b1ee8a3dSNicholas Piggin bl hdlr 636b1ee8a3dSNicholas Piggin 637fe1952fcSBenjamin Herrenschmidt #define STD_EXCEPTION_COMMON(trap, label, hdlr) \ 638a3d96f70SNicholas Piggin EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr, \ 639a3d96f70SNicholas Piggin ret_from_except, ADD_NVGPRS;ADD_RECONCILE) 6408aa34ab8SBenjamin Herrenschmidt 6418aa34ab8SBenjamin Herrenschmidt /* 6428aa34ab8SBenjamin Herrenschmidt * Like STD_EXCEPTION_COMMON, but for exceptions that can occur 6437450f6f0SBenjamin Herrenschmidt * in the idle task and therefore need the special idle handling 6447450f6f0SBenjamin Herrenschmidt * (finish nap and runlatch) 6458aa34ab8SBenjamin Herrenschmidt */ 6467450f6f0SBenjamin Herrenschmidt #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \ 647a3d96f70SNicholas Piggin EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr, \ 648a3d96f70SNicholas Piggin ret_from_except_lite, FINISH_NAP;ADD_RECONCILE;RUNLATCH_ON) 6498aa34ab8SBenjamin Herrenschmidt 6508aa34ab8SBenjamin Herrenschmidt /* 6518aa34ab8SBenjamin Herrenschmidt * When the idle code in power4_idle puts the CPU into NAP mode, 6528aa34ab8SBenjamin Herrenschmidt * it has to do so in a loop, and relies on the external interrupt 6538aa34ab8SBenjamin Herrenschmidt * and decrementer interrupt entry code to get it out of the loop. 6548aa34ab8SBenjamin Herrenschmidt * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags 6558aa34ab8SBenjamin Herrenschmidt * to signal that it is in the loop and needs help to get out. 6568aa34ab8SBenjamin Herrenschmidt */ 6578aa34ab8SBenjamin Herrenschmidt #ifdef CONFIG_PPC_970_NAP 6588aa34ab8SBenjamin Herrenschmidt #define FINISH_NAP \ 6598aa34ab8SBenjamin Herrenschmidt BEGIN_FTR_SECTION \ 6609778b696SStuart Yoder CURRENT_THREAD_INFO(r11, r1); \ 6618aa34ab8SBenjamin Herrenschmidt ld r9,TI_LOCAL_FLAGS(r11); \ 6628aa34ab8SBenjamin Herrenschmidt andi. r10,r9,_TLF_NAPPING; \ 6638aa34ab8SBenjamin Herrenschmidt bnel power4_fixup_nap; \ 6648aa34ab8SBenjamin Herrenschmidt END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) 6658aa34ab8SBenjamin Herrenschmidt #else 6668aa34ab8SBenjamin Herrenschmidt #define FINISH_NAP 6678aa34ab8SBenjamin Herrenschmidt #endif 6688aa34ab8SBenjamin Herrenschmidt 6698aa34ab8SBenjamin Herrenschmidt #endif /* _ASM_POWERPC_EXCEPTION_H */ 670