18aa34ab8SBenjamin Herrenschmidt #ifndef _ASM_POWERPC_EXCEPTION_H 28aa34ab8SBenjamin Herrenschmidt #define _ASM_POWERPC_EXCEPTION_H 38aa34ab8SBenjamin Herrenschmidt /* 48aa34ab8SBenjamin Herrenschmidt * Extracted from head_64.S 58aa34ab8SBenjamin Herrenschmidt * 68aa34ab8SBenjamin Herrenschmidt * PowerPC version 78aa34ab8SBenjamin Herrenschmidt * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 88aa34ab8SBenjamin Herrenschmidt * 98aa34ab8SBenjamin Herrenschmidt * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP 108aa34ab8SBenjamin Herrenschmidt * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> 118aa34ab8SBenjamin Herrenschmidt * Adapted for Power Macintosh by Paul Mackerras. 128aa34ab8SBenjamin Herrenschmidt * Low-level exception handlers and MMU support 138aa34ab8SBenjamin Herrenschmidt * rewritten by Paul Mackerras. 148aa34ab8SBenjamin Herrenschmidt * Copyright (C) 1996 Paul Mackerras. 158aa34ab8SBenjamin Herrenschmidt * 168aa34ab8SBenjamin Herrenschmidt * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and 178aa34ab8SBenjamin Herrenschmidt * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com 188aa34ab8SBenjamin Herrenschmidt * 198aa34ab8SBenjamin Herrenschmidt * This file contains the low-level support and setup for the 208aa34ab8SBenjamin Herrenschmidt * PowerPC-64 platform, including trap and interrupt dispatch. 218aa34ab8SBenjamin Herrenschmidt * 228aa34ab8SBenjamin Herrenschmidt * This program is free software; you can redistribute it and/or 238aa34ab8SBenjamin Herrenschmidt * modify it under the terms of the GNU General Public License 248aa34ab8SBenjamin Herrenschmidt * as published by the Free Software Foundation; either version 258aa34ab8SBenjamin Herrenschmidt * 2 of the License, or (at your option) any later version. 268aa34ab8SBenjamin Herrenschmidt */ 278aa34ab8SBenjamin Herrenschmidt /* 288aa34ab8SBenjamin Herrenschmidt * The following macros define the code that appears as 298aa34ab8SBenjamin Herrenschmidt * the prologue to each of the exception handlers. They 308aa34ab8SBenjamin Herrenschmidt * are split into two parts to allow a single kernel binary 318aa34ab8SBenjamin Herrenschmidt * to be used for pSeries and iSeries. 328aa34ab8SBenjamin Herrenschmidt * 338aa34ab8SBenjamin Herrenschmidt * We make as much of the exception code common between native 348aa34ab8SBenjamin Herrenschmidt * exception handlers (including pSeries LPAR) and iSeries LPAR 358aa34ab8SBenjamin Herrenschmidt * implementations as possible. 368aa34ab8SBenjamin Herrenschmidt */ 37da2bc464SMichael Ellerman #include <asm/head-64.h> 388aa34ab8SBenjamin Herrenschmidt 398aa34ab8SBenjamin Herrenschmidt #define EX_R9 0 408aa34ab8SBenjamin Herrenschmidt #define EX_R10 8 418aa34ab8SBenjamin Herrenschmidt #define EX_R11 16 428aa34ab8SBenjamin Herrenschmidt #define EX_R12 24 438aa34ab8SBenjamin Herrenschmidt #define EX_R13 32 448aa34ab8SBenjamin Herrenschmidt #define EX_SRR0 40 458aa34ab8SBenjamin Herrenschmidt #define EX_DAR 48 468aa34ab8SBenjamin Herrenschmidt #define EX_DSISR 56 478aa34ab8SBenjamin Herrenschmidt #define EX_CCR 60 488aa34ab8SBenjamin Herrenschmidt #define EX_R3 64 498aa34ab8SBenjamin Herrenschmidt #define EX_LR 72 5048404f2eSPaul Mackerras #define EX_CFAR 80 51a09688cdSHaren Myneni #define EX_PPR 88 /* SMT thread status register (priority) */ 52bc2e6c6aSMichael Neuling #define EX_CTR 96 538aa34ab8SBenjamin Herrenschmidt 544700dfafSMichael Neuling #ifdef CONFIG_RELOCATABLE 551707dd16SPaul Mackerras #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 564700dfafSMichael Neuling mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 574700dfafSMichael Neuling LOAD_HANDLER(r12,label); \ 58bc2e6c6aSMichael Neuling mtctr r12; \ 594700dfafSMichael Neuling mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 604700dfafSMichael Neuling li r10,MSR_RI; \ 614700dfafSMichael Neuling mtmsrd r10,1; /* Set RI (EE=0) */ \ 62bc2e6c6aSMichael Neuling bctr; 634700dfafSMichael Neuling #else 644700dfafSMichael Neuling /* If not relocatable, we can jump directly -- and save messing with LR */ 651707dd16SPaul Mackerras #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 664700dfafSMichael Neuling mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 674700dfafSMichael Neuling mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 684700dfafSMichael Neuling li r10,MSR_RI; \ 694700dfafSMichael Neuling mtmsrd r10,1; /* Set RI (EE=0) */ \ 704700dfafSMichael Neuling b label; 714700dfafSMichael Neuling #endif 721707dd16SPaul Mackerras #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 731707dd16SPaul Mackerras __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 744700dfafSMichael Neuling 754700dfafSMichael Neuling /* 764700dfafSMichael Neuling * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on 774700dfafSMichael Neuling * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which 784700dfafSMichael Neuling * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr. 794700dfafSMichael Neuling */ 804700dfafSMichael Neuling #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \ 811707dd16SPaul Mackerras EXCEPTION_PROLOG_0(area); \ 824700dfafSMichael Neuling EXCEPTION_PROLOG_1(area, extra, vec); \ 834700dfafSMichael Neuling EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 844700dfafSMichael Neuling 858aa34ab8SBenjamin Herrenschmidt /* 868aa34ab8SBenjamin Herrenschmidt * We're short on space and time in the exception prolog, so we can't 8727510235SMichael Ellerman * use the normal LOAD_REG_IMMEDIATE macro to load the address of label. 8827510235SMichael Ellerman * Instead we get the base of the kernel from paca->kernelbase and or in the low 8927510235SMichael Ellerman * part of label. This requires that the label be within 64KB of kernelbase, and 9027510235SMichael Ellerman * that kernelbase be 64K aligned. 918aa34ab8SBenjamin Herrenschmidt */ 928aa34ab8SBenjamin Herrenschmidt #define LOAD_HANDLER(reg, label) \ 93d8d42b05SMichael Ellerman ld reg,PACAKBASE(r13); /* get high part of &label */ \ 94e6740ae6SHugh Dickins ori reg,reg,FIXED_SYMBOL_ABS_ADDR(label); 958aa34ab8SBenjamin Herrenschmidt 96fb479e44SNicholas Piggin #define __LOAD_HANDLER(reg, label) \ 97fb479e44SNicholas Piggin ld reg,PACAKBASE(r13); \ 98fb479e44SNicholas Piggin ori reg,reg,(ABS_ADDR(label))@l; 99fb479e44SNicholas Piggin 100a5d4f3adSBenjamin Herrenschmidt /* Exception register prefixes */ 101a5d4f3adSBenjamin Herrenschmidt #define EXC_HV H 102a5d4f3adSBenjamin Herrenschmidt #define EXC_STD 103a5d4f3adSBenjamin Herrenschmidt 1044700dfafSMichael Neuling #if defined(CONFIG_RELOCATABLE) 1054700dfafSMichael Neuling /* 106bc2e6c6aSMichael Neuling * If we support interrupts with relocation on AND we're a relocatable kernel, 107bc2e6c6aSMichael Neuling * we need to use CTR to get to the 2nd level handler. So, save/restore it 108bc2e6c6aSMichael Neuling * when required. 1094700dfafSMichael Neuling */ 110bc2e6c6aSMichael Neuling #define SAVE_CTR(reg, area) mfctr reg ; std reg,area+EX_CTR(r13) 111bc2e6c6aSMichael Neuling #define GET_CTR(reg, area) ld reg,area+EX_CTR(r13) 112bc2e6c6aSMichael Neuling #define RESTORE_CTR(reg, area) ld reg,area+EX_CTR(r13) ; mtctr reg 1134700dfafSMichael Neuling #else 114bc2e6c6aSMichael Neuling /* ...else CTR is unused and in register. */ 115bc2e6c6aSMichael Neuling #define SAVE_CTR(reg, area) 116bc2e6c6aSMichael Neuling #define GET_CTR(reg, area) mfctr reg 117bc2e6c6aSMichael Neuling #define RESTORE_CTR(reg, area) 1184700dfafSMichael Neuling #endif 1194700dfafSMichael Neuling 12013e7a8e8SHaren Myneni /* 12113e7a8e8SHaren Myneni * PPR save/restore macros used in exceptions_64s.S 12213e7a8e8SHaren Myneni * Used for P7 or later processors 12313e7a8e8SHaren Myneni */ 12413e7a8e8SHaren Myneni #define SAVE_PPR(area, ra, rb) \ 12513e7a8e8SHaren Myneni BEGIN_FTR_SECTION_NESTED(940) \ 12613e7a8e8SHaren Myneni ld ra,PACACURRENT(r13); \ 12713e7a8e8SHaren Myneni ld rb,area+EX_PPR(r13); /* Read PPR from paca */ \ 12813e7a8e8SHaren Myneni std rb,TASKTHREADPPR(ra); \ 12913e7a8e8SHaren Myneni END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940) 13013e7a8e8SHaren Myneni 13113e7a8e8SHaren Myneni #define RESTORE_PPR_PACA(area, ra) \ 13213e7a8e8SHaren Myneni BEGIN_FTR_SECTION_NESTED(941) \ 13313e7a8e8SHaren Myneni ld ra,area+EX_PPR(r13); \ 13413e7a8e8SHaren Myneni mtspr SPRN_PPR,ra; \ 13513e7a8e8SHaren Myneni END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941) 13613e7a8e8SHaren Myneni 13713e7a8e8SHaren Myneni /* 1381707dd16SPaul Mackerras * Get an SPR into a register if the CPU has the given feature 13913e7a8e8SHaren Myneni */ 1401707dd16SPaul Mackerras #define OPT_GET_SPR(ra, spr, ftr) \ 14113e7a8e8SHaren Myneni BEGIN_FTR_SECTION_NESTED(943) \ 1421707dd16SPaul Mackerras mfspr ra,spr; \ 1431707dd16SPaul Mackerras END_FTR_SECTION_NESTED(ftr,ftr,943) 14413e7a8e8SHaren Myneni 1451707dd16SPaul Mackerras /* 146d410ae21SMahesh Salgaonkar * Set an SPR from a register if the CPU has the given feature 147d410ae21SMahesh Salgaonkar */ 148d410ae21SMahesh Salgaonkar #define OPT_SET_SPR(ra, spr, ftr) \ 149d410ae21SMahesh Salgaonkar BEGIN_FTR_SECTION_NESTED(943) \ 150d410ae21SMahesh Salgaonkar mtspr spr,ra; \ 151d410ae21SMahesh Salgaonkar END_FTR_SECTION_NESTED(ftr,ftr,943) 152d410ae21SMahesh Salgaonkar 153d410ae21SMahesh Salgaonkar /* 1541707dd16SPaul Mackerras * Save a register to the PACA if the CPU has the given feature 1551707dd16SPaul Mackerras */ 1561707dd16SPaul Mackerras #define OPT_SAVE_REG_TO_PACA(offset, ra, ftr) \ 1571707dd16SPaul Mackerras BEGIN_FTR_SECTION_NESTED(943) \ 1581707dd16SPaul Mackerras std ra,offset(r13); \ 1591707dd16SPaul Mackerras END_FTR_SECTION_NESTED(ftr,ftr,943) 1601707dd16SPaul Mackerras 161f23ed166SNicholas Piggin #define EXCEPTION_PROLOG_0_PACA(area) \ 16244e9309fSHaren Myneni std r9,area+EX_R9(r13); /* save r9 */ \ 1631707dd16SPaul Mackerras OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \ 1641707dd16SPaul Mackerras HMT_MEDIUM; \ 16544e9309fSHaren Myneni std r10,area+EX_R10(r13); /* save r10 - r12 */ \ 1661707dd16SPaul Mackerras OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR) 1671707dd16SPaul Mackerras 168f23ed166SNicholas Piggin #define EXCEPTION_PROLOG_0(area) \ 169f23ed166SNicholas Piggin GET_PACA(r13); \ 170f23ed166SNicholas Piggin EXCEPTION_PROLOG_0_PACA(area) 171f23ed166SNicholas Piggin 1721707dd16SPaul Mackerras #define __EXCEPTION_PROLOG_1(area, extra, vec) \ 1731707dd16SPaul Mackerras OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \ 1741707dd16SPaul Mackerras OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \ 175bc2e6c6aSMichael Neuling SAVE_CTR(r10, area); \ 176b01c8b54SPaul Mackerras mfcr r9; \ 177b01c8b54SPaul Mackerras extra(vec); \ 178b01c8b54SPaul Mackerras std r11,area+EX_R11(r13); \ 179b01c8b54SPaul Mackerras std r12,area+EX_R12(r13); \ 180b01c8b54SPaul Mackerras GET_SCRATCH0(r10); \ 181b01c8b54SPaul Mackerras std r10,area+EX_R13(r13) 182b01c8b54SPaul Mackerras #define EXCEPTION_PROLOG_1(area, extra, vec) \ 183b01c8b54SPaul Mackerras __EXCEPTION_PROLOG_1(area, extra, vec) 1848aa34ab8SBenjamin Herrenschmidt 185a5d4f3adSBenjamin Herrenschmidt #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \ 1868aa34ab8SBenjamin Herrenschmidt ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 187a5d4f3adSBenjamin Herrenschmidt mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 1888aa34ab8SBenjamin Herrenschmidt LOAD_HANDLER(r12,label) \ 189a5d4f3adSBenjamin Herrenschmidt mtspr SPRN_##h##SRR0,r12; \ 190a5d4f3adSBenjamin Herrenschmidt mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 191a5d4f3adSBenjamin Herrenschmidt mtspr SPRN_##h##SRR1,r10; \ 192a5d4f3adSBenjamin Herrenschmidt h##rfid; \ 1938aa34ab8SBenjamin Herrenschmidt b . /* prevent speculative execution */ 194a5d4f3adSBenjamin Herrenschmidt #define EXCEPTION_PROLOG_PSERIES_1(label, h) \ 195a5d4f3adSBenjamin Herrenschmidt __EXCEPTION_PROLOG_PSERIES_1(label, h) 1968aa34ab8SBenjamin Herrenschmidt 197b01c8b54SPaul Mackerras #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \ 1981707dd16SPaul Mackerras EXCEPTION_PROLOG_0(area); \ 199b01c8b54SPaul Mackerras EXCEPTION_PROLOG_1(area, extra, vec); \ 200a5d4f3adSBenjamin Herrenschmidt EXCEPTION_PROLOG_PSERIES_1(label, h); 201c5a8c0c9SBenjamin Herrenschmidt 202f23ed166SNicholas Piggin /* Have the PACA in r13 already */ 203f23ed166SNicholas Piggin #define EXCEPTION_PROLOG_PSERIES_PACA(area, label, h, extra, vec) \ 204f23ed166SNicholas Piggin EXCEPTION_PROLOG_0_PACA(area); \ 205f23ed166SNicholas Piggin EXCEPTION_PROLOG_1(area, extra, vec); \ 206f23ed166SNicholas Piggin EXCEPTION_PROLOG_PSERIES_1(label, h); 207f23ed166SNicholas Piggin 208da2bc464SMichael Ellerman #define __KVMTEST(h, n) \ 2093c42bf8aSPaul Mackerras lbz r10,HSTATE_IN_GUEST(r13); \ 210b01c8b54SPaul Mackerras cmpwi r10,0; \ 211da2bc464SMichael Ellerman bne do_kvm_##h##n 212b01c8b54SPaul Mackerras 213dd96b2c2SAneesh Kumar K.V #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 214dd96b2c2SAneesh Kumar K.V /* 215dd96b2c2SAneesh Kumar K.V * If hv is possible, interrupts come into to the hv version 216dd96b2c2SAneesh Kumar K.V * of the kvmppc_interrupt code, which then jumps to the PR handler, 217dd96b2c2SAneesh Kumar K.V * kvmppc_interrupt_pr, if the guest is a PR guest. 218dd96b2c2SAneesh Kumar K.V */ 219dd96b2c2SAneesh Kumar K.V #define kvmppc_interrupt kvmppc_interrupt_hv 220dd96b2c2SAneesh Kumar K.V #else 221dd96b2c2SAneesh Kumar K.V #define kvmppc_interrupt kvmppc_interrupt_pr 222dd96b2c2SAneesh Kumar K.V #endif 223dd96b2c2SAneesh Kumar K.V 224fb479e44SNicholas Piggin #ifdef CONFIG_RELOCATABLE 225fb479e44SNicholas Piggin #define BRANCH_TO_COMMON(reg, label) \ 226fb479e44SNicholas Piggin __LOAD_HANDLER(reg, label); \ 227fb479e44SNicholas Piggin mtctr reg; \ 228fb479e44SNicholas Piggin bctr 229fb479e44SNicholas Piggin 230fb479e44SNicholas Piggin #else 231fb479e44SNicholas Piggin #define BRANCH_TO_COMMON(reg, label) \ 232fb479e44SNicholas Piggin b label 233fb479e44SNicholas Piggin 234fb479e44SNicholas Piggin #endif 235fb479e44SNicholas Piggin 236d3918e7fSNicholas Piggin #define __KVM_HANDLER(area, h, n) \ 2370acb9111SPaul Mackerras BEGIN_FTR_SECTION_NESTED(947) \ 2380acb9111SPaul Mackerras ld r10,area+EX_CFAR(r13); \ 2390acb9111SPaul Mackerras std r10,HSTATE_CFAR(r13); \ 2400acb9111SPaul Mackerras END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947); \ 2414b8473c9SPaul Mackerras BEGIN_FTR_SECTION_NESTED(948) \ 2424b8473c9SPaul Mackerras ld r10,area+EX_PPR(r13); \ 2434b8473c9SPaul Mackerras std r10,HSTATE_PPR(r13); \ 2444b8473c9SPaul Mackerras END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 245b01c8b54SPaul Mackerras ld r10,area+EX_R10(r13); \ 2463c42bf8aSPaul Mackerras std r12,HSTATE_SCRATCH0(r13); \ 247d3918e7fSNicholas Piggin sldi r12,r9,32; \ 248d3918e7fSNicholas Piggin ori r12,r12,(n); \ 249d3918e7fSNicholas Piggin ld r9,area+EX_R9(r13); \ 250b01c8b54SPaul Mackerras b kvmppc_interrupt 251b01c8b54SPaul Mackerras 252b01c8b54SPaul Mackerras #define __KVM_HANDLER_SKIP(area, h, n) \ 253b01c8b54SPaul Mackerras cmpwi r10,KVM_GUEST_MODE_SKIP; \ 254b01c8b54SPaul Mackerras beq 89f; \ 2554b8473c9SPaul Mackerras BEGIN_FTR_SECTION_NESTED(948) \ 256d3918e7fSNicholas Piggin ld r10,area+EX_PPR(r13); \ 257d3918e7fSNicholas Piggin std r10,HSTATE_PPR(r13); \ 2584b8473c9SPaul Mackerras END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 259d3918e7fSNicholas Piggin ld r10,area+EX_R10(r13); \ 2603c42bf8aSPaul Mackerras std r12,HSTATE_SCRATCH0(r13); \ 261d3918e7fSNicholas Piggin sldi r12,r9,32; \ 262d3918e7fSNicholas Piggin ori r12,r12,(n); \ 263d3918e7fSNicholas Piggin ld r9,area+EX_R9(r13); \ 264b01c8b54SPaul Mackerras b kvmppc_interrupt; \ 265b01c8b54SPaul Mackerras 89: mtocrf 0x80,r9; \ 266b01c8b54SPaul Mackerras ld r9,area+EX_R9(r13); \ 267d3918e7fSNicholas Piggin ld r10,area+EX_R10(r13); \ 268b01c8b54SPaul Mackerras b kvmppc_skip_##h##interrupt 269b01c8b54SPaul Mackerras 270b01c8b54SPaul Mackerras #ifdef CONFIG_KVM_BOOK3S_64_HANDLER 271da2bc464SMichael Ellerman #define KVMTEST(h, n) __KVMTEST(h, n) 272b01c8b54SPaul Mackerras #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n) 273b01c8b54SPaul Mackerras #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n) 274b01c8b54SPaul Mackerras 275b01c8b54SPaul Mackerras #else 276da2bc464SMichael Ellerman #define KVMTEST(h, n) 277b01c8b54SPaul Mackerras #define KVM_HANDLER(area, h, n) 278b01c8b54SPaul Mackerras #define KVM_HANDLER_SKIP(area, h, n) 279b01c8b54SPaul Mackerras #endif 280b01c8b54SPaul Mackerras 281b01c8b54SPaul Mackerras #define NOTEST(n) 282b01c8b54SPaul Mackerras 2838aa34ab8SBenjamin Herrenschmidt /* 2848aa34ab8SBenjamin Herrenschmidt * The common exception prolog is used for all except a few exceptions 2858aa34ab8SBenjamin Herrenschmidt * such as a segment miss on a kernel address. We have to be prepared 2868aa34ab8SBenjamin Herrenschmidt * to take another exception from the point where we first touch the 2878aa34ab8SBenjamin Herrenschmidt * kernel stack onwards. 2888aa34ab8SBenjamin Herrenschmidt * 2898aa34ab8SBenjamin Herrenschmidt * On entry r13 points to the paca, r9-r13 are saved in the paca, 2908aa34ab8SBenjamin Herrenschmidt * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and 2918aa34ab8SBenjamin Herrenschmidt * SRR1, and relocation is on. 2928aa34ab8SBenjamin Herrenschmidt */ 2938aa34ab8SBenjamin Herrenschmidt #define EXCEPTION_PROLOG_COMMON(n, area) \ 2948aa34ab8SBenjamin Herrenschmidt andi. r10,r12,MSR_PR; /* See if coming from user */ \ 2958aa34ab8SBenjamin Herrenschmidt mr r10,r1; /* Save r1 */ \ 2968aa34ab8SBenjamin Herrenschmidt subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \ 2978aa34ab8SBenjamin Herrenschmidt beq- 1f; \ 2988aa34ab8SBenjamin Herrenschmidt ld r1,PACAKSAVE(r13); /* kernel stack to use */ \ 29990ff5d68SMichael Neuling 1: cmpdi cr1,r1,-INT_FRAME_SIZE; /* check if r1 is in userspace */ \ 3001977b502SPaul Mackerras blt+ cr1,3f; /* abort if it is */ \ 3011977b502SPaul Mackerras li r1,(n); /* will be reloaded later */ \ 3028aa34ab8SBenjamin Herrenschmidt sth r1,PACA_TRAP_SAVE(r13); \ 3031977b502SPaul Mackerras std r3,area+EX_R3(r13); \ 3041977b502SPaul Mackerras addi r3,r13,area; /* r3 -> where regs are saved*/ \ 305bc2e6c6aSMichael Neuling RESTORE_CTR(r1, area); \ 3068aa34ab8SBenjamin Herrenschmidt b bad_stack; \ 3078aa34ab8SBenjamin Herrenschmidt 3: std r9,_CCR(r1); /* save CR in stackframe */ \ 3088aa34ab8SBenjamin Herrenschmidt std r11,_NIP(r1); /* save SRR0 in stackframe */ \ 3098aa34ab8SBenjamin Herrenschmidt std r12,_MSR(r1); /* save SRR1 in stackframe */ \ 3108aa34ab8SBenjamin Herrenschmidt std r10,0(r1); /* make stack chain pointer */ \ 3118aa34ab8SBenjamin Herrenschmidt std r0,GPR0(r1); /* save r0 in stackframe */ \ 3128aa34ab8SBenjamin Herrenschmidt std r10,GPR1(r1); /* save r1 in stackframe */ \ 3135d75b264SHaren Myneni beq 4f; /* if from kernel mode */ \ 314c223c903SChristophe Leroy ACCOUNT_CPU_USER_ENTRY(r13, r9, r10); \ 31544e9309fSHaren Myneni SAVE_PPR(area, r9, r10); \ 316b14a7253SMahesh Salgaonkar 4: EXCEPTION_PROLOG_COMMON_2(area) \ 317b14a7253SMahesh Salgaonkar EXCEPTION_PROLOG_COMMON_3(n) \ 318b14a7253SMahesh Salgaonkar ACCOUNT_STOLEN_TIME 319b14a7253SMahesh Salgaonkar 320b14a7253SMahesh Salgaonkar /* Save original regs values from save area to stack frame. */ 321b14a7253SMahesh Salgaonkar #define EXCEPTION_PROLOG_COMMON_2(area) \ 3228aa34ab8SBenjamin Herrenschmidt ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \ 3238aa34ab8SBenjamin Herrenschmidt ld r10,area+EX_R10(r13); \ 3248aa34ab8SBenjamin Herrenschmidt std r9,GPR9(r1); \ 3258aa34ab8SBenjamin Herrenschmidt std r10,GPR10(r1); \ 3268aa34ab8SBenjamin Herrenschmidt ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \ 3278aa34ab8SBenjamin Herrenschmidt ld r10,area+EX_R12(r13); \ 3288aa34ab8SBenjamin Herrenschmidt ld r11,area+EX_R13(r13); \ 3298aa34ab8SBenjamin Herrenschmidt std r9,GPR11(r1); \ 3308aa34ab8SBenjamin Herrenschmidt std r10,GPR12(r1); \ 3318aa34ab8SBenjamin Herrenschmidt std r11,GPR13(r1); \ 33248404f2eSPaul Mackerras BEGIN_FTR_SECTION_NESTED(66); \ 33348404f2eSPaul Mackerras ld r10,area+EX_CFAR(r13); \ 33448404f2eSPaul Mackerras std r10,ORIG_GPR3(r1); \ 33548404f2eSPaul Mackerras END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \ 336b14a7253SMahesh Salgaonkar GET_CTR(r10, area); \ 337b14a7253SMahesh Salgaonkar std r10,_CTR(r1); 338b14a7253SMahesh Salgaonkar 339b14a7253SMahesh Salgaonkar #define EXCEPTION_PROLOG_COMMON_3(n) \ 340b14a7253SMahesh Salgaonkar std r2,GPR2(r1); /* save r2 in stackframe */ \ 341b14a7253SMahesh Salgaonkar SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \ 342b14a7253SMahesh Salgaonkar SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \ 343bc2e6c6aSMichael Neuling mflr r9; /* Get LR, later save to stack */ \ 3448aa34ab8SBenjamin Herrenschmidt ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \ 3458aa34ab8SBenjamin Herrenschmidt std r9,_LINK(r1); \ 3468aa34ab8SBenjamin Herrenschmidt lbz r10,PACASOFTIRQEN(r13); \ 3478aa34ab8SBenjamin Herrenschmidt mfspr r11,SPRN_XER; /* save XER in stackframe */ \ 3488aa34ab8SBenjamin Herrenschmidt std r10,SOFTE(r1); \ 3498aa34ab8SBenjamin Herrenschmidt std r11,_XER(r1); \ 3508aa34ab8SBenjamin Herrenschmidt li r9,(n)+1; \ 3518aa34ab8SBenjamin Herrenschmidt std r9,_TRAP(r1); /* set trap number */ \ 3528aa34ab8SBenjamin Herrenschmidt li r10,0; \ 3538aa34ab8SBenjamin Herrenschmidt ld r11,exception_marker@toc(r2); \ 3548aa34ab8SBenjamin Herrenschmidt std r10,RESULT(r1); /* clear regs->result */ \ 355b14a7253SMahesh Salgaonkar std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ 3568aa34ab8SBenjamin Herrenschmidt 3578aa34ab8SBenjamin Herrenschmidt /* 3588aa34ab8SBenjamin Herrenschmidt * Exception vectors. 3598aa34ab8SBenjamin Herrenschmidt */ 3602613265cSMichael Ellerman #define STD_EXCEPTION_PSERIES(vec, label) \ 361673b189aSPaul Mackerras SET_SCRATCH0(r13); /* save r13 */ \ 362da2bc464SMichael Ellerman EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \ 363da2bc464SMichael Ellerman EXC_STD, KVMTEST_PR, vec); \ 3648aa34ab8SBenjamin Herrenschmidt 3651707dd16SPaul Mackerras /* Version of above for when we have to branch out-of-line */ 366da2bc464SMichael Ellerman #define __OOL_EXCEPTION(vec, label, hdlr) \ 367da2bc464SMichael Ellerman SET_SCRATCH0(r13) \ 368da2bc464SMichael Ellerman EXCEPTION_PROLOG_0(PACA_EXGEN) \ 369da2bc464SMichael Ellerman b hdlr; 370da2bc464SMichael Ellerman 3711707dd16SPaul Mackerras #define STD_EXCEPTION_PSERIES_OOL(vec, label) \ 372da2bc464SMichael Ellerman EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \ 373da2bc464SMichael Ellerman EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD) 3741707dd16SPaul Mackerras 375b3e6b5dfSBenjamin Herrenschmidt #define STD_EXCEPTION_HV(loc, vec, label) \ 376673b189aSPaul Mackerras SET_SCRATCH0(r13); /* save r13 */ \ 377da2bc464SMichael Ellerman EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \ 378da2bc464SMichael Ellerman EXC_HV, KVMTEST_HV, vec); 3798aa34ab8SBenjamin Herrenschmidt 3801707dd16SPaul Mackerras #define STD_EXCEPTION_HV_OOL(vec, label) \ 381da2bc464SMichael Ellerman EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \ 382da2bc464SMichael Ellerman EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) 3831707dd16SPaul Mackerras 3844700dfafSMichael Neuling #define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 3854700dfafSMichael Neuling /* No guest interrupts come through here */ \ 3864700dfafSMichael Neuling SET_SCRATCH0(r13); /* save r13 */ \ 387da2bc464SMichael Ellerman EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, EXC_STD, NOTEST, vec); 3884700dfafSMichael Neuling 3891707dd16SPaul Mackerras #define STD_RELON_EXCEPTION_PSERIES_OOL(vec, label) \ 390c9f69518SMichael Ellerman EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \ 391da2bc464SMichael Ellerman EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_STD) 3921707dd16SPaul Mackerras 3934700dfafSMichael Neuling #define STD_RELON_EXCEPTION_HV(loc, vec, label) \ 3944700dfafSMichael Neuling /* No guest interrupts come through here */ \ 3954700dfafSMichael Neuling SET_SCRATCH0(r13); /* save r13 */ \ 396da2bc464SMichael Ellerman EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, EXC_HV, NOTEST, vec); 3974700dfafSMichael Neuling 3981707dd16SPaul Mackerras #define STD_RELON_EXCEPTION_HV_OOL(vec, label) \ 399c9f69518SMichael Ellerman EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \ 400da2bc464SMichael Ellerman EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV) 4011707dd16SPaul Mackerras 4027230c564SBenjamin Herrenschmidt /* This associate vector numbers with bits in paca->irq_happened */ 4037230c564SBenjamin Herrenschmidt #define SOFTEN_VALUE_0x500 PACA_IRQ_EE 4047230c564SBenjamin Herrenschmidt #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC 405da2bc464SMichael Ellerman #define SOFTEN_VALUE_0x980 PACA_IRQ_DEC 4061dbdafecSIan Munsie #define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL 407655bb3f4SIan Munsie #define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL 4080869b6fdSMahesh Salgaonkar #define SOFTEN_VALUE_0xe60 PACA_IRQ_HMI 4099baaef0aSBenjamin Herrenschmidt #define SOFTEN_VALUE_0xea0 PACA_IRQ_EE 4107230c564SBenjamin Herrenschmidt 4117230c564SBenjamin Herrenschmidt #define __SOFTEN_TEST(h, vec) \ 4128aa34ab8SBenjamin Herrenschmidt lbz r10,PACASOFTIRQEN(r13); \ 4138aa34ab8SBenjamin Herrenschmidt cmpwi r10,0; \ 4147230c564SBenjamin Herrenschmidt li r10,SOFTEN_VALUE_##vec; \ 415b01c8b54SPaul Mackerras beq masked_##h##interrupt 416da2bc464SMichael Ellerman 4177230c564SBenjamin Herrenschmidt #define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec) 418b01c8b54SPaul Mackerras 419de56a948SPaul Mackerras #define SOFTEN_TEST_PR(vec) \ 420da2bc464SMichael Ellerman KVMTEST(EXC_STD, vec); \ 4217230c564SBenjamin Herrenschmidt _SOFTEN_TEST(EXC_STD, vec) 422b01c8b54SPaul Mackerras 423b01c8b54SPaul Mackerras #define SOFTEN_TEST_HV(vec) \ 424da2bc464SMichael Ellerman KVMTEST(EXC_HV, vec); \ 4257230c564SBenjamin Herrenschmidt _SOFTEN_TEST(EXC_HV, vec) 426b01c8b54SPaul Mackerras 427da2bc464SMichael Ellerman #define KVMTEST_PR(vec) \ 428da2bc464SMichael Ellerman KVMTEST(EXC_STD, vec) 429da2bc464SMichael Ellerman 430da2bc464SMichael Ellerman #define KVMTEST_HV(vec) \ 431da2bc464SMichael Ellerman KVMTEST(EXC_HV, vec) 432da2bc464SMichael Ellerman 4334700dfafSMichael Neuling #define SOFTEN_NOTEST_PR(vec) _SOFTEN_TEST(EXC_STD, vec) 4344700dfafSMichael Neuling #define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec) 4354700dfafSMichael Neuling 436b01c8b54SPaul Mackerras #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 437b01c8b54SPaul Mackerras SET_SCRATCH0(r13); /* save r13 */ \ 4381707dd16SPaul Mackerras EXCEPTION_PROLOG_0(PACA_EXGEN); \ 439b01c8b54SPaul Mackerras __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 440da2bc464SMichael Ellerman EXCEPTION_PROLOG_PSERIES_1(label, h); 4411707dd16SPaul Mackerras 442b01c8b54SPaul Mackerras #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 443b01c8b54SPaul Mackerras __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) 444b3e6b5dfSBenjamin Herrenschmidt 445b3e6b5dfSBenjamin Herrenschmidt #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \ 446b01c8b54SPaul Mackerras _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 447de56a948SPaul Mackerras EXC_STD, SOFTEN_TEST_PR) 448b3e6b5dfSBenjamin Herrenschmidt 449da2bc464SMichael Ellerman #define MASKABLE_EXCEPTION_PSERIES_OOL(vec, label) \ 450da2bc464SMichael Ellerman EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, vec); \ 451da2bc464SMichael Ellerman EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD) 452da2bc464SMichael Ellerman 453b3e6b5dfSBenjamin Herrenschmidt #define MASKABLE_EXCEPTION_HV(loc, vec, label) \ 454b01c8b54SPaul Mackerras _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 455b01c8b54SPaul Mackerras EXC_HV, SOFTEN_TEST_HV) 4568aa34ab8SBenjamin Herrenschmidt 4571707dd16SPaul Mackerras #define MASKABLE_EXCEPTION_HV_OOL(vec, label) \ 4581707dd16SPaul Mackerras EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \ 459da2bc464SMichael Ellerman EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) 4601707dd16SPaul Mackerras 4614700dfafSMichael Neuling #define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 4624700dfafSMichael Neuling SET_SCRATCH0(r13); /* save r13 */ \ 4631707dd16SPaul Mackerras EXCEPTION_PROLOG_0(PACA_EXGEN); \ 4644700dfafSMichael Neuling __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 465da2bc464SMichael Ellerman EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 466da2bc464SMichael Ellerman 4674700dfafSMichael Neuling #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 4684700dfafSMichael Neuling __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) 4694700dfafSMichael Neuling 4704700dfafSMichael Neuling #define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 4714700dfafSMichael Neuling _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 4724700dfafSMichael Neuling EXC_STD, SOFTEN_NOTEST_PR) 4734700dfafSMichael Neuling 4744700dfafSMichael Neuling #define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label) \ 4754700dfafSMichael Neuling _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 4764700dfafSMichael Neuling EXC_HV, SOFTEN_NOTEST_HV) 4774700dfafSMichael Neuling 4781707dd16SPaul Mackerras #define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label) \ 4791707dd16SPaul Mackerras EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_NOTEST_HV, vec); \ 480da2bc464SMichael Ellerman EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) 4811707dd16SPaul Mackerras 4821b701179SBenjamin Herrenschmidt /* 4831b701179SBenjamin Herrenschmidt * Our exception common code can be passed various "additions" 4841b701179SBenjamin Herrenschmidt * to specify the behaviour of interrupts, whether to kick the 4851b701179SBenjamin Herrenschmidt * runlatch, etc... 4861b701179SBenjamin Herrenschmidt */ 4871b701179SBenjamin Herrenschmidt 4889daf112bSMichael Ellerman /* 4899daf112bSMichael Ellerman * This addition reconciles our actual IRQ state with the various software 4909daf112bSMichael Ellerman * flags that track it. This may call C code. 4919daf112bSMichael Ellerman */ 4929daf112bSMichael Ellerman #define ADD_RECONCILE RECONCILE_IRQ_STATE(r10,r11) 4938aa34ab8SBenjamin Herrenschmidt 494fe1952fcSBenjamin Herrenschmidt #define ADD_NVGPRS \ 495b1576fecSAnton Blanchard bl save_nvgprs 496fe1952fcSBenjamin Herrenschmidt 497fe1952fcSBenjamin Herrenschmidt #define RUNLATCH_ON \ 498fe1952fcSBenjamin Herrenschmidt BEGIN_FTR_SECTION \ 4999778b696SStuart Yoder CURRENT_THREAD_INFO(r3, r1); \ 500fe1952fcSBenjamin Herrenschmidt ld r4,TI_LOCAL_FLAGS(r3); \ 501fe1952fcSBenjamin Herrenschmidt andi. r0,r4,_TLF_RUNLATCH; \ 502fe1952fcSBenjamin Herrenschmidt beql ppc64_runlatch_on_trampoline; \ 503fe1952fcSBenjamin Herrenschmidt END_FTR_SECTION_IFSET(CPU_FTR_CTRL) 504fe1952fcSBenjamin Herrenschmidt 505fe1952fcSBenjamin Herrenschmidt #define EXCEPTION_COMMON(trap, label, hdlr, ret, additions) \ 5068aa34ab8SBenjamin Herrenschmidt EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \ 507a1d711c5SMichael Ellerman /* Volatile regs are potentially clobbered here */ \ 508fe1952fcSBenjamin Herrenschmidt additions; \ 5098aa34ab8SBenjamin Herrenschmidt addi r3,r1,STACK_FRAME_OVERHEAD; \ 5108aa34ab8SBenjamin Herrenschmidt bl hdlr; \ 511fe1952fcSBenjamin Herrenschmidt b ret 512fe1952fcSBenjamin Herrenschmidt 513fe1952fcSBenjamin Herrenschmidt #define STD_EXCEPTION_COMMON(trap, label, hdlr) \ 514fe1952fcSBenjamin Herrenschmidt EXCEPTION_COMMON(trap, label, hdlr, ret_from_except, \ 5159daf112bSMichael Ellerman ADD_NVGPRS;ADD_RECONCILE) 5168aa34ab8SBenjamin Herrenschmidt 5178aa34ab8SBenjamin Herrenschmidt /* 5188aa34ab8SBenjamin Herrenschmidt * Like STD_EXCEPTION_COMMON, but for exceptions that can occur 5197450f6f0SBenjamin Herrenschmidt * in the idle task and therefore need the special idle handling 5207450f6f0SBenjamin Herrenschmidt * (finish nap and runlatch) 5218aa34ab8SBenjamin Herrenschmidt */ 5227450f6f0SBenjamin Herrenschmidt #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \ 523fe1952fcSBenjamin Herrenschmidt EXCEPTION_COMMON(trap, label, hdlr, ret_from_except_lite, \ 5249daf112bSMichael Ellerman FINISH_NAP;ADD_RECONCILE;RUNLATCH_ON) 5258aa34ab8SBenjamin Herrenschmidt 5268aa34ab8SBenjamin Herrenschmidt /* 5278aa34ab8SBenjamin Herrenschmidt * When the idle code in power4_idle puts the CPU into NAP mode, 5288aa34ab8SBenjamin Herrenschmidt * it has to do so in a loop, and relies on the external interrupt 5298aa34ab8SBenjamin Herrenschmidt * and decrementer interrupt entry code to get it out of the loop. 5308aa34ab8SBenjamin Herrenschmidt * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags 5318aa34ab8SBenjamin Herrenschmidt * to signal that it is in the loop and needs help to get out. 5328aa34ab8SBenjamin Herrenschmidt */ 5338aa34ab8SBenjamin Herrenschmidt #ifdef CONFIG_PPC_970_NAP 5348aa34ab8SBenjamin Herrenschmidt #define FINISH_NAP \ 5358aa34ab8SBenjamin Herrenschmidt BEGIN_FTR_SECTION \ 5369778b696SStuart Yoder CURRENT_THREAD_INFO(r11, r1); \ 5378aa34ab8SBenjamin Herrenschmidt ld r9,TI_LOCAL_FLAGS(r11); \ 5388aa34ab8SBenjamin Herrenschmidt andi. r10,r9,_TLF_NAPPING; \ 5398aa34ab8SBenjamin Herrenschmidt bnel power4_fixup_nap; \ 5408aa34ab8SBenjamin Herrenschmidt END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) 5418aa34ab8SBenjamin Herrenschmidt #else 5428aa34ab8SBenjamin Herrenschmidt #define FINISH_NAP 5438aa34ab8SBenjamin Herrenschmidt #endif 5448aa34ab8SBenjamin Herrenschmidt 5458aa34ab8SBenjamin Herrenschmidt #endif /* _ASM_POWERPC_EXCEPTION_H */ 546