18aa34ab8SBenjamin Herrenschmidt #ifndef _ASM_POWERPC_EXCEPTION_H 28aa34ab8SBenjamin Herrenschmidt #define _ASM_POWERPC_EXCEPTION_H 38aa34ab8SBenjamin Herrenschmidt /* 48aa34ab8SBenjamin Herrenschmidt * Extracted from head_64.S 58aa34ab8SBenjamin Herrenschmidt * 68aa34ab8SBenjamin Herrenschmidt * PowerPC version 78aa34ab8SBenjamin Herrenschmidt * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 88aa34ab8SBenjamin Herrenschmidt * 98aa34ab8SBenjamin Herrenschmidt * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP 108aa34ab8SBenjamin Herrenschmidt * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> 118aa34ab8SBenjamin Herrenschmidt * Adapted for Power Macintosh by Paul Mackerras. 128aa34ab8SBenjamin Herrenschmidt * Low-level exception handlers and MMU support 138aa34ab8SBenjamin Herrenschmidt * rewritten by Paul Mackerras. 148aa34ab8SBenjamin Herrenschmidt * Copyright (C) 1996 Paul Mackerras. 158aa34ab8SBenjamin Herrenschmidt * 168aa34ab8SBenjamin Herrenschmidt * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and 178aa34ab8SBenjamin Herrenschmidt * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com 188aa34ab8SBenjamin Herrenschmidt * 198aa34ab8SBenjamin Herrenschmidt * This file contains the low-level support and setup for the 208aa34ab8SBenjamin Herrenschmidt * PowerPC-64 platform, including trap and interrupt dispatch. 218aa34ab8SBenjamin Herrenschmidt * 228aa34ab8SBenjamin Herrenschmidt * This program is free software; you can redistribute it and/or 238aa34ab8SBenjamin Herrenschmidt * modify it under the terms of the GNU General Public License 248aa34ab8SBenjamin Herrenschmidt * as published by the Free Software Foundation; either version 258aa34ab8SBenjamin Herrenschmidt * 2 of the License, or (at your option) any later version. 268aa34ab8SBenjamin Herrenschmidt */ 278aa34ab8SBenjamin Herrenschmidt /* 288aa34ab8SBenjamin Herrenschmidt * The following macros define the code that appears as 298aa34ab8SBenjamin Herrenschmidt * the prologue to each of the exception handlers. They 308aa34ab8SBenjamin Herrenschmidt * are split into two parts to allow a single kernel binary 318aa34ab8SBenjamin Herrenschmidt * to be used for pSeries and iSeries. 328aa34ab8SBenjamin Herrenschmidt * 338aa34ab8SBenjamin Herrenschmidt * We make as much of the exception code common between native 348aa34ab8SBenjamin Herrenschmidt * exception handlers (including pSeries LPAR) and iSeries LPAR 358aa34ab8SBenjamin Herrenschmidt * implementations as possible. 368aa34ab8SBenjamin Herrenschmidt */ 37da2bc464SMichael Ellerman #include <asm/head-64.h> 388aa34ab8SBenjamin Herrenschmidt 398c388514SNicholas Piggin /* PACA save area offsets (exgen, exmc, etc) */ 408aa34ab8SBenjamin Herrenschmidt #define EX_R9 0 418aa34ab8SBenjamin Herrenschmidt #define EX_R10 8 428aa34ab8SBenjamin Herrenschmidt #define EX_R11 16 438aa34ab8SBenjamin Herrenschmidt #define EX_R12 24 448aa34ab8SBenjamin Herrenschmidt #define EX_R13 32 4536670fcfSNicholas Piggin #define EX_DAR 40 4636670fcfSNicholas Piggin #define EX_DSISR 48 4736670fcfSNicholas Piggin #define EX_CCR 52 48635942aeSNicholas Piggin #define EX_CFAR 56 49635942aeSNicholas Piggin #define EX_PPR 64 508568f1e0SNicholas Piggin #if defined(CONFIG_RELOCATABLE) 51635942aeSNicholas Piggin #define EX_CTR 72 52635942aeSNicholas Piggin #define EX_SIZE 10 /* size in u64 units */ 538568f1e0SNicholas Piggin #else 548568f1e0SNicholas Piggin #define EX_SIZE 9 /* size in u64 units */ 558568f1e0SNicholas Piggin #endif 56dbeea1d6SNicholas Piggin 57dbeea1d6SNicholas Piggin /* 58ba41e1e1SBalbir Singh * maximum recursive depth of MCE exceptions 59ba41e1e1SBalbir Singh */ 60ba41e1e1SBalbir Singh #define MAX_MCE_DEPTH 4 61ba41e1e1SBalbir Singh 62ba41e1e1SBalbir Singh /* 63dbeea1d6SNicholas Piggin * EX_LR is only used in EXSLB and where it does not overlap with EX_DAR 64dbeea1d6SNicholas Piggin * EX_CCR similarly with DSISR, but being 4 byte registers there is a hole 65dbeea1d6SNicholas Piggin * in the save area so it's not necessary to overlap them. Could be used 66dbeea1d6SNicholas Piggin * for future savings though if another 4 byte register was to be saved. 67dbeea1d6SNicholas Piggin */ 68dbeea1d6SNicholas Piggin #define EX_LR EX_DAR 698c388514SNicholas Piggin 70635942aeSNicholas Piggin /* 71635942aeSNicholas Piggin * EX_R3 is only used by the bad_stack handler. bad_stack reloads and 72635942aeSNicholas Piggin * saves DAR from SPRN_DAR, and EX_DAR is not used. So EX_R3 can overlap 73635942aeSNicholas Piggin * with EX_DAR. 74635942aeSNicholas Piggin */ 75635942aeSNicholas Piggin #define EX_R3 EX_DAR 76635942aeSNicholas Piggin 77aa8a5e00SMichael Ellerman /* 78aa8a5e00SMichael Ellerman * Macros for annotating the expected destination of (h)rfid 79aa8a5e00SMichael Ellerman * 80aa8a5e00SMichael Ellerman * The nop instructions allow us to insert one or more instructions to flush the 81aa8a5e00SMichael Ellerman * L1-D cache when returning to userspace or a guest. 82aa8a5e00SMichael Ellerman */ 83aa8a5e00SMichael Ellerman #define RFI_FLUSH_SLOT \ 84aa8a5e00SMichael Ellerman RFI_FLUSH_FIXUP_SECTION; \ 85aa8a5e00SMichael Ellerman nop; \ 86aa8a5e00SMichael Ellerman nop; \ 87aa8a5e00SMichael Ellerman nop 8850e51c13SNicholas Piggin 8950e51c13SNicholas Piggin #define RFI_TO_KERNEL \ 9050e51c13SNicholas Piggin rfid 9150e51c13SNicholas Piggin 9250e51c13SNicholas Piggin #define RFI_TO_USER \ 93aa8a5e00SMichael Ellerman RFI_FLUSH_SLOT; \ 94aa8a5e00SMichael Ellerman rfid; \ 95aa8a5e00SMichael Ellerman b rfi_flush_fallback 9650e51c13SNicholas Piggin 9750e51c13SNicholas Piggin #define RFI_TO_USER_OR_KERNEL \ 98aa8a5e00SMichael Ellerman RFI_FLUSH_SLOT; \ 99aa8a5e00SMichael Ellerman rfid; \ 100aa8a5e00SMichael Ellerman b rfi_flush_fallback 10150e51c13SNicholas Piggin 10250e51c13SNicholas Piggin #define RFI_TO_GUEST \ 103aa8a5e00SMichael Ellerman RFI_FLUSH_SLOT; \ 104aa8a5e00SMichael Ellerman rfid; \ 105aa8a5e00SMichael Ellerman b rfi_flush_fallback 10650e51c13SNicholas Piggin 10750e51c13SNicholas Piggin #define HRFI_TO_KERNEL \ 10850e51c13SNicholas Piggin hrfid 10950e51c13SNicholas Piggin 11050e51c13SNicholas Piggin #define HRFI_TO_USER \ 111aa8a5e00SMichael Ellerman RFI_FLUSH_SLOT; \ 112aa8a5e00SMichael Ellerman hrfid; \ 113aa8a5e00SMichael Ellerman b hrfi_flush_fallback 11450e51c13SNicholas Piggin 11550e51c13SNicholas Piggin #define HRFI_TO_USER_OR_KERNEL \ 116aa8a5e00SMichael Ellerman RFI_FLUSH_SLOT; \ 117aa8a5e00SMichael Ellerman hrfid; \ 118aa8a5e00SMichael Ellerman b hrfi_flush_fallback 11950e51c13SNicholas Piggin 12050e51c13SNicholas Piggin #define HRFI_TO_GUEST \ 121aa8a5e00SMichael Ellerman RFI_FLUSH_SLOT; \ 122aa8a5e00SMichael Ellerman hrfid; \ 123aa8a5e00SMichael Ellerman b hrfi_flush_fallback 12450e51c13SNicholas Piggin 12550e51c13SNicholas Piggin #define HRFI_TO_UNKNOWN \ 126aa8a5e00SMichael Ellerman RFI_FLUSH_SLOT; \ 127aa8a5e00SMichael Ellerman hrfid; \ 128aa8a5e00SMichael Ellerman b hrfi_flush_fallback 12950e51c13SNicholas Piggin 1304700dfafSMichael Neuling #ifdef CONFIG_RELOCATABLE 1311707dd16SPaul Mackerras #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 1324700dfafSMichael Neuling mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 1334700dfafSMichael Neuling LOAD_HANDLER(r12,label); \ 134bc2e6c6aSMichael Neuling mtctr r12; \ 1354700dfafSMichael Neuling mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 1364700dfafSMichael Neuling li r10,MSR_RI; \ 1374700dfafSMichael Neuling mtmsrd r10,1; /* Set RI (EE=0) */ \ 138bc2e6c6aSMichael Neuling bctr; 1394700dfafSMichael Neuling #else 1404700dfafSMichael Neuling /* If not relocatable, we can jump directly -- and save messing with LR */ 1411707dd16SPaul Mackerras #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 1424700dfafSMichael Neuling mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 1434700dfafSMichael Neuling mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 1444700dfafSMichael Neuling li r10,MSR_RI; \ 1454700dfafSMichael Neuling mtmsrd r10,1; /* Set RI (EE=0) */ \ 1464700dfafSMichael Neuling b label; 1474700dfafSMichael Neuling #endif 1481707dd16SPaul Mackerras #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 1491707dd16SPaul Mackerras __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 1504700dfafSMichael Neuling 1514700dfafSMichael Neuling /* 1524700dfafSMichael Neuling * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on 1534700dfafSMichael Neuling * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which 1544700dfafSMichael Neuling * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr. 1554700dfafSMichael Neuling */ 1564700dfafSMichael Neuling #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \ 1571707dd16SPaul Mackerras EXCEPTION_PROLOG_0(area); \ 1584700dfafSMichael Neuling EXCEPTION_PROLOG_1(area, extra, vec); \ 1594700dfafSMichael Neuling EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 1604700dfafSMichael Neuling 1618aa34ab8SBenjamin Herrenschmidt /* 1628aa34ab8SBenjamin Herrenschmidt * We're short on space and time in the exception prolog, so we can't 16327510235SMichael Ellerman * use the normal LOAD_REG_IMMEDIATE macro to load the address of label. 16427510235SMichael Ellerman * Instead we get the base of the kernel from paca->kernelbase and or in the low 16527510235SMichael Ellerman * part of label. This requires that the label be within 64KB of kernelbase, and 16627510235SMichael Ellerman * that kernelbase be 64K aligned. 1678aa34ab8SBenjamin Herrenschmidt */ 1688aa34ab8SBenjamin Herrenschmidt #define LOAD_HANDLER(reg, label) \ 169d8d42b05SMichael Ellerman ld reg,PACAKBASE(r13); /* get high part of &label */ \ 170e6740ae6SHugh Dickins ori reg,reg,FIXED_SYMBOL_ABS_ADDR(label); 1718aa34ab8SBenjamin Herrenschmidt 172fb479e44SNicholas Piggin #define __LOAD_HANDLER(reg, label) \ 173fb479e44SNicholas Piggin ld reg,PACAKBASE(r13); \ 174fb479e44SNicholas Piggin ori reg,reg,(ABS_ADDR(label))@l; 175fb479e44SNicholas Piggin 176a97a65d5SNicholas Piggin /* 177a97a65d5SNicholas Piggin * Branches from unrelocated code (e.g., interrupts) to labels outside 178a97a65d5SNicholas Piggin * head-y require >64K offsets. 179a97a65d5SNicholas Piggin */ 180a97a65d5SNicholas Piggin #define __LOAD_FAR_HANDLER(reg, label) \ 181a97a65d5SNicholas Piggin ld reg,PACAKBASE(r13); \ 182a97a65d5SNicholas Piggin ori reg,reg,(ABS_ADDR(label))@l; \ 183a97a65d5SNicholas Piggin addis reg,reg,(ABS_ADDR(label))@h; 184a97a65d5SNicholas Piggin 185a5d4f3adSBenjamin Herrenschmidt /* Exception register prefixes */ 186a5d4f3adSBenjamin Herrenschmidt #define EXC_HV H 187a5d4f3adSBenjamin Herrenschmidt #define EXC_STD 188a5d4f3adSBenjamin Herrenschmidt 1894700dfafSMichael Neuling #if defined(CONFIG_RELOCATABLE) 1904700dfafSMichael Neuling /* 191bc2e6c6aSMichael Neuling * If we support interrupts with relocation on AND we're a relocatable kernel, 192bc2e6c6aSMichael Neuling * we need to use CTR to get to the 2nd level handler. So, save/restore it 193bc2e6c6aSMichael Neuling * when required. 1944700dfafSMichael Neuling */ 195bc2e6c6aSMichael Neuling #define SAVE_CTR(reg, area) mfctr reg ; std reg,area+EX_CTR(r13) 196bc2e6c6aSMichael Neuling #define GET_CTR(reg, area) ld reg,area+EX_CTR(r13) 197bc2e6c6aSMichael Neuling #define RESTORE_CTR(reg, area) ld reg,area+EX_CTR(r13) ; mtctr reg 1984700dfafSMichael Neuling #else 199bc2e6c6aSMichael Neuling /* ...else CTR is unused and in register. */ 200bc2e6c6aSMichael Neuling #define SAVE_CTR(reg, area) 201bc2e6c6aSMichael Neuling #define GET_CTR(reg, area) mfctr reg 202bc2e6c6aSMichael Neuling #define RESTORE_CTR(reg, area) 2034700dfafSMichael Neuling #endif 2044700dfafSMichael Neuling 20513e7a8e8SHaren Myneni /* 20613e7a8e8SHaren Myneni * PPR save/restore macros used in exceptions_64s.S 20713e7a8e8SHaren Myneni * Used for P7 or later processors 20813e7a8e8SHaren Myneni */ 20913e7a8e8SHaren Myneni #define SAVE_PPR(area, ra, rb) \ 21013e7a8e8SHaren Myneni BEGIN_FTR_SECTION_NESTED(940) \ 21113e7a8e8SHaren Myneni ld ra,PACACURRENT(r13); \ 21213e7a8e8SHaren Myneni ld rb,area+EX_PPR(r13); /* Read PPR from paca */ \ 21313e7a8e8SHaren Myneni std rb,TASKTHREADPPR(ra); \ 21413e7a8e8SHaren Myneni END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940) 21513e7a8e8SHaren Myneni 21613e7a8e8SHaren Myneni #define RESTORE_PPR_PACA(area, ra) \ 21713e7a8e8SHaren Myneni BEGIN_FTR_SECTION_NESTED(941) \ 21813e7a8e8SHaren Myneni ld ra,area+EX_PPR(r13); \ 21913e7a8e8SHaren Myneni mtspr SPRN_PPR,ra; \ 22013e7a8e8SHaren Myneni END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941) 22113e7a8e8SHaren Myneni 22213e7a8e8SHaren Myneni /* 2231707dd16SPaul Mackerras * Get an SPR into a register if the CPU has the given feature 22413e7a8e8SHaren Myneni */ 2251707dd16SPaul Mackerras #define OPT_GET_SPR(ra, spr, ftr) \ 22613e7a8e8SHaren Myneni BEGIN_FTR_SECTION_NESTED(943) \ 2271707dd16SPaul Mackerras mfspr ra,spr; \ 2281707dd16SPaul Mackerras END_FTR_SECTION_NESTED(ftr,ftr,943) 22913e7a8e8SHaren Myneni 2301707dd16SPaul Mackerras /* 231d410ae21SMahesh Salgaonkar * Set an SPR from a register if the CPU has the given feature 232d410ae21SMahesh Salgaonkar */ 233d410ae21SMahesh Salgaonkar #define OPT_SET_SPR(ra, spr, ftr) \ 234d410ae21SMahesh Salgaonkar BEGIN_FTR_SECTION_NESTED(943) \ 235d410ae21SMahesh Salgaonkar mtspr spr,ra; \ 236d410ae21SMahesh Salgaonkar END_FTR_SECTION_NESTED(ftr,ftr,943) 237d410ae21SMahesh Salgaonkar 238d410ae21SMahesh Salgaonkar /* 2391707dd16SPaul Mackerras * Save a register to the PACA if the CPU has the given feature 2401707dd16SPaul Mackerras */ 2411707dd16SPaul Mackerras #define OPT_SAVE_REG_TO_PACA(offset, ra, ftr) \ 2421707dd16SPaul Mackerras BEGIN_FTR_SECTION_NESTED(943) \ 2431707dd16SPaul Mackerras std ra,offset(r13); \ 2441707dd16SPaul Mackerras END_FTR_SECTION_NESTED(ftr,ftr,943) 2451707dd16SPaul Mackerras 246544686caSNicholas Piggin #define EXCEPTION_PROLOG_0(area) \ 247544686caSNicholas Piggin GET_PACA(r13); \ 24844e9309fSHaren Myneni std r9,area+EX_R9(r13); /* save r9 */ \ 2491707dd16SPaul Mackerras OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \ 2501707dd16SPaul Mackerras HMT_MEDIUM; \ 25144e9309fSHaren Myneni std r10,area+EX_R10(r13); /* save r10 - r12 */ \ 2521707dd16SPaul Mackerras OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR) 2531707dd16SPaul Mackerras 254f14e953bSMadhavan Srinivasan #define __EXCEPTION_PROLOG_1_PRE(area) \ 2551707dd16SPaul Mackerras OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \ 2561707dd16SPaul Mackerras OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \ 257bc2e6c6aSMichael Neuling SAVE_CTR(r10, area); \ 258f14e953bSMadhavan Srinivasan mfcr r9; 259f14e953bSMadhavan Srinivasan 260f14e953bSMadhavan Srinivasan #define __EXCEPTION_PROLOG_1_POST(area) \ 261b01c8b54SPaul Mackerras std r11,area+EX_R11(r13); \ 262b01c8b54SPaul Mackerras std r12,area+EX_R12(r13); \ 263b01c8b54SPaul Mackerras GET_SCRATCH0(r10); \ 264b01c8b54SPaul Mackerras std r10,area+EX_R13(r13) 265f14e953bSMadhavan Srinivasan 266f14e953bSMadhavan Srinivasan /* 267f14e953bSMadhavan Srinivasan * This version of the EXCEPTION_PROLOG_1 will carry 268f14e953bSMadhavan Srinivasan * addition parameter called "bitmask" to support 269f14e953bSMadhavan Srinivasan * checking of the interrupt maskable level in the SOFTEN_TEST. 270f14e953bSMadhavan Srinivasan * Intended to be used in MASKABLE_EXCPETION_* macros. 271f14e953bSMadhavan Srinivasan */ 272f14e953bSMadhavan Srinivasan #define MASKABLE_EXCEPTION_PROLOG_1(area, extra, vec, bitmask) \ 273f14e953bSMadhavan Srinivasan __EXCEPTION_PROLOG_1_PRE(area); \ 274f14e953bSMadhavan Srinivasan extra(vec, bitmask); \ 275f14e953bSMadhavan Srinivasan __EXCEPTION_PROLOG_1_POST(area); 276f14e953bSMadhavan Srinivasan 277f14e953bSMadhavan Srinivasan /* 278f14e953bSMadhavan Srinivasan * This version of the EXCEPTION_PROLOG_1 is intended 279f14e953bSMadhavan Srinivasan * to be used in STD_EXCEPTION* macros 280f14e953bSMadhavan Srinivasan */ 281f14e953bSMadhavan Srinivasan #define _EXCEPTION_PROLOG_1(area, extra, vec) \ 282f14e953bSMadhavan Srinivasan __EXCEPTION_PROLOG_1_PRE(area); \ 283f14e953bSMadhavan Srinivasan extra(vec); \ 284f14e953bSMadhavan Srinivasan __EXCEPTION_PROLOG_1_POST(area); 285f14e953bSMadhavan Srinivasan 286b01c8b54SPaul Mackerras #define EXCEPTION_PROLOG_1(area, extra, vec) \ 287f14e953bSMadhavan Srinivasan _EXCEPTION_PROLOG_1(area, extra, vec) 2888aa34ab8SBenjamin Herrenschmidt 289a5d4f3adSBenjamin Herrenschmidt #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \ 2908aa34ab8SBenjamin Herrenschmidt ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 291a5d4f3adSBenjamin Herrenschmidt mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 2928aa34ab8SBenjamin Herrenschmidt LOAD_HANDLER(r12,label) \ 293a5d4f3adSBenjamin Herrenschmidt mtspr SPRN_##h##SRR0,r12; \ 294a5d4f3adSBenjamin Herrenschmidt mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 295a5d4f3adSBenjamin Herrenschmidt mtspr SPRN_##h##SRR1,r10; \ 296222f20f1SNicholas Piggin h##RFI_TO_KERNEL; \ 2978aa34ab8SBenjamin Herrenschmidt b . /* prevent speculative execution */ 298a5d4f3adSBenjamin Herrenschmidt #define EXCEPTION_PROLOG_PSERIES_1(label, h) \ 299a5d4f3adSBenjamin Herrenschmidt __EXCEPTION_PROLOG_PSERIES_1(label, h) 3008aa34ab8SBenjamin Herrenschmidt 30183a980f7SNicholas Piggin /* _NORI variant keeps MSR_RI clear */ 30283a980f7SNicholas Piggin #define __EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) \ 30383a980f7SNicholas Piggin ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 30483a980f7SNicholas Piggin xori r10,r10,MSR_RI; /* Clear MSR_RI */ \ 30583a980f7SNicholas Piggin mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 30683a980f7SNicholas Piggin LOAD_HANDLER(r12,label) \ 30783a980f7SNicholas Piggin mtspr SPRN_##h##SRR0,r12; \ 30883a980f7SNicholas Piggin mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 30983a980f7SNicholas Piggin mtspr SPRN_##h##SRR1,r10; \ 310222f20f1SNicholas Piggin h##RFI_TO_KERNEL; \ 31183a980f7SNicholas Piggin b . /* prevent speculative execution */ 31283a980f7SNicholas Piggin 31383a980f7SNicholas Piggin #define EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) \ 31483a980f7SNicholas Piggin __EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) 31583a980f7SNicholas Piggin 316b01c8b54SPaul Mackerras #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \ 3171707dd16SPaul Mackerras EXCEPTION_PROLOG_0(area); \ 318b01c8b54SPaul Mackerras EXCEPTION_PROLOG_1(area, extra, vec); \ 319a5d4f3adSBenjamin Herrenschmidt EXCEPTION_PROLOG_PSERIES_1(label, h); 320c5a8c0c9SBenjamin Herrenschmidt 321da2bc464SMichael Ellerman #define __KVMTEST(h, n) \ 3223c42bf8aSPaul Mackerras lbz r10,HSTATE_IN_GUEST(r13); \ 323b01c8b54SPaul Mackerras cmpwi r10,0; \ 324da2bc464SMichael Ellerman bne do_kvm_##h##n 325b01c8b54SPaul Mackerras 326dd96b2c2SAneesh Kumar K.V #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 327dd96b2c2SAneesh Kumar K.V /* 328dd96b2c2SAneesh Kumar K.V * If hv is possible, interrupts come into to the hv version 329dd96b2c2SAneesh Kumar K.V * of the kvmppc_interrupt code, which then jumps to the PR handler, 330dd96b2c2SAneesh Kumar K.V * kvmppc_interrupt_pr, if the guest is a PR guest. 331dd96b2c2SAneesh Kumar K.V */ 332dd96b2c2SAneesh Kumar K.V #define kvmppc_interrupt kvmppc_interrupt_hv 333dd96b2c2SAneesh Kumar K.V #else 334dd96b2c2SAneesh Kumar K.V #define kvmppc_interrupt kvmppc_interrupt_pr 335dd96b2c2SAneesh Kumar K.V #endif 336dd96b2c2SAneesh Kumar K.V 337b51351e2SNicholas Piggin /* 338b51351e2SNicholas Piggin * Branch to label using its 0xC000 address. This results in instruction 339b51351e2SNicholas Piggin * address suitable for MSR[IR]=0 or 1, which allows relocation to be turned 340b51351e2SNicholas Piggin * on using mtmsr rather than rfid. 341b51351e2SNicholas Piggin * 342b51351e2SNicholas Piggin * This could set the 0xc bits for !RELOCATABLE as an immediate, rather than 343b51351e2SNicholas Piggin * load KBASE for a slight optimisation. 344b51351e2SNicholas Piggin */ 345b51351e2SNicholas Piggin #define BRANCH_TO_C000(reg, label) \ 346b51351e2SNicholas Piggin __LOAD_HANDLER(reg, label); \ 347b51351e2SNicholas Piggin mtctr reg; \ 348b51351e2SNicholas Piggin bctr 349b51351e2SNicholas Piggin 350fb479e44SNicholas Piggin #ifdef CONFIG_RELOCATABLE 351fb479e44SNicholas Piggin #define BRANCH_TO_COMMON(reg, label) \ 352fb479e44SNicholas Piggin __LOAD_HANDLER(reg, label); \ 353fb479e44SNicholas Piggin mtctr reg; \ 354fb479e44SNicholas Piggin bctr 355fb479e44SNicholas Piggin 356be5c5e84SMichael Ellerman #define BRANCH_LINK_TO_FAR(label) \ 357be5c5e84SMichael Ellerman __LOAD_FAR_HANDLER(r12, label); \ 358be5c5e84SMichael Ellerman mtctr r12; \ 3592337d207SNicholas Piggin bctrl 3602337d207SNicholas Piggin 361a97a65d5SNicholas Piggin /* 362a97a65d5SNicholas Piggin * KVM requires __LOAD_FAR_HANDLER. 363a97a65d5SNicholas Piggin * 364a97a65d5SNicholas Piggin * __BRANCH_TO_KVM_EXIT branches are also a special case because they 365a97a65d5SNicholas Piggin * explicitly use r9 then reload it from PACA before branching. Hence 366a97a65d5SNicholas Piggin * the double-underscore. 367a97a65d5SNicholas Piggin */ 368a97a65d5SNicholas Piggin #define __BRANCH_TO_KVM_EXIT(area, label) \ 369a97a65d5SNicholas Piggin mfctr r9; \ 370a97a65d5SNicholas Piggin std r9,HSTATE_SCRATCH1(r13); \ 371a97a65d5SNicholas Piggin __LOAD_FAR_HANDLER(r9, label); \ 372a97a65d5SNicholas Piggin mtctr r9; \ 373a97a65d5SNicholas Piggin ld r9,area+EX_R9(r13); \ 374a97a65d5SNicholas Piggin bctr 375a97a65d5SNicholas Piggin 376fb479e44SNicholas Piggin #else 377fb479e44SNicholas Piggin #define BRANCH_TO_COMMON(reg, label) \ 378fb479e44SNicholas Piggin b label 379fb479e44SNicholas Piggin 380be5c5e84SMichael Ellerman #define BRANCH_LINK_TO_FAR(label) \ 3812337d207SNicholas Piggin bl label 3822337d207SNicholas Piggin 383a97a65d5SNicholas Piggin #define __BRANCH_TO_KVM_EXIT(area, label) \ 384a97a65d5SNicholas Piggin ld r9,area+EX_R9(r13); \ 385a97a65d5SNicholas Piggin b label 386a97a65d5SNicholas Piggin 387fb479e44SNicholas Piggin #endif 388fb479e44SNicholas Piggin 389c4f3b52cSNicholas Piggin /* Do not enable RI */ 390c4f3b52cSNicholas Piggin #define EXCEPTION_PROLOG_PSERIES_NORI(area, label, h, extra, vec) \ 391c4f3b52cSNicholas Piggin EXCEPTION_PROLOG_0(area); \ 392c4f3b52cSNicholas Piggin EXCEPTION_PROLOG_1(area, extra, vec); \ 393c4f3b52cSNicholas Piggin EXCEPTION_PROLOG_PSERIES_1_NORI(label, h); 394c4f3b52cSNicholas Piggin 395a97a65d5SNicholas Piggin 396d3918e7fSNicholas Piggin #define __KVM_HANDLER(area, h, n) \ 3970acb9111SPaul Mackerras BEGIN_FTR_SECTION_NESTED(947) \ 3980acb9111SPaul Mackerras ld r10,area+EX_CFAR(r13); \ 3990acb9111SPaul Mackerras std r10,HSTATE_CFAR(r13); \ 4000acb9111SPaul Mackerras END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947); \ 4014b8473c9SPaul Mackerras BEGIN_FTR_SECTION_NESTED(948) \ 4024b8473c9SPaul Mackerras ld r10,area+EX_PPR(r13); \ 4034b8473c9SPaul Mackerras std r10,HSTATE_PPR(r13); \ 4044b8473c9SPaul Mackerras END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 405b01c8b54SPaul Mackerras ld r10,area+EX_R10(r13); \ 4063c42bf8aSPaul Mackerras std r12,HSTATE_SCRATCH0(r13); \ 407d3918e7fSNicholas Piggin sldi r12,r9,32; \ 408d3918e7fSNicholas Piggin ori r12,r12,(n); \ 409a97a65d5SNicholas Piggin /* This reloads r9 before branching to kvmppc_interrupt */ \ 410a97a65d5SNicholas Piggin __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt) 411b01c8b54SPaul Mackerras 412b01c8b54SPaul Mackerras #define __KVM_HANDLER_SKIP(area, h, n) \ 413b01c8b54SPaul Mackerras cmpwi r10,KVM_GUEST_MODE_SKIP; \ 414b01c8b54SPaul Mackerras beq 89f; \ 4154b8473c9SPaul Mackerras BEGIN_FTR_SECTION_NESTED(948) \ 416d3918e7fSNicholas Piggin ld r10,area+EX_PPR(r13); \ 417d3918e7fSNicholas Piggin std r10,HSTATE_PPR(r13); \ 4184b8473c9SPaul Mackerras END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 419d3918e7fSNicholas Piggin ld r10,area+EX_R10(r13); \ 4203c42bf8aSPaul Mackerras std r12,HSTATE_SCRATCH0(r13); \ 421d3918e7fSNicholas Piggin sldi r12,r9,32; \ 422d3918e7fSNicholas Piggin ori r12,r12,(n); \ 423a97a65d5SNicholas Piggin /* This reloads r9 before branching to kvmppc_interrupt */ \ 424a97a65d5SNicholas Piggin __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt); \ 425b01c8b54SPaul Mackerras 89: mtocrf 0x80,r9; \ 426b01c8b54SPaul Mackerras ld r9,area+EX_R9(r13); \ 427d3918e7fSNicholas Piggin ld r10,area+EX_R10(r13); \ 428b01c8b54SPaul Mackerras b kvmppc_skip_##h##interrupt 429b01c8b54SPaul Mackerras 430b01c8b54SPaul Mackerras #ifdef CONFIG_KVM_BOOK3S_64_HANDLER 431da2bc464SMichael Ellerman #define KVMTEST(h, n) __KVMTEST(h, n) 432b01c8b54SPaul Mackerras #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n) 433b01c8b54SPaul Mackerras #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n) 434b01c8b54SPaul Mackerras 435b01c8b54SPaul Mackerras #else 436da2bc464SMichael Ellerman #define KVMTEST(h, n) 437b01c8b54SPaul Mackerras #define KVM_HANDLER(area, h, n) 438b01c8b54SPaul Mackerras #define KVM_HANDLER_SKIP(area, h, n) 439b01c8b54SPaul Mackerras #endif 440b01c8b54SPaul Mackerras 441b01c8b54SPaul Mackerras #define NOTEST(n) 442b01c8b54SPaul Mackerras 443a4087a4dSNicholas Piggin #define EXCEPTION_PROLOG_COMMON_1() \ 444a4087a4dSNicholas Piggin std r9,_CCR(r1); /* save CR in stackframe */ \ 445a4087a4dSNicholas Piggin std r11,_NIP(r1); /* save SRR0 in stackframe */ \ 446a4087a4dSNicholas Piggin std r12,_MSR(r1); /* save SRR1 in stackframe */ \ 447a4087a4dSNicholas Piggin std r10,0(r1); /* make stack chain pointer */ \ 448a4087a4dSNicholas Piggin std r0,GPR0(r1); /* save r0 in stackframe */ \ 449a4087a4dSNicholas Piggin std r10,GPR1(r1); /* save r1 in stackframe */ \ 450a4087a4dSNicholas Piggin 451a4087a4dSNicholas Piggin 4528aa34ab8SBenjamin Herrenschmidt /* 4538aa34ab8SBenjamin Herrenschmidt * The common exception prolog is used for all except a few exceptions 4548aa34ab8SBenjamin Herrenschmidt * such as a segment miss on a kernel address. We have to be prepared 4558aa34ab8SBenjamin Herrenschmidt * to take another exception from the point where we first touch the 4568aa34ab8SBenjamin Herrenschmidt * kernel stack onwards. 4578aa34ab8SBenjamin Herrenschmidt * 4588aa34ab8SBenjamin Herrenschmidt * On entry r13 points to the paca, r9-r13 are saved in the paca, 4598aa34ab8SBenjamin Herrenschmidt * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and 4608aa34ab8SBenjamin Herrenschmidt * SRR1, and relocation is on. 4618aa34ab8SBenjamin Herrenschmidt */ 4628aa34ab8SBenjamin Herrenschmidt #define EXCEPTION_PROLOG_COMMON(n, area) \ 4638aa34ab8SBenjamin Herrenschmidt andi. r10,r12,MSR_PR; /* See if coming from user */ \ 4648aa34ab8SBenjamin Herrenschmidt mr r10,r1; /* Save r1 */ \ 4658aa34ab8SBenjamin Herrenschmidt subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \ 4668aa34ab8SBenjamin Herrenschmidt beq- 1f; \ 4678aa34ab8SBenjamin Herrenschmidt ld r1,PACAKSAVE(r13); /* kernel stack to use */ \ 46890ff5d68SMichael Neuling 1: cmpdi cr1,r1,-INT_FRAME_SIZE; /* check if r1 is in userspace */ \ 4691977b502SPaul Mackerras blt+ cr1,3f; /* abort if it is */ \ 4701977b502SPaul Mackerras li r1,(n); /* will be reloaded later */ \ 4718aa34ab8SBenjamin Herrenschmidt sth r1,PACA_TRAP_SAVE(r13); \ 4721977b502SPaul Mackerras std r3,area+EX_R3(r13); \ 4731977b502SPaul Mackerras addi r3,r13,area; /* r3 -> where regs are saved*/ \ 474bc2e6c6aSMichael Neuling RESTORE_CTR(r1, area); \ 4758aa34ab8SBenjamin Herrenschmidt b bad_stack; \ 476a4087a4dSNicholas Piggin 3: EXCEPTION_PROLOG_COMMON_1(); \ 4775d75b264SHaren Myneni beq 4f; /* if from kernel mode */ \ 478c223c903SChristophe Leroy ACCOUNT_CPU_USER_ENTRY(r13, r9, r10); \ 47944e9309fSHaren Myneni SAVE_PPR(area, r9, r10); \ 480b14a7253SMahesh Salgaonkar 4: EXCEPTION_PROLOG_COMMON_2(area) \ 481b14a7253SMahesh Salgaonkar EXCEPTION_PROLOG_COMMON_3(n) \ 482b14a7253SMahesh Salgaonkar ACCOUNT_STOLEN_TIME 483b14a7253SMahesh Salgaonkar 484b14a7253SMahesh Salgaonkar /* Save original regs values from save area to stack frame. */ 485b14a7253SMahesh Salgaonkar #define EXCEPTION_PROLOG_COMMON_2(area) \ 4868aa34ab8SBenjamin Herrenschmidt ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \ 4878aa34ab8SBenjamin Herrenschmidt ld r10,area+EX_R10(r13); \ 4888aa34ab8SBenjamin Herrenschmidt std r9,GPR9(r1); \ 4898aa34ab8SBenjamin Herrenschmidt std r10,GPR10(r1); \ 4908aa34ab8SBenjamin Herrenschmidt ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \ 4918aa34ab8SBenjamin Herrenschmidt ld r10,area+EX_R12(r13); \ 4928aa34ab8SBenjamin Herrenschmidt ld r11,area+EX_R13(r13); \ 4938aa34ab8SBenjamin Herrenschmidt std r9,GPR11(r1); \ 4948aa34ab8SBenjamin Herrenschmidt std r10,GPR12(r1); \ 4958aa34ab8SBenjamin Herrenschmidt std r11,GPR13(r1); \ 49648404f2eSPaul Mackerras BEGIN_FTR_SECTION_NESTED(66); \ 49748404f2eSPaul Mackerras ld r10,area+EX_CFAR(r13); \ 49848404f2eSPaul Mackerras std r10,ORIG_GPR3(r1); \ 49948404f2eSPaul Mackerras END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \ 500b14a7253SMahesh Salgaonkar GET_CTR(r10, area); \ 501b14a7253SMahesh Salgaonkar std r10,_CTR(r1); 502b14a7253SMahesh Salgaonkar 503b14a7253SMahesh Salgaonkar #define EXCEPTION_PROLOG_COMMON_3(n) \ 504b14a7253SMahesh Salgaonkar std r2,GPR2(r1); /* save r2 in stackframe */ \ 505b14a7253SMahesh Salgaonkar SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \ 506b14a7253SMahesh Salgaonkar SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \ 507bc2e6c6aSMichael Neuling mflr r9; /* Get LR, later save to stack */ \ 5088aa34ab8SBenjamin Herrenschmidt ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \ 5098aa34ab8SBenjamin Herrenschmidt std r9,_LINK(r1); \ 5104e26bc4aSMadhavan Srinivasan lbz r10,PACAIRQSOFTMASK(r13); \ 5118aa34ab8SBenjamin Herrenschmidt mfspr r11,SPRN_XER; /* save XER in stackframe */ \ 5128aa34ab8SBenjamin Herrenschmidt std r10,SOFTE(r1); \ 5138aa34ab8SBenjamin Herrenschmidt std r11,_XER(r1); \ 5148aa34ab8SBenjamin Herrenschmidt li r9,(n)+1; \ 5158aa34ab8SBenjamin Herrenschmidt std r9,_TRAP(r1); /* set trap number */ \ 5168aa34ab8SBenjamin Herrenschmidt li r10,0; \ 5178aa34ab8SBenjamin Herrenschmidt ld r11,exception_marker@toc(r2); \ 5188aa34ab8SBenjamin Herrenschmidt std r10,RESULT(r1); /* clear regs->result */ \ 519b14a7253SMahesh Salgaonkar std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ 5208aa34ab8SBenjamin Herrenschmidt 5218aa34ab8SBenjamin Herrenschmidt /* 5228aa34ab8SBenjamin Herrenschmidt * Exception vectors. 5238aa34ab8SBenjamin Herrenschmidt */ 5242613265cSMichael Ellerman #define STD_EXCEPTION_PSERIES(vec, label) \ 525673b189aSPaul Mackerras SET_SCRATCH0(r13); /* save r13 */ \ 526da2bc464SMichael Ellerman EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \ 527da2bc464SMichael Ellerman EXC_STD, KVMTEST_PR, vec); \ 5288aa34ab8SBenjamin Herrenschmidt 5291707dd16SPaul Mackerras /* Version of above for when we have to branch out-of-line */ 530da2bc464SMichael Ellerman #define __OOL_EXCEPTION(vec, label, hdlr) \ 531da2bc464SMichael Ellerman SET_SCRATCH0(r13) \ 532da2bc464SMichael Ellerman EXCEPTION_PROLOG_0(PACA_EXGEN) \ 533da2bc464SMichael Ellerman b hdlr; 534da2bc464SMichael Ellerman 5351707dd16SPaul Mackerras #define STD_EXCEPTION_PSERIES_OOL(vec, label) \ 536da2bc464SMichael Ellerman EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \ 537da2bc464SMichael Ellerman EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD) 5381707dd16SPaul Mackerras 539b3e6b5dfSBenjamin Herrenschmidt #define STD_EXCEPTION_HV(loc, vec, label) \ 540673b189aSPaul Mackerras SET_SCRATCH0(r13); /* save r13 */ \ 541da2bc464SMichael Ellerman EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \ 542da2bc464SMichael Ellerman EXC_HV, KVMTEST_HV, vec); 5438aa34ab8SBenjamin Herrenschmidt 5441707dd16SPaul Mackerras #define STD_EXCEPTION_HV_OOL(vec, label) \ 545da2bc464SMichael Ellerman EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \ 546da2bc464SMichael Ellerman EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) 5471707dd16SPaul Mackerras 5484700dfafSMichael Neuling #define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 5494700dfafSMichael Neuling /* No guest interrupts come through here */ \ 5504700dfafSMichael Neuling SET_SCRATCH0(r13); /* save r13 */ \ 551da2bc464SMichael Ellerman EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, EXC_STD, NOTEST, vec); 5524700dfafSMichael Neuling 5531707dd16SPaul Mackerras #define STD_RELON_EXCEPTION_PSERIES_OOL(vec, label) \ 554c9f69518SMichael Ellerman EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \ 555da2bc464SMichael Ellerman EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_STD) 5561707dd16SPaul Mackerras 5574700dfafSMichael Neuling #define STD_RELON_EXCEPTION_HV(loc, vec, label) \ 5584700dfafSMichael Neuling SET_SCRATCH0(r13); /* save r13 */ \ 559bc355125SPaul Mackerras EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, \ 560bc355125SPaul Mackerras EXC_HV, KVMTEST_HV, vec); 5614700dfafSMichael Neuling 5621707dd16SPaul Mackerras #define STD_RELON_EXCEPTION_HV_OOL(vec, label) \ 563bc355125SPaul Mackerras EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \ 564da2bc464SMichael Ellerman EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV) 5651707dd16SPaul Mackerras 5667230c564SBenjamin Herrenschmidt /* This associate vector numbers with bits in paca->irq_happened */ 5677230c564SBenjamin Herrenschmidt #define SOFTEN_VALUE_0x500 PACA_IRQ_EE 5687230c564SBenjamin Herrenschmidt #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC 569da2bc464SMichael Ellerman #define SOFTEN_VALUE_0x980 PACA_IRQ_DEC 5701dbdafecSIan Munsie #define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL 571655bb3f4SIan Munsie #define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL 5720869b6fdSMahesh Salgaonkar #define SOFTEN_VALUE_0xe60 PACA_IRQ_HMI 5739baaef0aSBenjamin Herrenschmidt #define SOFTEN_VALUE_0xea0 PACA_IRQ_EE 574f442d004SMadhavan Srinivasan #define SOFTEN_VALUE_0xf00 PACA_IRQ_PMI 5757230c564SBenjamin Herrenschmidt 576f14e953bSMadhavan Srinivasan #define __SOFTEN_TEST(h, vec, bitmask) \ 5774e26bc4aSMadhavan Srinivasan lbz r10,PACAIRQSOFTMASK(r13); \ 578f14e953bSMadhavan Srinivasan andi. r10,r10,bitmask; \ 5797230c564SBenjamin Herrenschmidt li r10,SOFTEN_VALUE_##vec; \ 58001417c6cSMadhavan Srinivasan bne masked_##h##interrupt 581da2bc464SMichael Ellerman 582f14e953bSMadhavan Srinivasan #define _SOFTEN_TEST(h, vec, bitmask) __SOFTEN_TEST(h, vec, bitmask) 583b01c8b54SPaul Mackerras 584f14e953bSMadhavan Srinivasan #define SOFTEN_TEST_PR(vec, bitmask) \ 585da2bc464SMichael Ellerman KVMTEST(EXC_STD, vec); \ 586f14e953bSMadhavan Srinivasan _SOFTEN_TEST(EXC_STD, vec, bitmask) 587b01c8b54SPaul Mackerras 588f14e953bSMadhavan Srinivasan #define SOFTEN_TEST_HV(vec, bitmask) \ 589da2bc464SMichael Ellerman KVMTEST(EXC_HV, vec); \ 590f14e953bSMadhavan Srinivasan _SOFTEN_TEST(EXC_HV, vec, bitmask) 591b01c8b54SPaul Mackerras 592da2bc464SMichael Ellerman #define KVMTEST_PR(vec) \ 593da2bc464SMichael Ellerman KVMTEST(EXC_STD, vec) 594da2bc464SMichael Ellerman 595da2bc464SMichael Ellerman #define KVMTEST_HV(vec) \ 596da2bc464SMichael Ellerman KVMTEST(EXC_HV, vec) 597da2bc464SMichael Ellerman 598f14e953bSMadhavan Srinivasan #define SOFTEN_NOTEST_PR(vec, bitmask) _SOFTEN_TEST(EXC_STD, vec, bitmask) 599f14e953bSMadhavan Srinivasan #define SOFTEN_NOTEST_HV(vec, bitmask) _SOFTEN_TEST(EXC_HV, vec, bitmask) 6004700dfafSMichael Neuling 601f14e953bSMadhavan Srinivasan #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra, bitmask) \ 602b01c8b54SPaul Mackerras SET_SCRATCH0(r13); /* save r13 */ \ 6031707dd16SPaul Mackerras EXCEPTION_PROLOG_0(PACA_EXGEN); \ 604f14e953bSMadhavan Srinivasan MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec, bitmask); \ 605da2bc464SMichael Ellerman EXCEPTION_PROLOG_PSERIES_1(label, h); 6061707dd16SPaul Mackerras 607f14e953bSMadhavan Srinivasan #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra, bitmask) \ 608f14e953bSMadhavan Srinivasan __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra, bitmask) 609b3e6b5dfSBenjamin Herrenschmidt 610f14e953bSMadhavan Srinivasan #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label, bitmask) \ 611b01c8b54SPaul Mackerras _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 612f14e953bSMadhavan Srinivasan EXC_STD, SOFTEN_TEST_PR, bitmask) 613b3e6b5dfSBenjamin Herrenschmidt 614f14e953bSMadhavan Srinivasan #define MASKABLE_EXCEPTION_PSERIES_OOL(vec, label, bitmask) \ 615f14e953bSMadhavan Srinivasan MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, vec, bitmask);\ 616da2bc464SMichael Ellerman EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD) 617da2bc464SMichael Ellerman 618f14e953bSMadhavan Srinivasan #define MASKABLE_EXCEPTION_HV(loc, vec, label, bitmask) \ 619b01c8b54SPaul Mackerras _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 620f14e953bSMadhavan Srinivasan EXC_HV, SOFTEN_TEST_HV, bitmask) 6218aa34ab8SBenjamin Herrenschmidt 622f14e953bSMadhavan Srinivasan #define MASKABLE_EXCEPTION_HV_OOL(vec, label, bitmask) \ 623f14e953bSMadhavan Srinivasan MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec, bitmask);\ 624da2bc464SMichael Ellerman EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) 6251707dd16SPaul Mackerras 626f14e953bSMadhavan Srinivasan #define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra, bitmask) \ 6274700dfafSMichael Neuling SET_SCRATCH0(r13); /* save r13 */ \ 6281707dd16SPaul Mackerras EXCEPTION_PROLOG_0(PACA_EXGEN); \ 629f14e953bSMadhavan Srinivasan MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec, bitmask); \ 630da2bc464SMichael Ellerman EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 631da2bc464SMichael Ellerman 632f14e953bSMadhavan Srinivasan #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra, bitmask)\ 633f14e953bSMadhavan Srinivasan __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra, bitmask) 6344700dfafSMichael Neuling 635f14e953bSMadhavan Srinivasan #define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label, bitmask) \ 6364700dfafSMichael Neuling _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 637f14e953bSMadhavan Srinivasan EXC_STD, SOFTEN_NOTEST_PR, bitmask) 6384700dfafSMichael Neuling 639f442d004SMadhavan Srinivasan #define MASKABLE_RELON_EXCEPTION_PSERIES_OOL(vec, label, bitmask) \ 640f442d004SMadhavan Srinivasan MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_NOTEST_PR, vec, bitmask);\ 641f442d004SMadhavan Srinivasan EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD); 642f442d004SMadhavan Srinivasan 643f14e953bSMadhavan Srinivasan #define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label, bitmask) \ 6444700dfafSMichael Neuling _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 645f14e953bSMadhavan Srinivasan EXC_HV, SOFTEN_TEST_HV, bitmask) 6464700dfafSMichael Neuling 647f14e953bSMadhavan Srinivasan #define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label, bitmask) \ 6485c11d1e5SMadhavan Srinivasan MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec, bitmask);\ 649a050d20dSNicholas Piggin EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV) 6501707dd16SPaul Mackerras 6511b701179SBenjamin Herrenschmidt /* 6521b701179SBenjamin Herrenschmidt * Our exception common code can be passed various "additions" 6531b701179SBenjamin Herrenschmidt * to specify the behaviour of interrupts, whether to kick the 6541b701179SBenjamin Herrenschmidt * runlatch, etc... 6551b701179SBenjamin Herrenschmidt */ 6561b701179SBenjamin Herrenschmidt 6579daf112bSMichael Ellerman /* 6589daf112bSMichael Ellerman * This addition reconciles our actual IRQ state with the various software 6599daf112bSMichael Ellerman * flags that track it. This may call C code. 6609daf112bSMichael Ellerman */ 6619daf112bSMichael Ellerman #define ADD_RECONCILE RECONCILE_IRQ_STATE(r10,r11) 6628aa34ab8SBenjamin Herrenschmidt 663fe1952fcSBenjamin Herrenschmidt #define ADD_NVGPRS \ 664b1576fecSAnton Blanchard bl save_nvgprs 665fe1952fcSBenjamin Herrenschmidt 666fe1952fcSBenjamin Herrenschmidt #define RUNLATCH_ON \ 667fe1952fcSBenjamin Herrenschmidt BEGIN_FTR_SECTION \ 6689778b696SStuart Yoder CURRENT_THREAD_INFO(r3, r1); \ 669fe1952fcSBenjamin Herrenschmidt ld r4,TI_LOCAL_FLAGS(r3); \ 670fe1952fcSBenjamin Herrenschmidt andi. r0,r4,_TLF_RUNLATCH; \ 671fe1952fcSBenjamin Herrenschmidt beql ppc64_runlatch_on_trampoline; \ 672fe1952fcSBenjamin Herrenschmidt END_FTR_SECTION_IFSET(CPU_FTR_CTRL) 673fe1952fcSBenjamin Herrenschmidt 674a3d96f70SNicholas Piggin #define EXCEPTION_COMMON(area, trap, label, hdlr, ret, additions) \ 675a3d96f70SNicholas Piggin EXCEPTION_PROLOG_COMMON(trap, area); \ 676a1d711c5SMichael Ellerman /* Volatile regs are potentially clobbered here */ \ 677fe1952fcSBenjamin Herrenschmidt additions; \ 6788aa34ab8SBenjamin Herrenschmidt addi r3,r1,STACK_FRAME_OVERHEAD; \ 6798aa34ab8SBenjamin Herrenschmidt bl hdlr; \ 680fe1952fcSBenjamin Herrenschmidt b ret 681fe1952fcSBenjamin Herrenschmidt 682b1ee8a3dSNicholas Piggin /* 683b1ee8a3dSNicholas Piggin * Exception where stack is already set in r1, r1 is saved in r10, and it 684b1ee8a3dSNicholas Piggin * continues rather than returns. 685b1ee8a3dSNicholas Piggin */ 686b1ee8a3dSNicholas Piggin #define EXCEPTION_COMMON_NORET_STACK(area, trap, label, hdlr, additions) \ 687b1ee8a3dSNicholas Piggin EXCEPTION_PROLOG_COMMON_1(); \ 688b1ee8a3dSNicholas Piggin EXCEPTION_PROLOG_COMMON_2(area); \ 689b1ee8a3dSNicholas Piggin EXCEPTION_PROLOG_COMMON_3(trap); \ 690b1ee8a3dSNicholas Piggin /* Volatile regs are potentially clobbered here */ \ 691b1ee8a3dSNicholas Piggin additions; \ 692b1ee8a3dSNicholas Piggin addi r3,r1,STACK_FRAME_OVERHEAD; \ 693b1ee8a3dSNicholas Piggin bl hdlr 694b1ee8a3dSNicholas Piggin 695fe1952fcSBenjamin Herrenschmidt #define STD_EXCEPTION_COMMON(trap, label, hdlr) \ 696a3d96f70SNicholas Piggin EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr, \ 697a3d96f70SNicholas Piggin ret_from_except, ADD_NVGPRS;ADD_RECONCILE) 6988aa34ab8SBenjamin Herrenschmidt 6998aa34ab8SBenjamin Herrenschmidt /* 7008aa34ab8SBenjamin Herrenschmidt * Like STD_EXCEPTION_COMMON, but for exceptions that can occur 7017450f6f0SBenjamin Herrenschmidt * in the idle task and therefore need the special idle handling 7027450f6f0SBenjamin Herrenschmidt * (finish nap and runlatch) 7038aa34ab8SBenjamin Herrenschmidt */ 7047450f6f0SBenjamin Herrenschmidt #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \ 705a3d96f70SNicholas Piggin EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr, \ 706a3d96f70SNicholas Piggin ret_from_except_lite, FINISH_NAP;ADD_RECONCILE;RUNLATCH_ON) 7078aa34ab8SBenjamin Herrenschmidt 7088aa34ab8SBenjamin Herrenschmidt /* 7098aa34ab8SBenjamin Herrenschmidt * When the idle code in power4_idle puts the CPU into NAP mode, 7108aa34ab8SBenjamin Herrenschmidt * it has to do so in a loop, and relies on the external interrupt 7118aa34ab8SBenjamin Herrenschmidt * and decrementer interrupt entry code to get it out of the loop. 7128aa34ab8SBenjamin Herrenschmidt * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags 7138aa34ab8SBenjamin Herrenschmidt * to signal that it is in the loop and needs help to get out. 7148aa34ab8SBenjamin Herrenschmidt */ 7158aa34ab8SBenjamin Herrenschmidt #ifdef CONFIG_PPC_970_NAP 7168aa34ab8SBenjamin Herrenschmidt #define FINISH_NAP \ 7178aa34ab8SBenjamin Herrenschmidt BEGIN_FTR_SECTION \ 7189778b696SStuart Yoder CURRENT_THREAD_INFO(r11, r1); \ 7198aa34ab8SBenjamin Herrenschmidt ld r9,TI_LOCAL_FLAGS(r11); \ 7208aa34ab8SBenjamin Herrenschmidt andi. r10,r9,_TLF_NAPPING; \ 7218aa34ab8SBenjamin Herrenschmidt bnel power4_fixup_nap; \ 7228aa34ab8SBenjamin Herrenschmidt END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) 7238aa34ab8SBenjamin Herrenschmidt #else 7248aa34ab8SBenjamin Herrenschmidt #define FINISH_NAP 7258aa34ab8SBenjamin Herrenschmidt #endif 7268aa34ab8SBenjamin Herrenschmidt 7278aa34ab8SBenjamin Herrenschmidt #endif /* _ASM_POWERPC_EXCEPTION_H */ 728