18aa34ab8SBenjamin Herrenschmidt #ifndef _ASM_POWERPC_EXCEPTION_H 28aa34ab8SBenjamin Herrenschmidt #define _ASM_POWERPC_EXCEPTION_H 38aa34ab8SBenjamin Herrenschmidt /* 48aa34ab8SBenjamin Herrenschmidt * Extracted from head_64.S 58aa34ab8SBenjamin Herrenschmidt * 68aa34ab8SBenjamin Herrenschmidt * PowerPC version 78aa34ab8SBenjamin Herrenschmidt * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 88aa34ab8SBenjamin Herrenschmidt * 98aa34ab8SBenjamin Herrenschmidt * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP 108aa34ab8SBenjamin Herrenschmidt * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> 118aa34ab8SBenjamin Herrenschmidt * Adapted for Power Macintosh by Paul Mackerras. 128aa34ab8SBenjamin Herrenschmidt * Low-level exception handlers and MMU support 138aa34ab8SBenjamin Herrenschmidt * rewritten by Paul Mackerras. 148aa34ab8SBenjamin Herrenschmidt * Copyright (C) 1996 Paul Mackerras. 158aa34ab8SBenjamin Herrenschmidt * 168aa34ab8SBenjamin Herrenschmidt * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and 178aa34ab8SBenjamin Herrenschmidt * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com 188aa34ab8SBenjamin Herrenschmidt * 198aa34ab8SBenjamin Herrenschmidt * This file contains the low-level support and setup for the 208aa34ab8SBenjamin Herrenschmidt * PowerPC-64 platform, including trap and interrupt dispatch. 218aa34ab8SBenjamin Herrenschmidt * 228aa34ab8SBenjamin Herrenschmidt * This program is free software; you can redistribute it and/or 238aa34ab8SBenjamin Herrenschmidt * modify it under the terms of the GNU General Public License 248aa34ab8SBenjamin Herrenschmidt * as published by the Free Software Foundation; either version 258aa34ab8SBenjamin Herrenschmidt * 2 of the License, or (at your option) any later version. 268aa34ab8SBenjamin Herrenschmidt */ 278aa34ab8SBenjamin Herrenschmidt /* 288aa34ab8SBenjamin Herrenschmidt * The following macros define the code that appears as 298aa34ab8SBenjamin Herrenschmidt * the prologue to each of the exception handlers. They 308aa34ab8SBenjamin Herrenschmidt * are split into two parts to allow a single kernel binary 318aa34ab8SBenjamin Herrenschmidt * to be used for pSeries and iSeries. 328aa34ab8SBenjamin Herrenschmidt * 338aa34ab8SBenjamin Herrenschmidt * We make as much of the exception code common between native 348aa34ab8SBenjamin Herrenschmidt * exception handlers (including pSeries LPAR) and iSeries LPAR 358aa34ab8SBenjamin Herrenschmidt * implementations as possible. 368aa34ab8SBenjamin Herrenschmidt */ 37da2bc464SMichael Ellerman #include <asm/head-64.h> 382c86cd18SChristophe Leroy #include <asm/feature-fixups.h> 398aa34ab8SBenjamin Herrenschmidt 408c388514SNicholas Piggin /* PACA save area offsets (exgen, exmc, etc) */ 418aa34ab8SBenjamin Herrenschmidt #define EX_R9 0 428aa34ab8SBenjamin Herrenschmidt #define EX_R10 8 438aa34ab8SBenjamin Herrenschmidt #define EX_R11 16 448aa34ab8SBenjamin Herrenschmidt #define EX_R12 24 458aa34ab8SBenjamin Herrenschmidt #define EX_R13 32 4636670fcfSNicholas Piggin #define EX_DAR 40 4736670fcfSNicholas Piggin #define EX_DSISR 48 4836670fcfSNicholas Piggin #define EX_CCR 52 49635942aeSNicholas Piggin #define EX_CFAR 56 50635942aeSNicholas Piggin #define EX_PPR 64 518568f1e0SNicholas Piggin #if defined(CONFIG_RELOCATABLE) 52635942aeSNicholas Piggin #define EX_CTR 72 53635942aeSNicholas Piggin #define EX_SIZE 10 /* size in u64 units */ 548568f1e0SNicholas Piggin #else 558568f1e0SNicholas Piggin #define EX_SIZE 9 /* size in u64 units */ 568568f1e0SNicholas Piggin #endif 57dbeea1d6SNicholas Piggin 58dbeea1d6SNicholas Piggin /* 59ba41e1e1SBalbir Singh * maximum recursive depth of MCE exceptions 60ba41e1e1SBalbir Singh */ 61ba41e1e1SBalbir Singh #define MAX_MCE_DEPTH 4 62ba41e1e1SBalbir Singh 63ba41e1e1SBalbir Singh /* 6454be0b9cSMichael Ellerman * EX_LR is only used in EXSLB and where it does not overlap with EX_DAR 6554be0b9cSMichael Ellerman * EX_CCR similarly with DSISR, but being 4 byte registers there is a hole 6654be0b9cSMichael Ellerman * in the save area so it's not necessary to overlap them. Could be used 6754be0b9cSMichael Ellerman * for future savings though if another 4 byte register was to be saved. 6854be0b9cSMichael Ellerman */ 6954be0b9cSMichael Ellerman #define EX_LR EX_DAR 7054be0b9cSMichael Ellerman 7154be0b9cSMichael Ellerman /* 72635942aeSNicholas Piggin * EX_R3 is only used by the bad_stack handler. bad_stack reloads and 73635942aeSNicholas Piggin * saves DAR from SPRN_DAR, and EX_DAR is not used. So EX_R3 can overlap 74635942aeSNicholas Piggin * with EX_DAR. 75635942aeSNicholas Piggin */ 76635942aeSNicholas Piggin #define EX_R3 EX_DAR 77635942aeSNicholas Piggin 78a048a07dSNicholas Piggin #define STF_ENTRY_BARRIER_SLOT \ 79a048a07dSNicholas Piggin STF_ENTRY_BARRIER_FIXUP_SECTION; \ 80a048a07dSNicholas Piggin nop; \ 81a048a07dSNicholas Piggin nop; \ 82a048a07dSNicholas Piggin nop 83a048a07dSNicholas Piggin 84a048a07dSNicholas Piggin #define STF_EXIT_BARRIER_SLOT \ 85a048a07dSNicholas Piggin STF_EXIT_BARRIER_FIXUP_SECTION; \ 86a048a07dSNicholas Piggin nop; \ 87a048a07dSNicholas Piggin nop; \ 88a048a07dSNicholas Piggin nop; \ 89a048a07dSNicholas Piggin nop; \ 90a048a07dSNicholas Piggin nop; \ 91a048a07dSNicholas Piggin nop 92a048a07dSNicholas Piggin 93a048a07dSNicholas Piggin /* 94a048a07dSNicholas Piggin * r10 must be free to use, r13 must be paca 95a048a07dSNicholas Piggin */ 96a048a07dSNicholas Piggin #define INTERRUPT_TO_KERNEL \ 97a048a07dSNicholas Piggin STF_ENTRY_BARRIER_SLOT 98a048a07dSNicholas Piggin 99aa8a5e00SMichael Ellerman /* 100aa8a5e00SMichael Ellerman * Macros for annotating the expected destination of (h)rfid 101aa8a5e00SMichael Ellerman * 102aa8a5e00SMichael Ellerman * The nop instructions allow us to insert one or more instructions to flush the 103aa8a5e00SMichael Ellerman * L1-D cache when returning to userspace or a guest. 104aa8a5e00SMichael Ellerman */ 105aa8a5e00SMichael Ellerman #define RFI_FLUSH_SLOT \ 106aa8a5e00SMichael Ellerman RFI_FLUSH_FIXUP_SECTION; \ 107aa8a5e00SMichael Ellerman nop; \ 108aa8a5e00SMichael Ellerman nop; \ 109aa8a5e00SMichael Ellerman nop 11050e51c13SNicholas Piggin 11150e51c13SNicholas Piggin #define RFI_TO_KERNEL \ 11250e51c13SNicholas Piggin rfid 11350e51c13SNicholas Piggin 11450e51c13SNicholas Piggin #define RFI_TO_USER \ 115a048a07dSNicholas Piggin STF_EXIT_BARRIER_SLOT; \ 116aa8a5e00SMichael Ellerman RFI_FLUSH_SLOT; \ 117aa8a5e00SMichael Ellerman rfid; \ 118aa8a5e00SMichael Ellerman b rfi_flush_fallback 11950e51c13SNicholas Piggin 12050e51c13SNicholas Piggin #define RFI_TO_USER_OR_KERNEL \ 121a048a07dSNicholas Piggin STF_EXIT_BARRIER_SLOT; \ 122aa8a5e00SMichael Ellerman RFI_FLUSH_SLOT; \ 123aa8a5e00SMichael Ellerman rfid; \ 124aa8a5e00SMichael Ellerman b rfi_flush_fallback 12550e51c13SNicholas Piggin 12650e51c13SNicholas Piggin #define RFI_TO_GUEST \ 127a048a07dSNicholas Piggin STF_EXIT_BARRIER_SLOT; \ 128aa8a5e00SMichael Ellerman RFI_FLUSH_SLOT; \ 129aa8a5e00SMichael Ellerman rfid; \ 130aa8a5e00SMichael Ellerman b rfi_flush_fallback 13150e51c13SNicholas Piggin 13250e51c13SNicholas Piggin #define HRFI_TO_KERNEL \ 13350e51c13SNicholas Piggin hrfid 13450e51c13SNicholas Piggin 13550e51c13SNicholas Piggin #define HRFI_TO_USER \ 136a048a07dSNicholas Piggin STF_EXIT_BARRIER_SLOT; \ 137aa8a5e00SMichael Ellerman RFI_FLUSH_SLOT; \ 138aa8a5e00SMichael Ellerman hrfid; \ 139aa8a5e00SMichael Ellerman b hrfi_flush_fallback 14050e51c13SNicholas Piggin 14150e51c13SNicholas Piggin #define HRFI_TO_USER_OR_KERNEL \ 142a048a07dSNicholas Piggin STF_EXIT_BARRIER_SLOT; \ 143aa8a5e00SMichael Ellerman RFI_FLUSH_SLOT; \ 144aa8a5e00SMichael Ellerman hrfid; \ 145aa8a5e00SMichael Ellerman b hrfi_flush_fallback 14650e51c13SNicholas Piggin 14750e51c13SNicholas Piggin #define HRFI_TO_GUEST \ 148a048a07dSNicholas Piggin STF_EXIT_BARRIER_SLOT; \ 149aa8a5e00SMichael Ellerman RFI_FLUSH_SLOT; \ 150aa8a5e00SMichael Ellerman hrfid; \ 151aa8a5e00SMichael Ellerman b hrfi_flush_fallback 15250e51c13SNicholas Piggin 15350e51c13SNicholas Piggin #define HRFI_TO_UNKNOWN \ 154a048a07dSNicholas Piggin STF_EXIT_BARRIER_SLOT; \ 155aa8a5e00SMichael Ellerman RFI_FLUSH_SLOT; \ 156aa8a5e00SMichael Ellerman hrfid; \ 157aa8a5e00SMichael Ellerman b hrfi_flush_fallback 15850e51c13SNicholas Piggin 1594700dfafSMichael Neuling #ifdef CONFIG_RELOCATABLE 1606ebb9397SMichael Ellerman #define __EXCEPTION_PROLOG_2_RELON(label, h) \ 1614700dfafSMichael Neuling mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 1624700dfafSMichael Neuling LOAD_HANDLER(r12,label); \ 163bc2e6c6aSMichael Neuling mtctr r12; \ 1644700dfafSMichael Neuling mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 1654700dfafSMichael Neuling li r10,MSR_RI; \ 1664700dfafSMichael Neuling mtmsrd r10,1; /* Set RI (EE=0) */ \ 167bc2e6c6aSMichael Neuling bctr; 1684700dfafSMichael Neuling #else 1694700dfafSMichael Neuling /* If not relocatable, we can jump directly -- and save messing with LR */ 1706ebb9397SMichael Ellerman #define __EXCEPTION_PROLOG_2_RELON(label, h) \ 1714700dfafSMichael Neuling mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 1724700dfafSMichael Neuling mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 1734700dfafSMichael Neuling li r10,MSR_RI; \ 1744700dfafSMichael Neuling mtmsrd r10,1; /* Set RI (EE=0) */ \ 1754700dfafSMichael Neuling b label; 1764700dfafSMichael Neuling #endif 1776ebb9397SMichael Ellerman #define EXCEPTION_PROLOG_2_RELON(label, h) \ 1786ebb9397SMichael Ellerman __EXCEPTION_PROLOG_2_RELON(label, h) 1794700dfafSMichael Neuling 1804700dfafSMichael Neuling /* 181bdf08e1dSMichael Ellerman * As EXCEPTION_PROLOG(), except we've already got relocation on so no need to 182bdf08e1dSMichael Ellerman * rfid. Save LR in case we're CONFIG_RELOCATABLE, in which case 183bdf08e1dSMichael Ellerman * EXCEPTION_PROLOG_2_RELON will be using LR. 1844700dfafSMichael Neuling */ 185270373f1SMichael Ellerman #define EXCEPTION_RELON_PROLOG(area, label, h, extra, vec) \ 18692b6d65cSMichael Ellerman SET_SCRATCH0(r13); /* save r13 */ \ 1871707dd16SPaul Mackerras EXCEPTION_PROLOG_0(area); \ 1884700dfafSMichael Neuling EXCEPTION_PROLOG_1(area, extra, vec); \ 1896ebb9397SMichael Ellerman EXCEPTION_PROLOG_2_RELON(label, h) 1904700dfafSMichael Neuling 1918aa34ab8SBenjamin Herrenschmidt /* 1928aa34ab8SBenjamin Herrenschmidt * We're short on space and time in the exception prolog, so we can't 19327510235SMichael Ellerman * use the normal LOAD_REG_IMMEDIATE macro to load the address of label. 19427510235SMichael Ellerman * Instead we get the base of the kernel from paca->kernelbase and or in the low 19527510235SMichael Ellerman * part of label. This requires that the label be within 64KB of kernelbase, and 19627510235SMichael Ellerman * that kernelbase be 64K aligned. 1978aa34ab8SBenjamin Herrenschmidt */ 1988aa34ab8SBenjamin Herrenschmidt #define LOAD_HANDLER(reg, label) \ 199d8d42b05SMichael Ellerman ld reg,PACAKBASE(r13); /* get high part of &label */ \ 200e6740ae6SHugh Dickins ori reg,reg,FIXED_SYMBOL_ABS_ADDR(label); 2018aa34ab8SBenjamin Herrenschmidt 202fb479e44SNicholas Piggin #define __LOAD_HANDLER(reg, label) \ 203fb479e44SNicholas Piggin ld reg,PACAKBASE(r13); \ 204fb479e44SNicholas Piggin ori reg,reg,(ABS_ADDR(label))@l; 205fb479e44SNicholas Piggin 206a97a65d5SNicholas Piggin /* 207a97a65d5SNicholas Piggin * Branches from unrelocated code (e.g., interrupts) to labels outside 208a97a65d5SNicholas Piggin * head-y require >64K offsets. 209a97a65d5SNicholas Piggin */ 210a97a65d5SNicholas Piggin #define __LOAD_FAR_HANDLER(reg, label) \ 211a97a65d5SNicholas Piggin ld reg,PACAKBASE(r13); \ 212a97a65d5SNicholas Piggin ori reg,reg,(ABS_ADDR(label))@l; \ 213a97a65d5SNicholas Piggin addis reg,reg,(ABS_ADDR(label))@h; 214a97a65d5SNicholas Piggin 215a5d4f3adSBenjamin Herrenschmidt /* Exception register prefixes */ 216a5d4f3adSBenjamin Herrenschmidt #define EXC_HV H 217a5d4f3adSBenjamin Herrenschmidt #define EXC_STD 218a5d4f3adSBenjamin Herrenschmidt 2194700dfafSMichael Neuling #if defined(CONFIG_RELOCATABLE) 2204700dfafSMichael Neuling /* 221bc2e6c6aSMichael Neuling * If we support interrupts with relocation on AND we're a relocatable kernel, 222bc2e6c6aSMichael Neuling * we need to use CTR to get to the 2nd level handler. So, save/restore it 223bc2e6c6aSMichael Neuling * when required. 2244700dfafSMichael Neuling */ 225bc2e6c6aSMichael Neuling #define SAVE_CTR(reg, area) mfctr reg ; std reg,area+EX_CTR(r13) 226bc2e6c6aSMichael Neuling #define GET_CTR(reg, area) ld reg,area+EX_CTR(r13) 227bc2e6c6aSMichael Neuling #define RESTORE_CTR(reg, area) ld reg,area+EX_CTR(r13) ; mtctr reg 2284700dfafSMichael Neuling #else 229bc2e6c6aSMichael Neuling /* ...else CTR is unused and in register. */ 230bc2e6c6aSMichael Neuling #define SAVE_CTR(reg, area) 231bc2e6c6aSMichael Neuling #define GET_CTR(reg, area) mfctr reg 232bc2e6c6aSMichael Neuling #define RESTORE_CTR(reg, area) 2334700dfafSMichael Neuling #endif 2344700dfafSMichael Neuling 23513e7a8e8SHaren Myneni /* 23613e7a8e8SHaren Myneni * PPR save/restore macros used in exceptions_64s.S 23713e7a8e8SHaren Myneni * Used for P7 or later processors 23813e7a8e8SHaren Myneni */ 2394c2de74cSNicholas Piggin #define SAVE_PPR(area, ra) \ 24013e7a8e8SHaren Myneni BEGIN_FTR_SECTION_NESTED(940) \ 2414c2de74cSNicholas Piggin ld ra,area+EX_PPR(r13); /* Read PPR from paca */ \ 2424c2de74cSNicholas Piggin std ra,_PPR(r1); \ 24313e7a8e8SHaren Myneni END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940) 24413e7a8e8SHaren Myneni 24513e7a8e8SHaren Myneni #define RESTORE_PPR_PACA(area, ra) \ 24613e7a8e8SHaren Myneni BEGIN_FTR_SECTION_NESTED(941) \ 24713e7a8e8SHaren Myneni ld ra,area+EX_PPR(r13); \ 24813e7a8e8SHaren Myneni mtspr SPRN_PPR,ra; \ 24913e7a8e8SHaren Myneni END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941) 25013e7a8e8SHaren Myneni 25113e7a8e8SHaren Myneni /* 2521707dd16SPaul Mackerras * Get an SPR into a register if the CPU has the given feature 25313e7a8e8SHaren Myneni */ 2541707dd16SPaul Mackerras #define OPT_GET_SPR(ra, spr, ftr) \ 25513e7a8e8SHaren Myneni BEGIN_FTR_SECTION_NESTED(943) \ 2561707dd16SPaul Mackerras mfspr ra,spr; \ 2571707dd16SPaul Mackerras END_FTR_SECTION_NESTED(ftr,ftr,943) 25813e7a8e8SHaren Myneni 2591707dd16SPaul Mackerras /* 260d410ae21SMahesh Salgaonkar * Set an SPR from a register if the CPU has the given feature 261d410ae21SMahesh Salgaonkar */ 262d410ae21SMahesh Salgaonkar #define OPT_SET_SPR(ra, spr, ftr) \ 263d410ae21SMahesh Salgaonkar BEGIN_FTR_SECTION_NESTED(943) \ 264d410ae21SMahesh Salgaonkar mtspr spr,ra; \ 265d410ae21SMahesh Salgaonkar END_FTR_SECTION_NESTED(ftr,ftr,943) 266d410ae21SMahesh Salgaonkar 267d410ae21SMahesh Salgaonkar /* 2681707dd16SPaul Mackerras * Save a register to the PACA if the CPU has the given feature 2691707dd16SPaul Mackerras */ 2701707dd16SPaul Mackerras #define OPT_SAVE_REG_TO_PACA(offset, ra, ftr) \ 2711707dd16SPaul Mackerras BEGIN_FTR_SECTION_NESTED(943) \ 2721707dd16SPaul Mackerras std ra,offset(r13); \ 2731707dd16SPaul Mackerras END_FTR_SECTION_NESTED(ftr,ftr,943) 2741707dd16SPaul Mackerras 275544686caSNicholas Piggin #define EXCEPTION_PROLOG_0(area) \ 276544686caSNicholas Piggin GET_PACA(r13); \ 27744e9309fSHaren Myneni std r9,area+EX_R9(r13); /* save r9 */ \ 2781707dd16SPaul Mackerras OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \ 2791707dd16SPaul Mackerras HMT_MEDIUM; \ 28044e9309fSHaren Myneni std r10,area+EX_R10(r13); /* save r10 - r12 */ \ 2811707dd16SPaul Mackerras OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR) 2821707dd16SPaul Mackerras 283f14e953bSMadhavan Srinivasan #define __EXCEPTION_PROLOG_1_PRE(area) \ 2841707dd16SPaul Mackerras OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \ 2851707dd16SPaul Mackerras OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \ 286a048a07dSNicholas Piggin INTERRUPT_TO_KERNEL; \ 287bc2e6c6aSMichael Neuling SAVE_CTR(r10, area); \ 288f14e953bSMadhavan Srinivasan mfcr r9; 289f14e953bSMadhavan Srinivasan 290f14e953bSMadhavan Srinivasan #define __EXCEPTION_PROLOG_1_POST(area) \ 291b01c8b54SPaul Mackerras std r11,area+EX_R11(r13); \ 292b01c8b54SPaul Mackerras std r12,area+EX_R12(r13); \ 293b01c8b54SPaul Mackerras GET_SCRATCH0(r10); \ 294b01c8b54SPaul Mackerras std r10,area+EX_R13(r13) 295f14e953bSMadhavan Srinivasan 296f14e953bSMadhavan Srinivasan /* 297f14e953bSMadhavan Srinivasan * This version of the EXCEPTION_PROLOG_1 will carry 298f14e953bSMadhavan Srinivasan * addition parameter called "bitmask" to support 299f14e953bSMadhavan Srinivasan * checking of the interrupt maskable level in the SOFTEN_TEST. 300f14e953bSMadhavan Srinivasan * Intended to be used in MASKABLE_EXCPETION_* macros. 301f14e953bSMadhavan Srinivasan */ 302f14e953bSMadhavan Srinivasan #define MASKABLE_EXCEPTION_PROLOG_1(area, extra, vec, bitmask) \ 303f14e953bSMadhavan Srinivasan __EXCEPTION_PROLOG_1_PRE(area); \ 304f14e953bSMadhavan Srinivasan extra(vec, bitmask); \ 305f14e953bSMadhavan Srinivasan __EXCEPTION_PROLOG_1_POST(area); 306f14e953bSMadhavan Srinivasan 307f14e953bSMadhavan Srinivasan /* 308f14e953bSMadhavan Srinivasan * This version of the EXCEPTION_PROLOG_1 is intended 309f14e953bSMadhavan Srinivasan * to be used in STD_EXCEPTION* macros 310f14e953bSMadhavan Srinivasan */ 311f14e953bSMadhavan Srinivasan #define _EXCEPTION_PROLOG_1(area, extra, vec) \ 312f14e953bSMadhavan Srinivasan __EXCEPTION_PROLOG_1_PRE(area); \ 313f14e953bSMadhavan Srinivasan extra(vec); \ 314f14e953bSMadhavan Srinivasan __EXCEPTION_PROLOG_1_POST(area); 315f14e953bSMadhavan Srinivasan 316b01c8b54SPaul Mackerras #define EXCEPTION_PROLOG_1(area, extra, vec) \ 317f14e953bSMadhavan Srinivasan _EXCEPTION_PROLOG_1(area, extra, vec) 3188aa34ab8SBenjamin Herrenschmidt 319cb58a4a4SMichael Ellerman #define __EXCEPTION_PROLOG_2(label, h) \ 3208aa34ab8SBenjamin Herrenschmidt ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 321a5d4f3adSBenjamin Herrenschmidt mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 3228aa34ab8SBenjamin Herrenschmidt LOAD_HANDLER(r12,label) \ 323a5d4f3adSBenjamin Herrenschmidt mtspr SPRN_##h##SRR0,r12; \ 324a5d4f3adSBenjamin Herrenschmidt mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 325a5d4f3adSBenjamin Herrenschmidt mtspr SPRN_##h##SRR1,r10; \ 326222f20f1SNicholas Piggin h##RFI_TO_KERNEL; \ 3278aa34ab8SBenjamin Herrenschmidt b . /* prevent speculative execution */ 328cb58a4a4SMichael Ellerman #define EXCEPTION_PROLOG_2(label, h) \ 329cb58a4a4SMichael Ellerman __EXCEPTION_PROLOG_2(label, h) 3308aa34ab8SBenjamin Herrenschmidt 33183a980f7SNicholas Piggin /* _NORI variant keeps MSR_RI clear */ 33294f3cc8eSMichael Ellerman #define __EXCEPTION_PROLOG_2_NORI(label, h) \ 33383a980f7SNicholas Piggin ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 33483a980f7SNicholas Piggin xori r10,r10,MSR_RI; /* Clear MSR_RI */ \ 33583a980f7SNicholas Piggin mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 33683a980f7SNicholas Piggin LOAD_HANDLER(r12,label) \ 33783a980f7SNicholas Piggin mtspr SPRN_##h##SRR0,r12; \ 33883a980f7SNicholas Piggin mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 33983a980f7SNicholas Piggin mtspr SPRN_##h##SRR1,r10; \ 340222f20f1SNicholas Piggin h##RFI_TO_KERNEL; \ 34183a980f7SNicholas Piggin b . /* prevent speculative execution */ 34283a980f7SNicholas Piggin 34394f3cc8eSMichael Ellerman #define EXCEPTION_PROLOG_2_NORI(label, h) \ 34494f3cc8eSMichael Ellerman __EXCEPTION_PROLOG_2_NORI(label, h) 34583a980f7SNicholas Piggin 346bdf08e1dSMichael Ellerman #define EXCEPTION_PROLOG(area, label, h, extra, vec) \ 3474a7a0a84SMichael Ellerman SET_SCRATCH0(r13); /* save r13 */ \ 3481707dd16SPaul Mackerras EXCEPTION_PROLOG_0(area); \ 349b01c8b54SPaul Mackerras EXCEPTION_PROLOG_1(area, extra, vec); \ 350cb58a4a4SMichael Ellerman EXCEPTION_PROLOG_2(label, h); 351c5a8c0c9SBenjamin Herrenschmidt 352da2bc464SMichael Ellerman #define __KVMTEST(h, n) \ 3533c42bf8aSPaul Mackerras lbz r10,HSTATE_IN_GUEST(r13); \ 354b01c8b54SPaul Mackerras cmpwi r10,0; \ 355da2bc464SMichael Ellerman bne do_kvm_##h##n 356b01c8b54SPaul Mackerras 357dd96b2c2SAneesh Kumar K.V #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 358dd96b2c2SAneesh Kumar K.V /* 359dd96b2c2SAneesh Kumar K.V * If hv is possible, interrupts come into to the hv version 360dd96b2c2SAneesh Kumar K.V * of the kvmppc_interrupt code, which then jumps to the PR handler, 361dd96b2c2SAneesh Kumar K.V * kvmppc_interrupt_pr, if the guest is a PR guest. 362dd96b2c2SAneesh Kumar K.V */ 363dd96b2c2SAneesh Kumar K.V #define kvmppc_interrupt kvmppc_interrupt_hv 364dd96b2c2SAneesh Kumar K.V #else 365dd96b2c2SAneesh Kumar K.V #define kvmppc_interrupt kvmppc_interrupt_pr 366dd96b2c2SAneesh Kumar K.V #endif 367dd96b2c2SAneesh Kumar K.V 368b51351e2SNicholas Piggin /* 369b51351e2SNicholas Piggin * Branch to label using its 0xC000 address. This results in instruction 370b51351e2SNicholas Piggin * address suitable for MSR[IR]=0 or 1, which allows relocation to be turned 371b51351e2SNicholas Piggin * on using mtmsr rather than rfid. 372b51351e2SNicholas Piggin * 373b51351e2SNicholas Piggin * This could set the 0xc bits for !RELOCATABLE as an immediate, rather than 374b51351e2SNicholas Piggin * load KBASE for a slight optimisation. 375b51351e2SNicholas Piggin */ 376b51351e2SNicholas Piggin #define BRANCH_TO_C000(reg, label) \ 377b51351e2SNicholas Piggin __LOAD_HANDLER(reg, label); \ 378b51351e2SNicholas Piggin mtctr reg; \ 379b51351e2SNicholas Piggin bctr 380b51351e2SNicholas Piggin 381fb479e44SNicholas Piggin #ifdef CONFIG_RELOCATABLE 382fb479e44SNicholas Piggin #define BRANCH_TO_COMMON(reg, label) \ 383fb479e44SNicholas Piggin __LOAD_HANDLER(reg, label); \ 384fb479e44SNicholas Piggin mtctr reg; \ 385fb479e44SNicholas Piggin bctr 386fb479e44SNicholas Piggin 387be5c5e84SMichael Ellerman #define BRANCH_LINK_TO_FAR(label) \ 388be5c5e84SMichael Ellerman __LOAD_FAR_HANDLER(r12, label); \ 389be5c5e84SMichael Ellerman mtctr r12; \ 3902337d207SNicholas Piggin bctrl 3912337d207SNicholas Piggin 392a97a65d5SNicholas Piggin /* 393a97a65d5SNicholas Piggin * KVM requires __LOAD_FAR_HANDLER. 394a97a65d5SNicholas Piggin * 395a97a65d5SNicholas Piggin * __BRANCH_TO_KVM_EXIT branches are also a special case because they 396a97a65d5SNicholas Piggin * explicitly use r9 then reload it from PACA before branching. Hence 397a97a65d5SNicholas Piggin * the double-underscore. 398a97a65d5SNicholas Piggin */ 399a97a65d5SNicholas Piggin #define __BRANCH_TO_KVM_EXIT(area, label) \ 400a97a65d5SNicholas Piggin mfctr r9; \ 401a97a65d5SNicholas Piggin std r9,HSTATE_SCRATCH1(r13); \ 402a97a65d5SNicholas Piggin __LOAD_FAR_HANDLER(r9, label); \ 403a97a65d5SNicholas Piggin mtctr r9; \ 404a97a65d5SNicholas Piggin ld r9,area+EX_R9(r13); \ 405a97a65d5SNicholas Piggin bctr 406a97a65d5SNicholas Piggin 407fb479e44SNicholas Piggin #else 408fb479e44SNicholas Piggin #define BRANCH_TO_COMMON(reg, label) \ 409fb479e44SNicholas Piggin b label 410fb479e44SNicholas Piggin 411be5c5e84SMichael Ellerman #define BRANCH_LINK_TO_FAR(label) \ 4122337d207SNicholas Piggin bl label 4132337d207SNicholas Piggin 414a97a65d5SNicholas Piggin #define __BRANCH_TO_KVM_EXIT(area, label) \ 415a97a65d5SNicholas Piggin ld r9,area+EX_R9(r13); \ 416a97a65d5SNicholas Piggin b label 417a97a65d5SNicholas Piggin 418fb479e44SNicholas Piggin #endif 419fb479e44SNicholas Piggin 420c4f3b52cSNicholas Piggin /* Do not enable RI */ 42194f3cc8eSMichael Ellerman #define EXCEPTION_PROLOG_NORI(area, label, h, extra, vec) \ 422c4f3b52cSNicholas Piggin EXCEPTION_PROLOG_0(area); \ 423c4f3b52cSNicholas Piggin EXCEPTION_PROLOG_1(area, extra, vec); \ 42494f3cc8eSMichael Ellerman EXCEPTION_PROLOG_2_NORI(label, h); 425c4f3b52cSNicholas Piggin 426a97a65d5SNicholas Piggin 427d3918e7fSNicholas Piggin #define __KVM_HANDLER(area, h, n) \ 4280acb9111SPaul Mackerras BEGIN_FTR_SECTION_NESTED(947) \ 4290acb9111SPaul Mackerras ld r10,area+EX_CFAR(r13); \ 4300acb9111SPaul Mackerras std r10,HSTATE_CFAR(r13); \ 4310acb9111SPaul Mackerras END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947); \ 4324b8473c9SPaul Mackerras BEGIN_FTR_SECTION_NESTED(948) \ 4334b8473c9SPaul Mackerras ld r10,area+EX_PPR(r13); \ 4344b8473c9SPaul Mackerras std r10,HSTATE_PPR(r13); \ 4354b8473c9SPaul Mackerras END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 436b01c8b54SPaul Mackerras ld r10,area+EX_R10(r13); \ 4373c42bf8aSPaul Mackerras std r12,HSTATE_SCRATCH0(r13); \ 438d3918e7fSNicholas Piggin sldi r12,r9,32; \ 439d3918e7fSNicholas Piggin ori r12,r12,(n); \ 440a97a65d5SNicholas Piggin /* This reloads r9 before branching to kvmppc_interrupt */ \ 441a97a65d5SNicholas Piggin __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt) 442b01c8b54SPaul Mackerras 443b01c8b54SPaul Mackerras #define __KVM_HANDLER_SKIP(area, h, n) \ 444b01c8b54SPaul Mackerras cmpwi r10,KVM_GUEST_MODE_SKIP; \ 445b01c8b54SPaul Mackerras beq 89f; \ 4464b8473c9SPaul Mackerras BEGIN_FTR_SECTION_NESTED(948) \ 447d3918e7fSNicholas Piggin ld r10,area+EX_PPR(r13); \ 448d3918e7fSNicholas Piggin std r10,HSTATE_PPR(r13); \ 4494b8473c9SPaul Mackerras END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 450d3918e7fSNicholas Piggin ld r10,area+EX_R10(r13); \ 4513c42bf8aSPaul Mackerras std r12,HSTATE_SCRATCH0(r13); \ 452d3918e7fSNicholas Piggin sldi r12,r9,32; \ 453d3918e7fSNicholas Piggin ori r12,r12,(n); \ 454a97a65d5SNicholas Piggin /* This reloads r9 before branching to kvmppc_interrupt */ \ 455a97a65d5SNicholas Piggin __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt); \ 456b01c8b54SPaul Mackerras 89: mtocrf 0x80,r9; \ 457b01c8b54SPaul Mackerras ld r9,area+EX_R9(r13); \ 458d3918e7fSNicholas Piggin ld r10,area+EX_R10(r13); \ 459b01c8b54SPaul Mackerras b kvmppc_skip_##h##interrupt 460b01c8b54SPaul Mackerras 461b01c8b54SPaul Mackerras #ifdef CONFIG_KVM_BOOK3S_64_HANDLER 462da2bc464SMichael Ellerman #define KVMTEST(h, n) __KVMTEST(h, n) 463b01c8b54SPaul Mackerras #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n) 464b01c8b54SPaul Mackerras #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n) 465b01c8b54SPaul Mackerras 466b01c8b54SPaul Mackerras #else 467da2bc464SMichael Ellerman #define KVMTEST(h, n) 468b01c8b54SPaul Mackerras #define KVM_HANDLER(area, h, n) 469b01c8b54SPaul Mackerras #define KVM_HANDLER_SKIP(area, h, n) 470b01c8b54SPaul Mackerras #endif 471b01c8b54SPaul Mackerras 472b01c8b54SPaul Mackerras #define NOTEST(n) 473b01c8b54SPaul Mackerras 474a4087a4dSNicholas Piggin #define EXCEPTION_PROLOG_COMMON_1() \ 475a4087a4dSNicholas Piggin std r9,_CCR(r1); /* save CR in stackframe */ \ 476a4087a4dSNicholas Piggin std r11,_NIP(r1); /* save SRR0 in stackframe */ \ 477a4087a4dSNicholas Piggin std r12,_MSR(r1); /* save SRR1 in stackframe */ \ 478a4087a4dSNicholas Piggin std r10,0(r1); /* make stack chain pointer */ \ 479a4087a4dSNicholas Piggin std r0,GPR0(r1); /* save r0 in stackframe */ \ 480a4087a4dSNicholas Piggin std r10,GPR1(r1); /* save r1 in stackframe */ \ 481a4087a4dSNicholas Piggin 482a4087a4dSNicholas Piggin 4838aa34ab8SBenjamin Herrenschmidt /* 4848aa34ab8SBenjamin Herrenschmidt * The common exception prolog is used for all except a few exceptions 4858aa34ab8SBenjamin Herrenschmidt * such as a segment miss on a kernel address. We have to be prepared 4868aa34ab8SBenjamin Herrenschmidt * to take another exception from the point where we first touch the 4878aa34ab8SBenjamin Herrenschmidt * kernel stack onwards. 4888aa34ab8SBenjamin Herrenschmidt * 4898aa34ab8SBenjamin Herrenschmidt * On entry r13 points to the paca, r9-r13 are saved in the paca, 4908aa34ab8SBenjamin Herrenschmidt * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and 4918aa34ab8SBenjamin Herrenschmidt * SRR1, and relocation is on. 4928aa34ab8SBenjamin Herrenschmidt */ 4938aa34ab8SBenjamin Herrenschmidt #define EXCEPTION_PROLOG_COMMON(n, area) \ 4948aa34ab8SBenjamin Herrenschmidt andi. r10,r12,MSR_PR; /* See if coming from user */ \ 4958aa34ab8SBenjamin Herrenschmidt mr r10,r1; /* Save r1 */ \ 4968aa34ab8SBenjamin Herrenschmidt subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \ 4978aa34ab8SBenjamin Herrenschmidt beq- 1f; \ 4988aa34ab8SBenjamin Herrenschmidt ld r1,PACAKSAVE(r13); /* kernel stack to use */ \ 49990ff5d68SMichael Neuling 1: cmpdi cr1,r1,-INT_FRAME_SIZE; /* check if r1 is in userspace */ \ 5001977b502SPaul Mackerras blt+ cr1,3f; /* abort if it is */ \ 5011977b502SPaul Mackerras li r1,(n); /* will be reloaded later */ \ 5028aa34ab8SBenjamin Herrenschmidt sth r1,PACA_TRAP_SAVE(r13); \ 5031977b502SPaul Mackerras std r3,area+EX_R3(r13); \ 5041977b502SPaul Mackerras addi r3,r13,area; /* r3 -> where regs are saved*/ \ 505bc2e6c6aSMichael Neuling RESTORE_CTR(r1, area); \ 5068aa34ab8SBenjamin Herrenschmidt b bad_stack; \ 507a4087a4dSNicholas Piggin 3: EXCEPTION_PROLOG_COMMON_1(); \ 5085d75b264SHaren Myneni beq 4f; /* if from kernel mode */ \ 509c223c903SChristophe Leroy ACCOUNT_CPU_USER_ENTRY(r13, r9, r10); \ 5104c2de74cSNicholas Piggin SAVE_PPR(area, r9); \ 511b14a7253SMahesh Salgaonkar 4: EXCEPTION_PROLOG_COMMON_2(area) \ 512b14a7253SMahesh Salgaonkar EXCEPTION_PROLOG_COMMON_3(n) \ 513b14a7253SMahesh Salgaonkar ACCOUNT_STOLEN_TIME 514b14a7253SMahesh Salgaonkar 515b14a7253SMahesh Salgaonkar /* Save original regs values from save area to stack frame. */ 516b14a7253SMahesh Salgaonkar #define EXCEPTION_PROLOG_COMMON_2(area) \ 5178aa34ab8SBenjamin Herrenschmidt ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \ 5188aa34ab8SBenjamin Herrenschmidt ld r10,area+EX_R10(r13); \ 5198aa34ab8SBenjamin Herrenschmidt std r9,GPR9(r1); \ 5208aa34ab8SBenjamin Herrenschmidt std r10,GPR10(r1); \ 5218aa34ab8SBenjamin Herrenschmidt ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \ 5228aa34ab8SBenjamin Herrenschmidt ld r10,area+EX_R12(r13); \ 5238aa34ab8SBenjamin Herrenschmidt ld r11,area+EX_R13(r13); \ 5248aa34ab8SBenjamin Herrenschmidt std r9,GPR11(r1); \ 5258aa34ab8SBenjamin Herrenschmidt std r10,GPR12(r1); \ 5268aa34ab8SBenjamin Herrenschmidt std r11,GPR13(r1); \ 52748404f2eSPaul Mackerras BEGIN_FTR_SECTION_NESTED(66); \ 52848404f2eSPaul Mackerras ld r10,area+EX_CFAR(r13); \ 52948404f2eSPaul Mackerras std r10,ORIG_GPR3(r1); \ 53048404f2eSPaul Mackerras END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \ 531b14a7253SMahesh Salgaonkar GET_CTR(r10, area); \ 532b14a7253SMahesh Salgaonkar std r10,_CTR(r1); 533b14a7253SMahesh Salgaonkar 534b14a7253SMahesh Salgaonkar #define EXCEPTION_PROLOG_COMMON_3(n) \ 535b14a7253SMahesh Salgaonkar std r2,GPR2(r1); /* save r2 in stackframe */ \ 536b14a7253SMahesh Salgaonkar SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \ 537b14a7253SMahesh Salgaonkar SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \ 538bc2e6c6aSMichael Neuling mflr r9; /* Get LR, later save to stack */ \ 5398aa34ab8SBenjamin Herrenschmidt ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \ 5408aa34ab8SBenjamin Herrenschmidt std r9,_LINK(r1); \ 5414e26bc4aSMadhavan Srinivasan lbz r10,PACAIRQSOFTMASK(r13); \ 5428aa34ab8SBenjamin Herrenschmidt mfspr r11,SPRN_XER; /* save XER in stackframe */ \ 5438aa34ab8SBenjamin Herrenschmidt std r10,SOFTE(r1); \ 5448aa34ab8SBenjamin Herrenschmidt std r11,_XER(r1); \ 5458aa34ab8SBenjamin Herrenschmidt li r9,(n)+1; \ 5468aa34ab8SBenjamin Herrenschmidt std r9,_TRAP(r1); /* set trap number */ \ 5478aa34ab8SBenjamin Herrenschmidt li r10,0; \ 5488aa34ab8SBenjamin Herrenschmidt ld r11,exception_marker@toc(r2); \ 5498aa34ab8SBenjamin Herrenschmidt std r10,RESULT(r1); /* clear regs->result */ \ 550b14a7253SMahesh Salgaonkar std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ 5518aa34ab8SBenjamin Herrenschmidt 5528aa34ab8SBenjamin Herrenschmidt /* 5538aa34ab8SBenjamin Herrenschmidt * Exception vectors. 5548aa34ab8SBenjamin Herrenschmidt */ 555e899fce5SMichael Ellerman #define STD_EXCEPTION(vec, label) \ 556bdf08e1dSMichael Ellerman EXCEPTION_PROLOG(PACA_EXGEN, label, EXC_STD, KVMTEST_PR, vec); 5578aa34ab8SBenjamin Herrenschmidt 5581707dd16SPaul Mackerras /* Version of above for when we have to branch out-of-line */ 559da2bc464SMichael Ellerman #define __OOL_EXCEPTION(vec, label, hdlr) \ 560da2bc464SMichael Ellerman SET_SCRATCH0(r13) \ 561da2bc464SMichael Ellerman EXCEPTION_PROLOG_0(PACA_EXGEN) \ 562da2bc464SMichael Ellerman b hdlr; 563da2bc464SMichael Ellerman 56475e8bef3SMichael Ellerman #define STD_EXCEPTION_OOL(vec, label) \ 565da2bc464SMichael Ellerman EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \ 566cb58a4a4SMichael Ellerman EXCEPTION_PROLOG_2(label, EXC_STD) 5671707dd16SPaul Mackerras 568b3e6b5dfSBenjamin Herrenschmidt #define STD_EXCEPTION_HV(loc, vec, label) \ 569bdf08e1dSMichael Ellerman EXCEPTION_PROLOG(PACA_EXGEN, label, EXC_HV, KVMTEST_HV, vec); 5708aa34ab8SBenjamin Herrenschmidt 5711707dd16SPaul Mackerras #define STD_EXCEPTION_HV_OOL(vec, label) \ 572da2bc464SMichael Ellerman EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \ 573cb58a4a4SMichael Ellerman EXCEPTION_PROLOG_2(label, EXC_HV) 5741707dd16SPaul Mackerras 575e42389c5SMichael Ellerman #define STD_RELON_EXCEPTION(loc, vec, label) \ 5764700dfafSMichael Neuling /* No guest interrupts come through here */ \ 577270373f1SMichael Ellerman EXCEPTION_RELON_PROLOG(PACA_EXGEN, label, EXC_STD, NOTEST, vec); 5784700dfafSMichael Neuling 579b706f423SMichael Ellerman #define STD_RELON_EXCEPTION_OOL(vec, label) \ 580c9f69518SMichael Ellerman EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \ 5816ebb9397SMichael Ellerman EXCEPTION_PROLOG_2_RELON(label, EXC_STD) 5821707dd16SPaul Mackerras 5834700dfafSMichael Neuling #define STD_RELON_EXCEPTION_HV(loc, vec, label) \ 584270373f1SMichael Ellerman EXCEPTION_RELON_PROLOG(PACA_EXGEN, label, EXC_HV, KVMTEST_HV, vec); 5854700dfafSMichael Neuling 5861707dd16SPaul Mackerras #define STD_RELON_EXCEPTION_HV_OOL(vec, label) \ 587bc355125SPaul Mackerras EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \ 5886ebb9397SMichael Ellerman EXCEPTION_PROLOG_2_RELON(label, EXC_HV) 5891707dd16SPaul Mackerras 5907230c564SBenjamin Herrenschmidt /* This associate vector numbers with bits in paca->irq_happened */ 5917230c564SBenjamin Herrenschmidt #define SOFTEN_VALUE_0x500 PACA_IRQ_EE 5927230c564SBenjamin Herrenschmidt #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC 593da2bc464SMichael Ellerman #define SOFTEN_VALUE_0x980 PACA_IRQ_DEC 5941dbdafecSIan Munsie #define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL 595655bb3f4SIan Munsie #define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL 5960869b6fdSMahesh Salgaonkar #define SOFTEN_VALUE_0xe60 PACA_IRQ_HMI 5979baaef0aSBenjamin Herrenschmidt #define SOFTEN_VALUE_0xea0 PACA_IRQ_EE 598f442d004SMadhavan Srinivasan #define SOFTEN_VALUE_0xf00 PACA_IRQ_PMI 5997230c564SBenjamin Herrenschmidt 600f14e953bSMadhavan Srinivasan #define __SOFTEN_TEST(h, vec, bitmask) \ 6014e26bc4aSMadhavan Srinivasan lbz r10,PACAIRQSOFTMASK(r13); \ 602f14e953bSMadhavan Srinivasan andi. r10,r10,bitmask; \ 6037230c564SBenjamin Herrenschmidt li r10,SOFTEN_VALUE_##vec; \ 60401417c6cSMadhavan Srinivasan bne masked_##h##interrupt 605da2bc464SMichael Ellerman 606f14e953bSMadhavan Srinivasan #define _SOFTEN_TEST(h, vec, bitmask) __SOFTEN_TEST(h, vec, bitmask) 607b01c8b54SPaul Mackerras 608f14e953bSMadhavan Srinivasan #define SOFTEN_TEST_PR(vec, bitmask) \ 609da2bc464SMichael Ellerman KVMTEST(EXC_STD, vec); \ 610f14e953bSMadhavan Srinivasan _SOFTEN_TEST(EXC_STD, vec, bitmask) 611b01c8b54SPaul Mackerras 612f14e953bSMadhavan Srinivasan #define SOFTEN_TEST_HV(vec, bitmask) \ 613da2bc464SMichael Ellerman KVMTEST(EXC_HV, vec); \ 614f14e953bSMadhavan Srinivasan _SOFTEN_TEST(EXC_HV, vec, bitmask) 615b01c8b54SPaul Mackerras 616da2bc464SMichael Ellerman #define KVMTEST_PR(vec) \ 617da2bc464SMichael Ellerman KVMTEST(EXC_STD, vec) 618da2bc464SMichael Ellerman 619da2bc464SMichael Ellerman #define KVMTEST_HV(vec) \ 620da2bc464SMichael Ellerman KVMTEST(EXC_HV, vec) 621da2bc464SMichael Ellerman 622f14e953bSMadhavan Srinivasan #define SOFTEN_NOTEST_PR(vec, bitmask) _SOFTEN_TEST(EXC_STD, vec, bitmask) 623f14e953bSMadhavan Srinivasan #define SOFTEN_NOTEST_HV(vec, bitmask) _SOFTEN_TEST(EXC_HV, vec, bitmask) 6244700dfafSMichael Neuling 6250a55c241SMichael Ellerman #define __MASKABLE_EXCEPTION(vec, label, h, extra, bitmask) \ 626b01c8b54SPaul Mackerras SET_SCRATCH0(r13); /* save r13 */ \ 6271707dd16SPaul Mackerras EXCEPTION_PROLOG_0(PACA_EXGEN); \ 628f14e953bSMadhavan Srinivasan MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec, bitmask); \ 629cb58a4a4SMichael Ellerman EXCEPTION_PROLOG_2(label, h); 6301707dd16SPaul Mackerras 631b536da7cSMichael Ellerman #define MASKABLE_EXCEPTION(vec, label, bitmask) \ 6320a55c241SMichael Ellerman __MASKABLE_EXCEPTION(vec, label, EXC_STD, SOFTEN_TEST_PR, bitmask) 633b3e6b5dfSBenjamin Herrenschmidt 6340a55c241SMichael Ellerman #define MASKABLE_EXCEPTION_OOL(vec, label, bitmask) \ 635f14e953bSMadhavan Srinivasan MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, vec, bitmask);\ 636cb58a4a4SMichael Ellerman EXCEPTION_PROLOG_2(label, EXC_STD) 637da2bc464SMichael Ellerman 638b536da7cSMichael Ellerman #define MASKABLE_EXCEPTION_HV(vec, label, bitmask) \ 6390a55c241SMichael Ellerman __MASKABLE_EXCEPTION(vec, label, EXC_HV, SOFTEN_TEST_HV, bitmask) 6408aa34ab8SBenjamin Herrenschmidt 641f14e953bSMadhavan Srinivasan #define MASKABLE_EXCEPTION_HV_OOL(vec, label, bitmask) \ 642f14e953bSMadhavan Srinivasan MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec, bitmask);\ 643cb58a4a4SMichael Ellerman EXCEPTION_PROLOG_2(label, EXC_HV) 6441707dd16SPaul Mackerras 6450a55c241SMichael Ellerman #define __MASKABLE_RELON_EXCEPTION(vec, label, h, extra, bitmask) \ 6464700dfafSMichael Neuling SET_SCRATCH0(r13); /* save r13 */ \ 6471707dd16SPaul Mackerras EXCEPTION_PROLOG_0(PACA_EXGEN); \ 648f14e953bSMadhavan Srinivasan MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec, bitmask); \ 6496ebb9397SMichael Ellerman EXCEPTION_PROLOG_2_RELON(label, h) 650da2bc464SMichael Ellerman 651b536da7cSMichael Ellerman #define MASKABLE_RELON_EXCEPTION(vec, label, bitmask) \ 6520a55c241SMichael Ellerman __MASKABLE_RELON_EXCEPTION(vec, label, EXC_STD, SOFTEN_NOTEST_PR, bitmask) 6534700dfafSMichael Neuling 6540a55c241SMichael Ellerman #define MASKABLE_RELON_EXCEPTION_OOL(vec, label, bitmask) \ 655f442d004SMadhavan Srinivasan MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_NOTEST_PR, vec, bitmask);\ 656cb58a4a4SMichael Ellerman EXCEPTION_PROLOG_2(label, EXC_STD); 657f442d004SMadhavan Srinivasan 658b536da7cSMichael Ellerman #define MASKABLE_RELON_EXCEPTION_HV(vec, label, bitmask) \ 6590a55c241SMichael Ellerman __MASKABLE_RELON_EXCEPTION(vec, label, EXC_HV, SOFTEN_TEST_HV, bitmask) 6604700dfafSMichael Neuling 661f14e953bSMadhavan Srinivasan #define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label, bitmask) \ 6625c11d1e5SMadhavan Srinivasan MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec, bitmask);\ 6636ebb9397SMichael Ellerman EXCEPTION_PROLOG_2_RELON(label, EXC_HV) 6641707dd16SPaul Mackerras 6651b701179SBenjamin Herrenschmidt /* 6661b701179SBenjamin Herrenschmidt * Our exception common code can be passed various "additions" 6671b701179SBenjamin Herrenschmidt * to specify the behaviour of interrupts, whether to kick the 6681b701179SBenjamin Herrenschmidt * runlatch, etc... 6691b701179SBenjamin Herrenschmidt */ 6701b701179SBenjamin Herrenschmidt 6719daf112bSMichael Ellerman /* 6729daf112bSMichael Ellerman * This addition reconciles our actual IRQ state with the various software 6739daf112bSMichael Ellerman * flags that track it. This may call C code. 6749daf112bSMichael Ellerman */ 6759daf112bSMichael Ellerman #define ADD_RECONCILE RECONCILE_IRQ_STATE(r10,r11) 6768aa34ab8SBenjamin Herrenschmidt 677fe1952fcSBenjamin Herrenschmidt #define ADD_NVGPRS \ 678b1576fecSAnton Blanchard bl save_nvgprs 679fe1952fcSBenjamin Herrenschmidt 680fe1952fcSBenjamin Herrenschmidt #define RUNLATCH_ON \ 681fe1952fcSBenjamin Herrenschmidt BEGIN_FTR_SECTION \ 6829778b696SStuart Yoder CURRENT_THREAD_INFO(r3, r1); \ 683fe1952fcSBenjamin Herrenschmidt ld r4,TI_LOCAL_FLAGS(r3); \ 684fe1952fcSBenjamin Herrenschmidt andi. r0,r4,_TLF_RUNLATCH; \ 685fe1952fcSBenjamin Herrenschmidt beql ppc64_runlatch_on_trampoline; \ 686fe1952fcSBenjamin Herrenschmidt END_FTR_SECTION_IFSET(CPU_FTR_CTRL) 687fe1952fcSBenjamin Herrenschmidt 688a3d96f70SNicholas Piggin #define EXCEPTION_COMMON(area, trap, label, hdlr, ret, additions) \ 689a3d96f70SNicholas Piggin EXCEPTION_PROLOG_COMMON(trap, area); \ 690a1d711c5SMichael Ellerman /* Volatile regs are potentially clobbered here */ \ 691fe1952fcSBenjamin Herrenschmidt additions; \ 6928aa34ab8SBenjamin Herrenschmidt addi r3,r1,STACK_FRAME_OVERHEAD; \ 6938aa34ab8SBenjamin Herrenschmidt bl hdlr; \ 694fe1952fcSBenjamin Herrenschmidt b ret 695fe1952fcSBenjamin Herrenschmidt 696b1ee8a3dSNicholas Piggin /* 697b1ee8a3dSNicholas Piggin * Exception where stack is already set in r1, r1 is saved in r10, and it 698b1ee8a3dSNicholas Piggin * continues rather than returns. 699b1ee8a3dSNicholas Piggin */ 700b1ee8a3dSNicholas Piggin #define EXCEPTION_COMMON_NORET_STACK(area, trap, label, hdlr, additions) \ 701b1ee8a3dSNicholas Piggin EXCEPTION_PROLOG_COMMON_1(); \ 702b1ee8a3dSNicholas Piggin EXCEPTION_PROLOG_COMMON_2(area); \ 703b1ee8a3dSNicholas Piggin EXCEPTION_PROLOG_COMMON_3(trap); \ 704b1ee8a3dSNicholas Piggin /* Volatile regs are potentially clobbered here */ \ 705b1ee8a3dSNicholas Piggin additions; \ 706b1ee8a3dSNicholas Piggin addi r3,r1,STACK_FRAME_OVERHEAD; \ 707b1ee8a3dSNicholas Piggin bl hdlr 708b1ee8a3dSNicholas Piggin 709fe1952fcSBenjamin Herrenschmidt #define STD_EXCEPTION_COMMON(trap, label, hdlr) \ 710a3d96f70SNicholas Piggin EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr, \ 711a3d96f70SNicholas Piggin ret_from_except, ADD_NVGPRS;ADD_RECONCILE) 7128aa34ab8SBenjamin Herrenschmidt 7138aa34ab8SBenjamin Herrenschmidt /* 7148aa34ab8SBenjamin Herrenschmidt * Like STD_EXCEPTION_COMMON, but for exceptions that can occur 7157450f6f0SBenjamin Herrenschmidt * in the idle task and therefore need the special idle handling 7167450f6f0SBenjamin Herrenschmidt * (finish nap and runlatch) 7178aa34ab8SBenjamin Herrenschmidt */ 7187450f6f0SBenjamin Herrenschmidt #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \ 719a3d96f70SNicholas Piggin EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr, \ 720a3d96f70SNicholas Piggin ret_from_except_lite, FINISH_NAP;ADD_RECONCILE;RUNLATCH_ON) 7218aa34ab8SBenjamin Herrenschmidt 7228aa34ab8SBenjamin Herrenschmidt /* 7238aa34ab8SBenjamin Herrenschmidt * When the idle code in power4_idle puts the CPU into NAP mode, 7248aa34ab8SBenjamin Herrenschmidt * it has to do so in a loop, and relies on the external interrupt 7258aa34ab8SBenjamin Herrenschmidt * and decrementer interrupt entry code to get it out of the loop. 7268aa34ab8SBenjamin Herrenschmidt * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags 7278aa34ab8SBenjamin Herrenschmidt * to signal that it is in the loop and needs help to get out. 7288aa34ab8SBenjamin Herrenschmidt */ 7298aa34ab8SBenjamin Herrenschmidt #ifdef CONFIG_PPC_970_NAP 7308aa34ab8SBenjamin Herrenschmidt #define FINISH_NAP \ 7318aa34ab8SBenjamin Herrenschmidt BEGIN_FTR_SECTION \ 7329778b696SStuart Yoder CURRENT_THREAD_INFO(r11, r1); \ 7338aa34ab8SBenjamin Herrenschmidt ld r9,TI_LOCAL_FLAGS(r11); \ 7348aa34ab8SBenjamin Herrenschmidt andi. r10,r9,_TLF_NAPPING; \ 7358aa34ab8SBenjamin Herrenschmidt bnel power4_fixup_nap; \ 7368aa34ab8SBenjamin Herrenschmidt END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) 7378aa34ab8SBenjamin Herrenschmidt #else 7388aa34ab8SBenjamin Herrenschmidt #define FINISH_NAP 7398aa34ab8SBenjamin Herrenschmidt #endif 7408aa34ab8SBenjamin Herrenschmidt 7418aa34ab8SBenjamin Herrenschmidt #endif /* _ASM_POWERPC_EXCEPTION_H */ 742