1f86b9e03SGreg Ungerer /***************************************************************************/ 2f86b9e03SGreg Ungerer 3f86b9e03SGreg Ungerer /* 4ece9ae65SGreg Ungerer * 525x.c -- platform support for ColdFire 525x based boards 5f86b9e03SGreg Ungerer * 6f86b9e03SGreg Ungerer * Copyright (C) 2012, Steven King <sfking@fdwdc.com> 7f86b9e03SGreg Ungerer */ 8f86b9e03SGreg Ungerer 9f86b9e03SGreg Ungerer /***************************************************************************/ 10f86b9e03SGreg Ungerer 11f86b9e03SGreg Ungerer #include <linux/kernel.h> 12f86b9e03SGreg Ungerer #include <linux/param.h> 13f86b9e03SGreg Ungerer #include <linux/init.h> 14f86b9e03SGreg Ungerer #include <linux/io.h> 15f86b9e03SGreg Ungerer #include <linux/platform_device.h> 16f86b9e03SGreg Ungerer #include <asm/machdep.h> 17f86b9e03SGreg Ungerer #include <asm/coldfire.h> 18f86b9e03SGreg Ungerer #include <asm/mcfsim.h> 19f86b9e03SGreg Ungerer #include <asm/mcfclk.h> 20f86b9e03SGreg Ungerer 21f86b9e03SGreg Ungerer /***************************************************************************/ 22f86b9e03SGreg Ungerer 23f86b9e03SGreg Ungerer DEFINE_CLK(pll, "pll.0", MCF_CLK); 24f86b9e03SGreg Ungerer DEFINE_CLK(sys, "sys.0", MCF_BUSCLK); 25f86b9e03SGreg Ungerer DEFINE_CLK(mcftmr0, "mcftmr.0", MCF_BUSCLK); 26f86b9e03SGreg Ungerer DEFINE_CLK(mcftmr1, "mcftmr.1", MCF_BUSCLK); 27f86b9e03SGreg Ungerer DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK); 28f86b9e03SGreg Ungerer DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK); 29f86b9e03SGreg Ungerer DEFINE_CLK(mcfqspi0, "mcfqspi.0", MCF_BUSCLK); 302d24b532SSteven King DEFINE_CLK(mcfi2c0, "imx1-i2c.0", MCF_BUSCLK); 312d24b532SSteven King DEFINE_CLK(mcfi2c1, "imx1-i2c.1", MCF_BUSCLK); 32f86b9e03SGreg Ungerer 33f86b9e03SGreg Ungerer struct clk *mcf_clks[] = { 34f86b9e03SGreg Ungerer &clk_pll, 35f86b9e03SGreg Ungerer &clk_sys, 36f86b9e03SGreg Ungerer &clk_mcftmr0, 37f86b9e03SGreg Ungerer &clk_mcftmr1, 38f86b9e03SGreg Ungerer &clk_mcfuart0, 39f86b9e03SGreg Ungerer &clk_mcfuart1, 40f86b9e03SGreg Ungerer &clk_mcfqspi0, 412d24b532SSteven King &clk_mcfi2c0, 422d24b532SSteven King &clk_mcfi2c1, 43f86b9e03SGreg Ungerer NULL 44f86b9e03SGreg Ungerer }; 45f86b9e03SGreg Ungerer 46f86b9e03SGreg Ungerer /***************************************************************************/ 47f86b9e03SGreg Ungerer 48f86b9e03SGreg Ungerer static void __init m525x_qspi_init(void) 49f86b9e03SGreg Ungerer { 50f86b9e03SGreg Ungerer #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) 51f86b9e03SGreg Ungerer /* set the GPIO function for the qspi cs gpios */ 52f86b9e03SGreg Ungerer /* FIXME: replace with pinmux/pinctl support */ 53f86b9e03SGreg Ungerer u32 f = readl(MCFSIM2_GPIOFUNC); 54f86b9e03SGreg Ungerer f |= (1 << MCFQSPI_CS2) | (1 << MCFQSPI_CS1) | (1 << MCFQSPI_CS0); 55f86b9e03SGreg Ungerer writel(f, MCFSIM2_GPIOFUNC); 56f86b9e03SGreg Ungerer 57f86b9e03SGreg Ungerer /* QSPI irq setup */ 58f86b9e03SGreg Ungerer writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI0, 59f86b9e03SGreg Ungerer MCFSIM_QSPIICR); 60f86b9e03SGreg Ungerer mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI); 61f86b9e03SGreg Ungerer #endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */ 62f86b9e03SGreg Ungerer } 63f86b9e03SGreg Ungerer 64f86b9e03SGreg Ungerer static void __init m525x_i2c_init(void) 65f86b9e03SGreg Ungerer { 662d24b532SSteven King #if IS_ENABLED(CONFIG_I2C_IMX) 67f86b9e03SGreg Ungerer u32 r; 68f86b9e03SGreg Ungerer 69f86b9e03SGreg Ungerer /* first I2C controller uses regular irq setup */ 70f86b9e03SGreg Ungerer writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0, 71f86b9e03SGreg Ungerer MCFSIM_I2CICR); 72f86b9e03SGreg Ungerer mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C); 73f86b9e03SGreg Ungerer 74f86b9e03SGreg Ungerer /* second I2C controller is completely different */ 75f86b9e03SGreg Ungerer r = readl(MCFINTC2_INTPRI_REG(MCF_IRQ_I2C1)); 76f86b9e03SGreg Ungerer r &= ~MCFINTC2_INTPRI_BITS(0xf, MCF_IRQ_I2C1); 77f86b9e03SGreg Ungerer r |= MCFINTC2_INTPRI_BITS(0x5, MCF_IRQ_I2C1); 78f86b9e03SGreg Ungerer writel(r, MCFINTC2_INTPRI_REG(MCF_IRQ_I2C1)); 792d24b532SSteven King #endif /* IS_ENABLED(CONFIG_I2C_IMX) */ 80f86b9e03SGreg Ungerer } 81f86b9e03SGreg Ungerer 82f86b9e03SGreg Ungerer /***************************************************************************/ 83f86b9e03SGreg Ungerer 84f86b9e03SGreg Ungerer void __init config_BSP(char *commandp, int size) 85f86b9e03SGreg Ungerer { 86f86b9e03SGreg Ungerer mach_sched_init = hw_timer_init; 87f86b9e03SGreg Ungerer 88f86b9e03SGreg Ungerer m525x_qspi_init(); 89f86b9e03SGreg Ungerer m525x_i2c_init(); 90f86b9e03SGreg Ungerer } 91f86b9e03SGreg Ungerer 92f86b9e03SGreg Ungerer /***************************************************************************/ 93