1 /* SPDX-License-Identifier: GPL-2.0 */
2 
3 #ifndef __ASM_CSKY_PGTABLE_BITS_H
4 #define __ASM_CSKY_PGTABLE_BITS_H
5 
6 /* implemented in software */
7 #define _PAGE_PRESENT		(1<<0)
8 #define _PAGE_READ		(1<<1)
9 #define _PAGE_WRITE		(1<<2)
10 #define _PAGE_ACCESSED		(1<<3)
11 #define _PAGE_MODIFIED		(1<<4)
12 
13 /* We borrow bit 9 to store the exclusive marker in swap PTEs. */
14 #define _PAGE_SWP_EXCLUSIVE	(1<<9)
15 
16 /* implemented in hardware */
17 #define _PAGE_GLOBAL		(1<<6)
18 #define _PAGE_VALID		(1<<7)
19 #define _PAGE_DIRTY		(1<<8)
20 
21 #define _PAGE_CACHE		(3<<9)
22 #define _PAGE_UNCACHE		(2<<9)
23 #define _PAGE_SO		_PAGE_UNCACHE
24 #define _CACHE_MASK		(7<<9)
25 
26 #define _CACHE_CACHED		_PAGE_CACHE
27 #define _CACHE_UNCACHED		_PAGE_UNCACHE
28 
29 #define _PAGE_PROT_NONE		_PAGE_READ
30 
31 /*
32  * Encode/decode swap entries and swap PTEs. Swap PTEs are all PTEs that
33  * are !pte_none() && !pte_present().
34  *
35  * Format of swap PTE:
36  *     bit          0:    _PAGE_PRESENT (zero)
37  *     bit          1:    _PAGE_READ (zero)
38  *     bit      2 - 5:    swap type[0 - 3]
39  *     bit          6:    _PAGE_GLOBAL (zero)
40  *     bit          7:    _PAGE_VALID (zero)
41  *     bit          8:    swap type[4]
42  *     bit          9:    exclusive marker
43  *     bit    10 - 31:    swap offset
44  */
45 #define __swp_type(x)			((((x).val >> 2) & 0xf) | \
46 					(((x).val >> 4) & 0x10))
47 #define __swp_offset(x)			((x).val >> 10)
48 #define __swp_entry(type, offset)	((swp_entry_t) { \
49 					((type & 0xf) << 2) | \
50 					((type & 0x10) << 4) | \
51 					((offset) << 10)})
52 
53 #define HAVE_ARCH_UNMAPPED_AREA
54 
55 #endif /* __ASM_CSKY_PGTABLE_BITS_H */
56