19243d4d3SMichal Simek// SPDX-License-Identifier: GPL-2.0+ 29243d4d3SMichal Simek/* 39243d4d3SMichal Simek * dts file for Xilinx ZynqMP ZCU106 49243d4d3SMichal Simek * 59c8a47b4SRajan Vaja * (C) Copyright 2016 - 2019, Xilinx, Inc. 69243d4d3SMichal Simek * 79243d4d3SMichal Simek * Michal Simek <michal.simek@xilinx.com> 89243d4d3SMichal Simek */ 99243d4d3SMichal Simek 109243d4d3SMichal Simek/dts-v1/; 119243d4d3SMichal Simek 129243d4d3SMichal Simek#include "zynqmp.dtsi" 139c8a47b4SRajan Vaja#include "zynqmp-clk-ccf.dtsi" 149243d4d3SMichal Simek#include <dt-bindings/input/input.h> 159243d4d3SMichal Simek#include <dt-bindings/gpio/gpio.h> 16*51733f16SMichal Simek#include <dt-bindings/phy/phy.h> 179243d4d3SMichal Simek 189243d4d3SMichal Simek/ { 199243d4d3SMichal Simek model = "ZynqMP ZCU106 RevA"; 209243d4d3SMichal Simek compatible = "xlnx,zynqmp-zcu106-revA", "xlnx,zynqmp-zcu106", "xlnx,zynqmp"; 219243d4d3SMichal Simek 229243d4d3SMichal Simek aliases { 239243d4d3SMichal Simek ethernet0 = &gem3; 249243d4d3SMichal Simek i2c0 = &i2c0; 259243d4d3SMichal Simek i2c1 = &i2c1; 269243d4d3SMichal Simek mmc0 = &sdhci1; 279243d4d3SMichal Simek rtc0 = &rtc; 289243d4d3SMichal Simek serial0 = &uart0; 299243d4d3SMichal Simek serial1 = &uart1; 309243d4d3SMichal Simek serial2 = &dcc; 319243d4d3SMichal Simek }; 329243d4d3SMichal Simek 339243d4d3SMichal Simek chosen { 349243d4d3SMichal Simek bootargs = "earlycon"; 359243d4d3SMichal Simek stdout-path = "serial0:115200n8"; 369243d4d3SMichal Simek }; 379243d4d3SMichal Simek 389243d4d3SMichal Simek memory@0 { 399243d4d3SMichal Simek device_type = "memory"; 409243d4d3SMichal Simek reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>; 419243d4d3SMichal Simek }; 429243d4d3SMichal Simek 439243d4d3SMichal Simek gpio-keys { 449243d4d3SMichal Simek compatible = "gpio-keys"; 459243d4d3SMichal Simek autorepeat; 469243d4d3SMichal Simek sw19 { 479243d4d3SMichal Simek label = "sw19"; 489243d4d3SMichal Simek gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; 499243d4d3SMichal Simek linux,code = <KEY_DOWN>; 501696acf4SSudeep Holla wakeup-source; 519243d4d3SMichal Simek autorepeat; 529243d4d3SMichal Simek }; 539243d4d3SMichal Simek }; 549243d4d3SMichal Simek 559243d4d3SMichal Simek leds { 569243d4d3SMichal Simek compatible = "gpio-leds"; 57d1d4445aSMichal Simek heartbeat-led { 589243d4d3SMichal Simek label = "heartbeat"; 599243d4d3SMichal Simek gpios = <&gpio 23 GPIO_ACTIVE_HIGH>; 609243d4d3SMichal Simek linux,default-trigger = "heartbeat"; 619243d4d3SMichal Simek }; 629243d4d3SMichal Simek }; 63d7b13a3cSMichal Simek 64d7b13a3cSMichal Simek ina226-u76 { 65d7b13a3cSMichal Simek compatible = "iio-hwmon"; 66d7b13a3cSMichal Simek io-channels = <&u76 0>, <&u76 1>, <&u76 2>, <&u76 3>; 67d7b13a3cSMichal Simek }; 68d7b13a3cSMichal Simek ina226-u77 { 69d7b13a3cSMichal Simek compatible = "iio-hwmon"; 70d7b13a3cSMichal Simek io-channels = <&u77 0>, <&u77 1>, <&u77 2>, <&u77 3>; 71d7b13a3cSMichal Simek }; 72d7b13a3cSMichal Simek ina226-u78 { 73d7b13a3cSMichal Simek compatible = "iio-hwmon"; 74d7b13a3cSMichal Simek io-channels = <&u78 0>, <&u78 1>, <&u78 2>, <&u78 3>; 75d7b13a3cSMichal Simek }; 76d7b13a3cSMichal Simek ina226-u87 { 77d7b13a3cSMichal Simek compatible = "iio-hwmon"; 78d7b13a3cSMichal Simek io-channels = <&u87 0>, <&u87 1>, <&u87 2>, <&u87 3>; 79d7b13a3cSMichal Simek }; 80d7b13a3cSMichal Simek ina226-u85 { 81d7b13a3cSMichal Simek compatible = "iio-hwmon"; 82d7b13a3cSMichal Simek io-channels = <&u85 0>, <&u85 1>, <&u85 2>, <&u85 3>; 83d7b13a3cSMichal Simek }; 84d7b13a3cSMichal Simek ina226-u86 { 85d7b13a3cSMichal Simek compatible = "iio-hwmon"; 86d7b13a3cSMichal Simek io-channels = <&u86 0>, <&u86 1>, <&u86 2>, <&u86 3>; 87d7b13a3cSMichal Simek }; 88d7b13a3cSMichal Simek ina226-u93 { 89d7b13a3cSMichal Simek compatible = "iio-hwmon"; 90d7b13a3cSMichal Simek io-channels = <&u93 0>, <&u93 1>, <&u93 2>, <&u93 3>; 91d7b13a3cSMichal Simek }; 92d7b13a3cSMichal Simek ina226-u88 { 93d7b13a3cSMichal Simek compatible = "iio-hwmon"; 94d7b13a3cSMichal Simek io-channels = <&u88 0>, <&u88 1>, <&u88 2>, <&u88 3>; 95d7b13a3cSMichal Simek }; 96d7b13a3cSMichal Simek ina226-u15 { 97d7b13a3cSMichal Simek compatible = "iio-hwmon"; 98d7b13a3cSMichal Simek io-channels = <&u15 0>, <&u15 1>, <&u15 2>, <&u15 3>; 99d7b13a3cSMichal Simek }; 100d7b13a3cSMichal Simek ina226-u92 { 101d7b13a3cSMichal Simek compatible = "iio-hwmon"; 102d7b13a3cSMichal Simek io-channels = <&u92 0>, <&u92 1>, <&u92 2>, <&u92 3>; 103d7b13a3cSMichal Simek }; 104d7b13a3cSMichal Simek ina226-u79 { 105d7b13a3cSMichal Simek compatible = "iio-hwmon"; 106d7b13a3cSMichal Simek io-channels = <&u79 0>, <&u79 1>, <&u79 2>, <&u79 3>; 107d7b13a3cSMichal Simek }; 108d7b13a3cSMichal Simek ina226-u81 { 109d7b13a3cSMichal Simek compatible = "iio-hwmon"; 110d7b13a3cSMichal Simek io-channels = <&u81 0>, <&u81 1>, <&u81 2>, <&u81 3>; 111d7b13a3cSMichal Simek }; 112d7b13a3cSMichal Simek ina226-u80 { 113d7b13a3cSMichal Simek compatible = "iio-hwmon"; 114d7b13a3cSMichal Simek io-channels = <&u80 0>, <&u80 1>, <&u80 2>, <&u80 3>; 115d7b13a3cSMichal Simek }; 116d7b13a3cSMichal Simek ina226-u84 { 117d7b13a3cSMichal Simek compatible = "iio-hwmon"; 118d7b13a3cSMichal Simek io-channels = <&u84 0>, <&u84 1>, <&u84 2>, <&u84 3>; 119d7b13a3cSMichal Simek }; 120d7b13a3cSMichal Simek ina226-u16 { 121d7b13a3cSMichal Simek compatible = "iio-hwmon"; 122d7b13a3cSMichal Simek io-channels = <&u16 0>, <&u16 1>, <&u16 2>, <&u16 3>; 123d7b13a3cSMichal Simek }; 124d7b13a3cSMichal Simek ina226-u65 { 125d7b13a3cSMichal Simek compatible = "iio-hwmon"; 126d7b13a3cSMichal Simek io-channels = <&u65 0>, <&u65 1>, <&u65 2>, <&u65 3>; 127d7b13a3cSMichal Simek }; 128d7b13a3cSMichal Simek ina226-u74 { 129d7b13a3cSMichal Simek compatible = "iio-hwmon"; 130d7b13a3cSMichal Simek io-channels = <&u74 0>, <&u74 1>, <&u74 2>, <&u74 3>; 131d7b13a3cSMichal Simek }; 132d7b13a3cSMichal Simek ina226-u75 { 133d7b13a3cSMichal Simek compatible = "iio-hwmon"; 134d7b13a3cSMichal Simek io-channels = <&u75 0>, <&u75 1>, <&u75 2>, <&u75 3>; 135d7b13a3cSMichal Simek }; 13682a7ebf0SMichal Simek 137928a5747SMichal Simek /* 48MHz reference crystal */ 138928a5747SMichal Simek ref48: ref48M { 139928a5747SMichal Simek compatible = "fixed-clock"; 140928a5747SMichal Simek #clock-cells = <0>; 141928a5747SMichal Simek clock-frequency = <48000000>; 142928a5747SMichal Simek }; 143928a5747SMichal Simek 14482a7ebf0SMichal Simek refhdmi: refhdmi { 14582a7ebf0SMichal Simek compatible = "fixed-clock"; 14682a7ebf0SMichal Simek #clock-cells = <0>; 14782a7ebf0SMichal Simek clock-frequency = <114285000>; 14882a7ebf0SMichal Simek }; 1499243d4d3SMichal Simek}; 1509243d4d3SMichal Simek 1519243d4d3SMichal Simek&can1 { 1529243d4d3SMichal Simek status = "okay"; 1539243d4d3SMichal Simek}; 1549243d4d3SMichal Simek 1559243d4d3SMichal Simek&dcc { 1569243d4d3SMichal Simek status = "okay"; 1579243d4d3SMichal Simek}; 1589243d4d3SMichal Simek 1599243d4d3SMichal Simek/* fpd_dma clk 667MHz, lpd_dma 500MHz */ 1609243d4d3SMichal Simek&fpd_dma_chan1 { 1619243d4d3SMichal Simek status = "okay"; 1629243d4d3SMichal Simek}; 1639243d4d3SMichal Simek 1649243d4d3SMichal Simek&fpd_dma_chan2 { 1659243d4d3SMichal Simek status = "okay"; 1669243d4d3SMichal Simek}; 1679243d4d3SMichal Simek 1689243d4d3SMichal Simek&fpd_dma_chan3 { 1699243d4d3SMichal Simek status = "okay"; 1709243d4d3SMichal Simek}; 1719243d4d3SMichal Simek 1729243d4d3SMichal Simek&fpd_dma_chan4 { 1739243d4d3SMichal Simek status = "okay"; 1749243d4d3SMichal Simek}; 1759243d4d3SMichal Simek 1769243d4d3SMichal Simek&fpd_dma_chan5 { 1779243d4d3SMichal Simek status = "okay"; 1789243d4d3SMichal Simek}; 1799243d4d3SMichal Simek 1809243d4d3SMichal Simek&fpd_dma_chan6 { 1819243d4d3SMichal Simek status = "okay"; 1829243d4d3SMichal Simek}; 1839243d4d3SMichal Simek 1849243d4d3SMichal Simek&fpd_dma_chan7 { 1859243d4d3SMichal Simek status = "okay"; 1869243d4d3SMichal Simek}; 1879243d4d3SMichal Simek 1889243d4d3SMichal Simek&fpd_dma_chan8 { 1899243d4d3SMichal Simek status = "okay"; 1909243d4d3SMichal Simek}; 1919243d4d3SMichal Simek 1929243d4d3SMichal Simek&gem3 { 1939243d4d3SMichal Simek status = "okay"; 1949243d4d3SMichal Simek phy-handle = <&phy0>; 1959243d4d3SMichal Simek phy-mode = "rgmii-id"; 19613d21ebaSMichal Simek phy0: ethernet-phy@c { 1979243d4d3SMichal Simek reg = <0xc>; 1989243d4d3SMichal Simek ti,rx-internal-delay = <0x8>; 1999243d4d3SMichal Simek ti,tx-internal-delay = <0xa>; 2009243d4d3SMichal Simek ti,fifo-depth = <0x1>; 20178c484a5SHarini Katakam ti,dp83867-rxctrl-strap-quirk; 2029243d4d3SMichal Simek }; 2039243d4d3SMichal Simek}; 2049243d4d3SMichal Simek 2059243d4d3SMichal Simek&gpio { 2069243d4d3SMichal Simek status = "okay"; 2079243d4d3SMichal Simek}; 2089243d4d3SMichal Simek 2099243d4d3SMichal Simek&i2c0 { 2109243d4d3SMichal Simek status = "okay"; 2119243d4d3SMichal Simek clock-frequency = <400000>; 2129243d4d3SMichal Simek 2139243d4d3SMichal Simek tca6416_u97: gpio@20 { 2149243d4d3SMichal Simek compatible = "ti,tca6416"; 2159243d4d3SMichal Simek reg = <0x20>; 2169243d4d3SMichal Simek gpio-controller; /* interrupt not connected */ 2179243d4d3SMichal Simek #gpio-cells = <2>; 2189243d4d3SMichal Simek /* 2199243d4d3SMichal Simek * IRQ not connected 2209243d4d3SMichal Simek * Lines: 2219243d4d3SMichal Simek * 0 - SFP_SI5328_INT_ALM 2229243d4d3SMichal Simek * 1 - HDMI_SI5328_INT_ALM 2239243d4d3SMichal Simek * 5 - IIC_MUX_RESET_B 2249243d4d3SMichal Simek * 6 - GEM3_EXP_RESET_B 2259243d4d3SMichal Simek * 10 - FMC_HPC0_PRSNT_M2C_B 2269243d4d3SMichal Simek * 11 - FMC_HPC1_PRSNT_M2C_B 2279243d4d3SMichal Simek * 2-4, 7, 12-17 - not connected 2289243d4d3SMichal Simek */ 2299243d4d3SMichal Simek }; 2309243d4d3SMichal Simek 2319243d4d3SMichal Simek tca6416_u61: gpio@21 { 2329243d4d3SMichal Simek compatible = "ti,tca6416"; 2339243d4d3SMichal Simek reg = <0x21>; 2349243d4d3SMichal Simek gpio-controller; 2359243d4d3SMichal Simek #gpio-cells = <2>; 2369243d4d3SMichal Simek /* 2379243d4d3SMichal Simek * IRQ not connected 2389243d4d3SMichal Simek * Lines: 2399243d4d3SMichal Simek * 0 - VCCPSPLL_EN 2409243d4d3SMichal Simek * 1 - MGTRAVCC_EN 2419243d4d3SMichal Simek * 2 - MGTRAVTT_EN 2429243d4d3SMichal Simek * 3 - VCCPSDDRPLL_EN 2439243d4d3SMichal Simek * 4 - MIO26_PMU_INPUT_LS 2449243d4d3SMichal Simek * 5 - PL_PMBUS_ALERT 2459243d4d3SMichal Simek * 6 - PS_PMBUS_ALERT 2469243d4d3SMichal Simek * 7 - MAXIM_PMBUS_ALERT 2479243d4d3SMichal Simek * 10 - PL_DDR4_VTERM_EN 2489243d4d3SMichal Simek * 11 - PL_DDR4_VPP_2V5_EN 2499243d4d3SMichal Simek * 12 - PS_DIMM_VDDQ_TO_PSVCCO_ON 2509243d4d3SMichal Simek * 13 - PS_DIMM_SUSPEND_EN 2519243d4d3SMichal Simek * 14 - PS_DDR4_VTERM_EN 2529243d4d3SMichal Simek * 15 - PS_DDR4_VPP_2V5_EN 2539243d4d3SMichal Simek * 16 - 17 - not connected 2549243d4d3SMichal Simek */ 2559243d4d3SMichal Simek }; 2569243d4d3SMichal Simek 2579243d4d3SMichal Simek i2c-mux@75 { /* u60 */ 2589243d4d3SMichal Simek compatible = "nxp,pca9544"; 2599243d4d3SMichal Simek #address-cells = <1>; 2609243d4d3SMichal Simek #size-cells = <0>; 2619243d4d3SMichal Simek reg = <0x75>; 2629243d4d3SMichal Simek i2c@0 { 2639243d4d3SMichal Simek #address-cells = <1>; 2649243d4d3SMichal Simek #size-cells = <0>; 2659243d4d3SMichal Simek reg = <0>; 2669243d4d3SMichal Simek /* PS_PMBUS */ 267d7b13a3cSMichal Simek u76: ina226@40 { /* u76 */ 2689243d4d3SMichal Simek compatible = "ti,ina226"; 269d7b13a3cSMichal Simek #io-channel-cells = <1>; 2705a25e646SMichal Simek label = "ina226-u76"; 2719243d4d3SMichal Simek reg = <0x40>; 2729243d4d3SMichal Simek shunt-resistor = <5000>; 2739243d4d3SMichal Simek }; 274d7b13a3cSMichal Simek u77: ina226@41 { /* u77 */ 2759243d4d3SMichal Simek compatible = "ti,ina226"; 276d7b13a3cSMichal Simek #io-channel-cells = <1>; 2775a25e646SMichal Simek label = "ina226-u77"; 2789243d4d3SMichal Simek reg = <0x41>; 2799243d4d3SMichal Simek shunt-resistor = <5000>; 2809243d4d3SMichal Simek }; 281d7b13a3cSMichal Simek u78: ina226@42 { /* u78 */ 2829243d4d3SMichal Simek compatible = "ti,ina226"; 283d7b13a3cSMichal Simek #io-channel-cells = <1>; 2845a25e646SMichal Simek label = "ina226-u78"; 2859243d4d3SMichal Simek reg = <0x42>; 2869243d4d3SMichal Simek shunt-resistor = <5000>; 2879243d4d3SMichal Simek }; 288d7b13a3cSMichal Simek u87: ina226@43 { /* u87 */ 2899243d4d3SMichal Simek compatible = "ti,ina226"; 290d7b13a3cSMichal Simek #io-channel-cells = <1>; 2915a25e646SMichal Simek label = "ina226-u87"; 2929243d4d3SMichal Simek reg = <0x43>; 2939243d4d3SMichal Simek shunt-resistor = <5000>; 2949243d4d3SMichal Simek }; 295d7b13a3cSMichal Simek u85: ina226@44 { /* u85 */ 2969243d4d3SMichal Simek compatible = "ti,ina226"; 297d7b13a3cSMichal Simek #io-channel-cells = <1>; 2985a25e646SMichal Simek label = "ina226-u85"; 2999243d4d3SMichal Simek reg = <0x44>; 3009243d4d3SMichal Simek shunt-resistor = <5000>; 3019243d4d3SMichal Simek }; 302d7b13a3cSMichal Simek u86: ina226@45 { /* u86 */ 3039243d4d3SMichal Simek compatible = "ti,ina226"; 304d7b13a3cSMichal Simek #io-channel-cells = <1>; 3055a25e646SMichal Simek label = "ina226-u86"; 3069243d4d3SMichal Simek reg = <0x45>; 3079243d4d3SMichal Simek shunt-resistor = <5000>; 3089243d4d3SMichal Simek }; 309d7b13a3cSMichal Simek u93: ina226@46 { /* u93 */ 3109243d4d3SMichal Simek compatible = "ti,ina226"; 311d7b13a3cSMichal Simek #io-channel-cells = <1>; 3125a25e646SMichal Simek label = "ina226-u93"; 3139243d4d3SMichal Simek reg = <0x46>; 3149243d4d3SMichal Simek shunt-resistor = <5000>; 3159243d4d3SMichal Simek }; 316d7b13a3cSMichal Simek u88: ina226@47 { /* u88 */ 3179243d4d3SMichal Simek compatible = "ti,ina226"; 318d7b13a3cSMichal Simek #io-channel-cells = <1>; 3195a25e646SMichal Simek label = "ina226-u88"; 3209243d4d3SMichal Simek reg = <0x47>; 3219243d4d3SMichal Simek shunt-resistor = <5000>; 3229243d4d3SMichal Simek }; 323d7b13a3cSMichal Simek u15: ina226@4a { /* u15 */ 3249243d4d3SMichal Simek compatible = "ti,ina226"; 325d7b13a3cSMichal Simek #io-channel-cells = <1>; 3265a25e646SMichal Simek label = "ina226-u15"; 3279243d4d3SMichal Simek reg = <0x4a>; 3289243d4d3SMichal Simek shunt-resistor = <5000>; 3299243d4d3SMichal Simek }; 330d7b13a3cSMichal Simek u92: ina226@4b { /* u92 */ 3319243d4d3SMichal Simek compatible = "ti,ina226"; 332d7b13a3cSMichal Simek #io-channel-cells = <1>; 3335a25e646SMichal Simek label = "ina226-u92"; 3349243d4d3SMichal Simek reg = <0x4b>; 3359243d4d3SMichal Simek shunt-resistor = <5000>; 3369243d4d3SMichal Simek }; 3379243d4d3SMichal Simek }; 3389243d4d3SMichal Simek i2c@1 { 3399243d4d3SMichal Simek #address-cells = <1>; 3409243d4d3SMichal Simek #size-cells = <0>; 3419243d4d3SMichal Simek reg = <1>; 3429243d4d3SMichal Simek /* PL_PMBUS */ 343d7b13a3cSMichal Simek u79: ina226@40 { /* u79 */ 3449243d4d3SMichal Simek compatible = "ti,ina226"; 345d7b13a3cSMichal Simek #io-channel-cells = <1>; 3465a25e646SMichal Simek label = "ina226-u79"; 3479243d4d3SMichal Simek reg = <0x40>; 3489243d4d3SMichal Simek shunt-resistor = <2000>; 3499243d4d3SMichal Simek }; 350d7b13a3cSMichal Simek u81: ina226@41 { /* u81 */ 3519243d4d3SMichal Simek compatible = "ti,ina226"; 352d7b13a3cSMichal Simek #io-channel-cells = <1>; 3535a25e646SMichal Simek label = "ina226-u81"; 3549243d4d3SMichal Simek reg = <0x41>; 3559243d4d3SMichal Simek shunt-resistor = <5000>; 3569243d4d3SMichal Simek }; 357d7b13a3cSMichal Simek u80: ina226@42 { /* u80 */ 3589243d4d3SMichal Simek compatible = "ti,ina226"; 359d7b13a3cSMichal Simek #io-channel-cells = <1>; 3605a25e646SMichal Simek label = "ina226-u80"; 3619243d4d3SMichal Simek reg = <0x42>; 3629243d4d3SMichal Simek shunt-resistor = <5000>; 3639243d4d3SMichal Simek }; 364d7b13a3cSMichal Simek u84: ina226@43 { /* u84 */ 3659243d4d3SMichal Simek compatible = "ti,ina226"; 366d7b13a3cSMichal Simek #io-channel-cells = <1>; 3675a25e646SMichal Simek label = "ina226-u84"; 3689243d4d3SMichal Simek reg = <0x43>; 3699243d4d3SMichal Simek shunt-resistor = <5000>; 3709243d4d3SMichal Simek }; 371d7b13a3cSMichal Simek u16: ina226@44 { /* u16 */ 3729243d4d3SMichal Simek compatible = "ti,ina226"; 373d7b13a3cSMichal Simek #io-channel-cells = <1>; 3745a25e646SMichal Simek label = "ina226-u16"; 3759243d4d3SMichal Simek reg = <0x44>; 3769243d4d3SMichal Simek shunt-resistor = <5000>; 3779243d4d3SMichal Simek }; 378d7b13a3cSMichal Simek u65: ina226@45 { /* u65 */ 3799243d4d3SMichal Simek compatible = "ti,ina226"; 380d7b13a3cSMichal Simek #io-channel-cells = <1>; 3815a25e646SMichal Simek label = "ina226-u65"; 3829243d4d3SMichal Simek reg = <0x45>; 3839243d4d3SMichal Simek shunt-resistor = <5000>; 3849243d4d3SMichal Simek }; 385d7b13a3cSMichal Simek u74: ina226@46 { /* u74 */ 3869243d4d3SMichal Simek compatible = "ti,ina226"; 387d7b13a3cSMichal Simek #io-channel-cells = <1>; 3885a25e646SMichal Simek label = "ina226-u74"; 3899243d4d3SMichal Simek reg = <0x46>; 3909243d4d3SMichal Simek shunt-resistor = <5000>; 3919243d4d3SMichal Simek }; 392d7b13a3cSMichal Simek u75: ina226@47 { /* u75 */ 3939243d4d3SMichal Simek compatible = "ti,ina226"; 394d7b13a3cSMichal Simek #io-channel-cells = <1>; 3955a25e646SMichal Simek label = "ina226-u75"; 3969243d4d3SMichal Simek reg = <0x47>; 3979243d4d3SMichal Simek shunt-resistor = <5000>; 3989243d4d3SMichal Simek }; 3999243d4d3SMichal Simek }; 4009243d4d3SMichal Simek i2c@2 { 4019243d4d3SMichal Simek #address-cells = <1>; 4029243d4d3SMichal Simek #size-cells = <0>; 4039243d4d3SMichal Simek reg = <2>; 4049243d4d3SMichal Simek /* MAXIM_PMBUS - 00 */ 4059243d4d3SMichal Simek max15301@a { /* u46 */ 4069243d4d3SMichal Simek compatible = "maxim,max15301"; 4079243d4d3SMichal Simek reg = <0xa>; 4089243d4d3SMichal Simek }; 4099243d4d3SMichal Simek max15303@b { /* u4 */ 4109243d4d3SMichal Simek compatible = "maxim,max15303"; 4119243d4d3SMichal Simek reg = <0xb>; 4129243d4d3SMichal Simek }; 4139243d4d3SMichal Simek max15303@10 { /* u13 */ 4149243d4d3SMichal Simek compatible = "maxim,max15303"; 4159243d4d3SMichal Simek reg = <0x10>; 4169243d4d3SMichal Simek }; 4179243d4d3SMichal Simek max15301@13 { /* u47 */ 4189243d4d3SMichal Simek compatible = "maxim,max15301"; 4199243d4d3SMichal Simek reg = <0x13>; 4209243d4d3SMichal Simek }; 4219243d4d3SMichal Simek max15303@14 { /* u7 */ 4229243d4d3SMichal Simek compatible = "maxim,max15303"; 4239243d4d3SMichal Simek reg = <0x14>; 4249243d4d3SMichal Simek }; 4259243d4d3SMichal Simek max15303@15 { /* u6 */ 4269243d4d3SMichal Simek compatible = "maxim,max15303"; 4279243d4d3SMichal Simek reg = <0x15>; 4289243d4d3SMichal Simek }; 4299243d4d3SMichal Simek max15303@16 { /* u10 */ 4309243d4d3SMichal Simek compatible = "maxim,max15303"; 4319243d4d3SMichal Simek reg = <0x16>; 4329243d4d3SMichal Simek }; 4339243d4d3SMichal Simek max15303@17 { /* u9 */ 4349243d4d3SMichal Simek compatible = "maxim,max15303"; 4359243d4d3SMichal Simek reg = <0x17>; 4369243d4d3SMichal Simek }; 4379243d4d3SMichal Simek max15301@18 { /* u63 */ 4389243d4d3SMichal Simek compatible = "maxim,max15301"; 4399243d4d3SMichal Simek reg = <0x18>; 4409243d4d3SMichal Simek }; 4419243d4d3SMichal Simek max15303@1a { /* u49 */ 4429243d4d3SMichal Simek compatible = "maxim,max15303"; 4439243d4d3SMichal Simek reg = <0x1a>; 4449243d4d3SMichal Simek }; 4459243d4d3SMichal Simek max15303@1b { /* u8 */ 4469243d4d3SMichal Simek compatible = "maxim,max15303"; 4479243d4d3SMichal Simek reg = <0x1b>; 4489243d4d3SMichal Simek }; 4499243d4d3SMichal Simek max15303@1d { /* u18 */ 4509243d4d3SMichal Simek compatible = "maxim,max15303"; 4519243d4d3SMichal Simek reg = <0x1d>; 4529243d4d3SMichal Simek }; 4539243d4d3SMichal Simek 4549243d4d3SMichal Simek max20751@72 { /* u95 */ 4559243d4d3SMichal Simek compatible = "maxim,max20751"; 4569243d4d3SMichal Simek reg = <0x72>; 4579243d4d3SMichal Simek }; 4589243d4d3SMichal Simek max20751@73 { /* u96 */ 4599243d4d3SMichal Simek compatible = "maxim,max20751"; 4609243d4d3SMichal Simek reg = <0x73>; 4619243d4d3SMichal Simek }; 4629243d4d3SMichal Simek }; 4639243d4d3SMichal Simek /* Bus 3 is not connected */ 4649243d4d3SMichal Simek }; 4659243d4d3SMichal Simek}; 4669243d4d3SMichal Simek 4679243d4d3SMichal Simek&i2c1 { 4689243d4d3SMichal Simek status = "okay"; 4699243d4d3SMichal Simek clock-frequency = <400000>; 4709243d4d3SMichal Simek 4719243d4d3SMichal Simek /* PL i2c via PCA9306 - u45 */ 4729243d4d3SMichal Simek i2c-mux@74 { /* u34 */ 4739243d4d3SMichal Simek compatible = "nxp,pca9548"; 4749243d4d3SMichal Simek #address-cells = <1>; 4759243d4d3SMichal Simek #size-cells = <0>; 4769243d4d3SMichal Simek reg = <0x74>; 4779243d4d3SMichal Simek i2c@0 { 4789243d4d3SMichal Simek #address-cells = <1>; 4799243d4d3SMichal Simek #size-cells = <0>; 4809243d4d3SMichal Simek reg = <0>; 4819243d4d3SMichal Simek /* 4829243d4d3SMichal Simek * IIC_EEPROM 1kB memory which uses 256B blocks 4839243d4d3SMichal Simek * where every block has different address. 4849243d4d3SMichal Simek * 0 - 256B address 0x54 4859243d4d3SMichal Simek * 256B - 512B address 0x55 4869243d4d3SMichal Simek * 512B - 768B address 0x56 4879243d4d3SMichal Simek * 768B - 1024B address 0x57 4889243d4d3SMichal Simek */ 4899243d4d3SMichal Simek eeprom: eeprom@54 { /* u23 */ 4909243d4d3SMichal Simek compatible = "atmel,24c08"; 4919243d4d3SMichal Simek reg = <0x54>; 4929243d4d3SMichal Simek }; 4939243d4d3SMichal Simek }; 4949243d4d3SMichal Simek i2c@1 { 4959243d4d3SMichal Simek #address-cells = <1>; 4969243d4d3SMichal Simek #size-cells = <0>; 4979243d4d3SMichal Simek reg = <1>; 4989243d4d3SMichal Simek si5341: clock-generator@36 { /* SI5341 - u69 */ 499928a5747SMichal Simek compatible = "silabs,si5341"; 5009243d4d3SMichal Simek reg = <0x36>; 501928a5747SMichal Simek #clock-cells = <2>; 502928a5747SMichal Simek #address-cells = <1>; 503928a5747SMichal Simek #size-cells = <0>; 504928a5747SMichal Simek clocks = <&ref48>; 505928a5747SMichal Simek clock-names = "xtal"; 506928a5747SMichal Simek clock-output-names = "si5341"; 507928a5747SMichal Simek 508928a5747SMichal Simek si5341_0: out@0 { 509928a5747SMichal Simek /* refclk0 for PS-GT, used for DP */ 510928a5747SMichal Simek reg = <0>; 511928a5747SMichal Simek always-on; 512928a5747SMichal Simek }; 513928a5747SMichal Simek si5341_2: out@2 { 514928a5747SMichal Simek /* refclk2 for PS-GT, used for USB3 */ 515928a5747SMichal Simek reg = <2>; 516928a5747SMichal Simek always-on; 517928a5747SMichal Simek }; 518928a5747SMichal Simek si5341_3: out@3 { 519928a5747SMichal Simek /* refclk3 for PS-GT, used for SATA */ 520928a5747SMichal Simek reg = <3>; 521928a5747SMichal Simek always-on; 522928a5747SMichal Simek }; 523928a5747SMichal Simek si5341_6: out@6 { 524928a5747SMichal Simek /* refclk6 PL CLK125 */ 525928a5747SMichal Simek reg = <6>; 526928a5747SMichal Simek always-on; 527928a5747SMichal Simek }; 528928a5747SMichal Simek si5341_7: out@7 { 529928a5747SMichal Simek /* refclk7 PL CLK74 */ 530928a5747SMichal Simek reg = <7>; 531928a5747SMichal Simek always-on; 532928a5747SMichal Simek }; 533928a5747SMichal Simek si5341_9: out@9 { 534928a5747SMichal Simek /* refclk9 used for PS_REF_CLK 33.3 MHz */ 535928a5747SMichal Simek reg = <9>; 536928a5747SMichal Simek always-on; 537928a5747SMichal Simek }; 5389243d4d3SMichal Simek }; 5399243d4d3SMichal Simek 5409243d4d3SMichal Simek }; 5419243d4d3SMichal Simek i2c@2 { 5429243d4d3SMichal Simek #address-cells = <1>; 5439243d4d3SMichal Simek #size-cells = <0>; 5449243d4d3SMichal Simek reg = <2>; 5459243d4d3SMichal Simek si570_1: clock-generator@5d { /* USER SI570 - u42 */ 5469243d4d3SMichal Simek #clock-cells = <0>; 5479243d4d3SMichal Simek compatible = "silabs,si570"; 5489243d4d3SMichal Simek reg = <0x5d>; 5499243d4d3SMichal Simek temperature-stability = <50>; 5509243d4d3SMichal Simek factory-fout = <300000000>; 5519243d4d3SMichal Simek clock-frequency = <300000000>; 55248b44b90SMichal Simek clock-output-names = "si570_user"; 5539243d4d3SMichal Simek }; 5549243d4d3SMichal Simek }; 5559243d4d3SMichal Simek i2c@3 { 5569243d4d3SMichal Simek #address-cells = <1>; 5579243d4d3SMichal Simek #size-cells = <0>; 5589243d4d3SMichal Simek reg = <3>; 5599243d4d3SMichal Simek si570_2: clock-generator@5d { /* USER MGT SI570 - u56 */ 5609243d4d3SMichal Simek #clock-cells = <0>; 5619243d4d3SMichal Simek compatible = "silabs,si570"; 5629243d4d3SMichal Simek reg = <0x5d>; 5639243d4d3SMichal Simek temperature-stability = <50>; /* copy from zc702 */ 5649243d4d3SMichal Simek factory-fout = <156250000>; 5659243d4d3SMichal Simek clock-frequency = <148500000>; 56648b44b90SMichal Simek clock-output-names = "si570_mgt"; 5679243d4d3SMichal Simek }; 5689243d4d3SMichal Simek }; 5699243d4d3SMichal Simek i2c@4 { 5709243d4d3SMichal Simek #address-cells = <1>; 5719243d4d3SMichal Simek #size-cells = <0>; 5729243d4d3SMichal Simek reg = <4>; 5739243d4d3SMichal Simek si5328: clock-generator@69 {/* SI5328 - u20 */ 5749243d4d3SMichal Simek reg = <0x69>; 57582a7ebf0SMichal Simek /* 57682a7ebf0SMichal Simek * Chip has interrupt present connected to PL 57782a7ebf0SMichal Simek * interrupt-parent = <&>; 57882a7ebf0SMichal Simek * interrupts = <>; 57982a7ebf0SMichal Simek */ 58082a7ebf0SMichal Simek #address-cells = <1>; 58182a7ebf0SMichal Simek #size-cells = <0>; 58282a7ebf0SMichal Simek #clock-cells = <1>; 58382a7ebf0SMichal Simek clocks = <&refhdmi>; 58482a7ebf0SMichal Simek clock-names = "xtal"; 58582a7ebf0SMichal Simek clock-output-names = "si5328"; 58682a7ebf0SMichal Simek 58782a7ebf0SMichal Simek si5328_clk: clk0@0 { 58882a7ebf0SMichal Simek reg = <0>; 58982a7ebf0SMichal Simek clock-frequency = <27000000>; 59082a7ebf0SMichal Simek }; 5919243d4d3SMichal Simek }; 5929243d4d3SMichal Simek }; 5939243d4d3SMichal Simek i2c@5 { 5949243d4d3SMichal Simek #address-cells = <1>; 5959243d4d3SMichal Simek #size-cells = <0>; 5969243d4d3SMichal Simek reg = <5>; /* FAN controller */ 5979243d4d3SMichal Simek temp@4c {/* lm96163 - u128 */ 5989243d4d3SMichal Simek compatible = "national,lm96163"; 5999243d4d3SMichal Simek reg = <0x4c>; 6009243d4d3SMichal Simek }; 6019243d4d3SMichal Simek }; 6029243d4d3SMichal Simek /* 6 - 7 unconnected */ 6039243d4d3SMichal Simek }; 6049243d4d3SMichal Simek 6059243d4d3SMichal Simek i2c-mux@75 { 6069243d4d3SMichal Simek compatible = "nxp,pca9548"; /* u135 */ 6079243d4d3SMichal Simek #address-cells = <1>; 6089243d4d3SMichal Simek #size-cells = <0>; 6099243d4d3SMichal Simek reg = <0x75>; 6109243d4d3SMichal Simek 6119243d4d3SMichal Simek i2c@0 { 6129243d4d3SMichal Simek #address-cells = <1>; 6139243d4d3SMichal Simek #size-cells = <0>; 6149243d4d3SMichal Simek reg = <0>; 6159243d4d3SMichal Simek /* HPC0_IIC */ 6169243d4d3SMichal Simek }; 6179243d4d3SMichal Simek i2c@1 { 6189243d4d3SMichal Simek #address-cells = <1>; 6199243d4d3SMichal Simek #size-cells = <0>; 6209243d4d3SMichal Simek reg = <1>; 6219243d4d3SMichal Simek /* HPC1_IIC */ 6229243d4d3SMichal Simek }; 6239243d4d3SMichal Simek i2c@2 { 6249243d4d3SMichal Simek #address-cells = <1>; 6259243d4d3SMichal Simek #size-cells = <0>; 6269243d4d3SMichal Simek reg = <2>; 6279243d4d3SMichal Simek /* SYSMON */ 6289243d4d3SMichal Simek }; 6299243d4d3SMichal Simek i2c@3 { 6309243d4d3SMichal Simek #address-cells = <1>; 6319243d4d3SMichal Simek #size-cells = <0>; 6329243d4d3SMichal Simek reg = <3>; 6339243d4d3SMichal Simek /* DDR4 SODIMM */ 6349243d4d3SMichal Simek }; 6359243d4d3SMichal Simek i2c@4 { 6369243d4d3SMichal Simek #address-cells = <1>; 6379243d4d3SMichal Simek #size-cells = <0>; 6389243d4d3SMichal Simek reg = <4>; 6399243d4d3SMichal Simek /* SEP 3 */ 6409243d4d3SMichal Simek }; 6419243d4d3SMichal Simek i2c@5 { 6429243d4d3SMichal Simek #address-cells = <1>; 6439243d4d3SMichal Simek #size-cells = <0>; 6449243d4d3SMichal Simek reg = <5>; 6459243d4d3SMichal Simek /* SEP 2 */ 6469243d4d3SMichal Simek }; 6479243d4d3SMichal Simek i2c@6 { 6489243d4d3SMichal Simek #address-cells = <1>; 6499243d4d3SMichal Simek #size-cells = <0>; 6509243d4d3SMichal Simek reg = <6>; 6519243d4d3SMichal Simek /* SEP 1 */ 6529243d4d3SMichal Simek }; 6539243d4d3SMichal Simek i2c@7 { 6549243d4d3SMichal Simek #address-cells = <1>; 6559243d4d3SMichal Simek #size-cells = <0>; 6569243d4d3SMichal Simek reg = <7>; 6579243d4d3SMichal Simek /* SEP 0 */ 6589243d4d3SMichal Simek }; 6599243d4d3SMichal Simek }; 6609243d4d3SMichal Simek}; 6619243d4d3SMichal Simek 662*51733f16SMichal Simek&psgtr { 663*51733f16SMichal Simek status = "okay"; 664*51733f16SMichal Simek /* nc, sata, usb3, dp */ 665*51733f16SMichal Simek clocks = <&si5341 0 3>, <&si5341 0 2>, <&si5341 0 0>; 666*51733f16SMichal Simek clock-names = "ref1", "ref2", "ref3"; 667*51733f16SMichal Simek}; 668*51733f16SMichal Simek 6699243d4d3SMichal Simek&rtc { 6709243d4d3SMichal Simek status = "okay"; 6719243d4d3SMichal Simek}; 6729243d4d3SMichal Simek 6739243d4d3SMichal Simek&sata { 6749243d4d3SMichal Simek status = "okay"; 6759243d4d3SMichal Simek /* SATA OOB timing settings */ 6769243d4d3SMichal Simek ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>; 6779243d4d3SMichal Simek ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; 6789243d4d3SMichal Simek ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; 6799243d4d3SMichal Simek ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>; 6809243d4d3SMichal Simek ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>; 6819243d4d3SMichal Simek ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; 6829243d4d3SMichal Simek ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; 6839243d4d3SMichal Simek ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>; 684*51733f16SMichal Simek phy-names = "sata-phy"; 685*51733f16SMichal Simek phys = <&psgtr 3 PHY_TYPE_SATA 1 1>; 6869243d4d3SMichal Simek}; 6879243d4d3SMichal Simek 6889243d4d3SMichal Simek/* SD1 with level shifter */ 6899243d4d3SMichal Simek&sdhci1 { 6909243d4d3SMichal Simek status = "okay"; 6919243d4d3SMichal Simek no-1-8-v; 6929243d4d3SMichal Simek}; 6939243d4d3SMichal Simek 6949243d4d3SMichal Simek&uart0 { 6959243d4d3SMichal Simek status = "okay"; 6969243d4d3SMichal Simek}; 6979243d4d3SMichal Simek 6989243d4d3SMichal Simek&uart1 { 6999243d4d3SMichal Simek status = "okay"; 7009243d4d3SMichal Simek}; 7019243d4d3SMichal Simek 7029243d4d3SMichal Simek/* ULPI SMSC USB3320 */ 7039243d4d3SMichal Simek&usb0 { 7049243d4d3SMichal Simek status = "okay"; 705df906cf5SAnurag Kumar Vulisha dr_mode = "host"; 7069243d4d3SMichal Simek}; 7079243d4d3SMichal Simek 7089243d4d3SMichal Simek&watchdog0 { 7099243d4d3SMichal Simek status = "okay"; 7109243d4d3SMichal Simek}; 711