105f7e3d1SMasahiro Yamada// SPDX-License-Identifier: GPL-2.0+ OR MIT 205f7e3d1SMasahiro Yamada// 305f7e3d1SMasahiro Yamada// Device Tree Source for UniPhier LD11 SoC 405f7e3d1SMasahiro Yamada// 505f7e3d1SMasahiro Yamada// Copyright (C) 2016 Socionext Inc. 605f7e3d1SMasahiro Yamada// Author: Masahiro Yamada <yamada.masahiro@socionext.com> 7270e0c3eSMasahiro Yamada 8b6e5ec20SMasahiro Yamada#include <dt-bindings/gpio/gpio.h> 98311ca57SMasahiro Yamada#include <dt-bindings/gpio/uniphier-gpio.h> 105ba95e8eSKunihiko Hayashi#include <dt-bindings/interrupt-controller/arm-gic.h> 11b6e5ec20SMasahiro Yamada 12270e0c3eSMasahiro Yamada/ { 13270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11"; 14270e0c3eSMasahiro Yamada #address-cells = <2>; 15270e0c3eSMasahiro Yamada #size-cells = <2>; 16270e0c3eSMasahiro Yamada interrupt-parent = <&gic>; 17270e0c3eSMasahiro Yamada 18270e0c3eSMasahiro Yamada cpus { 19270e0c3eSMasahiro Yamada #address-cells = <2>; 20270e0c3eSMasahiro Yamada #size-cells = <0>; 21270e0c3eSMasahiro Yamada 22270e0c3eSMasahiro Yamada cpu-map { 23270e0c3eSMasahiro Yamada cluster0 { 24270e0c3eSMasahiro Yamada core0 { 25270e0c3eSMasahiro Yamada cpu = <&cpu0>; 26270e0c3eSMasahiro Yamada }; 27270e0c3eSMasahiro Yamada core1 { 28270e0c3eSMasahiro Yamada cpu = <&cpu1>; 29270e0c3eSMasahiro Yamada }; 30270e0c3eSMasahiro Yamada }; 31270e0c3eSMasahiro Yamada }; 32270e0c3eSMasahiro Yamada 33270e0c3eSMasahiro Yamada cpu0: cpu@0 { 34270e0c3eSMasahiro Yamada device_type = "cpu"; 3531af04cdSRob Herring compatible = "arm,cortex-a53"; 36270e0c3eSMasahiro Yamada reg = <0 0x000>; 37bdb81836SMasahiro Yamada clocks = <&sys_clk 33>; 382f81137fSMasahiro Yamada enable-method = "psci"; 395381a96cSKunihiko Hayashi next-level-cache = <&l2>; 40bdb81836SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 41270e0c3eSMasahiro Yamada }; 42270e0c3eSMasahiro Yamada 43270e0c3eSMasahiro Yamada cpu1: cpu@1 { 44270e0c3eSMasahiro Yamada device_type = "cpu"; 4531af04cdSRob Herring compatible = "arm,cortex-a53"; 46270e0c3eSMasahiro Yamada reg = <0 0x001>; 47bdb81836SMasahiro Yamada clocks = <&sys_clk 33>; 482f81137fSMasahiro Yamada enable-method = "psci"; 495381a96cSKunihiko Hayashi next-level-cache = <&l2>; 50bdb81836SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 51bdb81836SMasahiro Yamada }; 525381a96cSKunihiko Hayashi 535381a96cSKunihiko Hayashi l2: l2-cache { 545381a96cSKunihiko Hayashi compatible = "cache"; 555381a96cSKunihiko Hayashi }; 56bdb81836SMasahiro Yamada }; 57bdb81836SMasahiro Yamada 589cd7d03fSMasahiro Yamada cluster0_opp: opp-table { 59bdb81836SMasahiro Yamada compatible = "operating-points-v2"; 60bdb81836SMasahiro Yamada opp-shared; 61bdb81836SMasahiro Yamada 623fc9a121SViresh Kumar opp-245000000 { 63bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <245000000>; 64bdb81836SMasahiro Yamada clock-latency-ns = <300>; 65bdb81836SMasahiro Yamada }; 663fc9a121SViresh Kumar opp-250000000 { 67bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 68bdb81836SMasahiro Yamada clock-latency-ns = <300>; 69bdb81836SMasahiro Yamada }; 703fc9a121SViresh Kumar opp-490000000 { 71bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <490000000>; 72bdb81836SMasahiro Yamada clock-latency-ns = <300>; 73bdb81836SMasahiro Yamada }; 743fc9a121SViresh Kumar opp-500000000 { 75bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 76bdb81836SMasahiro Yamada clock-latency-ns = <300>; 77bdb81836SMasahiro Yamada }; 783fc9a121SViresh Kumar opp-653334000 { 79bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <653334000>; 80bdb81836SMasahiro Yamada clock-latency-ns = <300>; 81bdb81836SMasahiro Yamada }; 823fc9a121SViresh Kumar opp-666667000 { 83bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 84bdb81836SMasahiro Yamada clock-latency-ns = <300>; 85bdb81836SMasahiro Yamada }; 863fc9a121SViresh Kumar opp-980000000 { 87bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <980000000>; 88bdb81836SMasahiro Yamada clock-latency-ns = <300>; 89270e0c3eSMasahiro Yamada }; 90270e0c3eSMasahiro Yamada }; 91270e0c3eSMasahiro Yamada 922f81137fSMasahiro Yamada psci { 932f81137fSMasahiro Yamada compatible = "arm,psci-1.0"; 942f81137fSMasahiro Yamada method = "smc"; 952f81137fSMasahiro Yamada }; 962f81137fSMasahiro Yamada 97270e0c3eSMasahiro Yamada clocks { 98270e0c3eSMasahiro Yamada refclk: ref { 99270e0c3eSMasahiro Yamada compatible = "fixed-clock"; 100270e0c3eSMasahiro Yamada #clock-cells = <0>; 101270e0c3eSMasahiro Yamada clock-frequency = <25000000>; 102270e0c3eSMasahiro Yamada }; 103270e0c3eSMasahiro Yamada }; 104270e0c3eSMasahiro Yamada 105b6e5ec20SMasahiro Yamada emmc_pwrseq: emmc-pwrseq { 106b6e5ec20SMasahiro Yamada compatible = "mmc-pwrseq-emmc"; 1078311ca57SMasahiro Yamada reset-gpios = <&gpio UNIPHIER_GPIO_PORT(3, 2) GPIO_ACTIVE_LOW>; 108b6e5ec20SMasahiro Yamada }; 109b6e5ec20SMasahiro Yamada 110270e0c3eSMasahiro Yamada timer { 111270e0c3eSMasahiro Yamada compatible = "arm,armv8-timer"; 1125ba95e8eSKunihiko Hayashi interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>, 1135ba95e8eSKunihiko Hayashi <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>, 1145ba95e8eSKunihiko Hayashi <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>, 1155ba95e8eSKunihiko Hayashi <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>; 116270e0c3eSMasahiro Yamada }; 117270e0c3eSMasahiro Yamada 118aa385712SMasahiro Yamada reserved-memory { 119aa385712SMasahiro Yamada #address-cells = <2>; 120aa385712SMasahiro Yamada #size-cells = <2>; 121aa385712SMasahiro Yamada ranges; 122aa385712SMasahiro Yamada 123aa385712SMasahiro Yamada secure-memory@81000000 { 124aa385712SMasahiro Yamada reg = <0x0 0x81000000 0x0 0x01000000>; 125aa385712SMasahiro Yamada no-map; 126aa385712SMasahiro Yamada }; 127aa385712SMasahiro Yamada }; 128aa385712SMasahiro Yamada 129b5027603SMasahiro Yamada soc@0 { 130270e0c3eSMasahiro Yamada compatible = "simple-bus"; 131270e0c3eSMasahiro Yamada #address-cells = <1>; 132270e0c3eSMasahiro Yamada #size-cells = <1>; 133270e0c3eSMasahiro Yamada ranges = <0 0 0 0xffffffff>; 134270e0c3eSMasahiro Yamada 135925c5c32SKunihiko Hayashi spi0: spi@54006000 { 136925c5c32SKunihiko Hayashi compatible = "socionext,uniphier-scssi"; 137925c5c32SKunihiko Hayashi status = "disabled"; 138925c5c32SKunihiko Hayashi reg = <0x54006000 0x100>; 1391a13827bSMasahiro Yamada #address-cells = <1>; 1401a13827bSMasahiro Yamada #size-cells = <0>; 1415ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 142925c5c32SKunihiko Hayashi pinctrl-names = "default"; 143925c5c32SKunihiko Hayashi pinctrl-0 = <&pinctrl_spi0>; 144925c5c32SKunihiko Hayashi clocks = <&peri_clk 11>; 145925c5c32SKunihiko Hayashi resets = <&peri_rst 11>; 146925c5c32SKunihiko Hayashi }; 147925c5c32SKunihiko Hayashi 148925c5c32SKunihiko Hayashi spi1: spi@54006100 { 149925c5c32SKunihiko Hayashi compatible = "socionext,uniphier-scssi"; 150925c5c32SKunihiko Hayashi status = "disabled"; 151925c5c32SKunihiko Hayashi reg = <0x54006100 0x100>; 1521a13827bSMasahiro Yamada #address-cells = <1>; 1531a13827bSMasahiro Yamada #size-cells = <0>; 1545ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>; 155925c5c32SKunihiko Hayashi pinctrl-names = "default"; 156925c5c32SKunihiko Hayashi pinctrl-0 = <&pinctrl_spi1>; 157fdf9c17bSKunihiko Hayashi clocks = <&peri_clk 12>; 158fdf9c17bSKunihiko Hayashi resets = <&peri_rst 12>; 159925c5c32SKunihiko Hayashi }; 160925c5c32SKunihiko Hayashi 161270e0c3eSMasahiro Yamada serial0: serial@54006800 { 162270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-uart"; 163270e0c3eSMasahiro Yamada status = "disabled"; 164270e0c3eSMasahiro Yamada reg = <0x54006800 0x40>; 1655ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 166270e0c3eSMasahiro Yamada pinctrl-names = "default"; 167270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_uart0>; 168270e0c3eSMasahiro Yamada clocks = <&peri_clk 0>; 16976c48e1eSMasahiro Yamada resets = <&peri_rst 0>; 170270e0c3eSMasahiro Yamada }; 171270e0c3eSMasahiro Yamada 172270e0c3eSMasahiro Yamada serial1: serial@54006900 { 173270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-uart"; 174270e0c3eSMasahiro Yamada status = "disabled"; 175270e0c3eSMasahiro Yamada reg = <0x54006900 0x40>; 1765ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; 177270e0c3eSMasahiro Yamada pinctrl-names = "default"; 178270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_uart1>; 179270e0c3eSMasahiro Yamada clocks = <&peri_clk 1>; 18076c48e1eSMasahiro Yamada resets = <&peri_rst 1>; 181270e0c3eSMasahiro Yamada }; 182270e0c3eSMasahiro Yamada 183270e0c3eSMasahiro Yamada serial2: serial@54006a00 { 184270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-uart"; 185270e0c3eSMasahiro Yamada status = "disabled"; 186270e0c3eSMasahiro Yamada reg = <0x54006a00 0x40>; 1875ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 188270e0c3eSMasahiro Yamada pinctrl-names = "default"; 189270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_uart2>; 190270e0c3eSMasahiro Yamada clocks = <&peri_clk 2>; 19176c48e1eSMasahiro Yamada resets = <&peri_rst 2>; 192270e0c3eSMasahiro Yamada }; 193270e0c3eSMasahiro Yamada 194270e0c3eSMasahiro Yamada serial3: serial@54006b00 { 195270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-uart"; 196270e0c3eSMasahiro Yamada status = "disabled"; 197270e0c3eSMasahiro Yamada reg = <0x54006b00 0x40>; 1985ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; 199270e0c3eSMasahiro Yamada pinctrl-names = "default"; 200270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_uart3>; 201270e0c3eSMasahiro Yamada clocks = <&peri_clk 3>; 20276c48e1eSMasahiro Yamada resets = <&peri_rst 3>; 203270e0c3eSMasahiro Yamada }; 204270e0c3eSMasahiro Yamada 205277b51e7SMasahiro Yamada gpio: gpio@55000000 { 206277b51e7SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 207277b51e7SMasahiro Yamada reg = <0x55000000 0x200>; 208277b51e7SMasahiro Yamada interrupt-parent = <&aidet>; 209277b51e7SMasahiro Yamada interrupt-controller; 210277b51e7SMasahiro Yamada #interrupt-cells = <2>; 211277b51e7SMasahiro Yamada gpio-controller; 212277b51e7SMasahiro Yamada #gpio-cells = <2>; 213277b51e7SMasahiro Yamada gpio-ranges = <&pinctrl 0 0 0>, 214277b51e7SMasahiro Yamada <&pinctrl 43 0 0>, 215277b51e7SMasahiro Yamada <&pinctrl 51 0 0>, 216277b51e7SMasahiro Yamada <&pinctrl 96 0 0>, 217277b51e7SMasahiro Yamada <&pinctrl 160 0 0>, 218277b51e7SMasahiro Yamada <&pinctrl 184 0 0>; 219277b51e7SMasahiro Yamada gpio-ranges-group-names = "gpio_range0", 220277b51e7SMasahiro Yamada "gpio_range1", 221277b51e7SMasahiro Yamada "gpio_range2", 222277b51e7SMasahiro Yamada "gpio_range3", 223277b51e7SMasahiro Yamada "gpio_range4", 224277b51e7SMasahiro Yamada "gpio_range5"; 225277b51e7SMasahiro Yamada ngpios = <200>; 226277b51e7SMasahiro Yamada socionext,interrupt-ranges = <0 48 16>, <16 154 5>, 227277b51e7SMasahiro Yamada <21 217 3>; 228270e0c3eSMasahiro Yamada }; 229270e0c3eSMasahiro Yamada 230fb21a0acSKatsuhiro Suzuki audio@56000000 { 231fb21a0acSKatsuhiro Suzuki compatible = "socionext,uniphier-ld11-aio"; 232fb21a0acSKatsuhiro Suzuki reg = <0x56000000 0x80000>; 2335ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 234fb21a0acSKatsuhiro Suzuki pinctrl-names = "default"; 235fb21a0acSKatsuhiro Suzuki pinctrl-0 = <&pinctrl_aout1>, 236fb21a0acSKatsuhiro Suzuki <&pinctrl_aoutiec1>; 237fb21a0acSKatsuhiro Suzuki clock-names = "aio"; 238fb21a0acSKatsuhiro Suzuki clocks = <&sys_clk 40>; 239fb21a0acSKatsuhiro Suzuki reset-names = "aio"; 240fb21a0acSKatsuhiro Suzuki resets = <&sys_rst 40>; 241fb21a0acSKatsuhiro Suzuki #sound-dai-cells = <1>; 2426c35921dSKatsuhiro Suzuki socionext,syscon = <&soc_glue>; 243fb21a0acSKatsuhiro Suzuki 244fb21a0acSKatsuhiro Suzuki i2s_port0: port@0 { 245fb21a0acSKatsuhiro Suzuki i2s_hdmi: endpoint { 246fb21a0acSKatsuhiro Suzuki }; 247fb21a0acSKatsuhiro Suzuki }; 248fb21a0acSKatsuhiro Suzuki 249fb21a0acSKatsuhiro Suzuki i2s_port1: port@1 { 250fb21a0acSKatsuhiro Suzuki i2s_pcmin2: endpoint { 251fb21a0acSKatsuhiro Suzuki }; 252fb21a0acSKatsuhiro Suzuki }; 253fb21a0acSKatsuhiro Suzuki 254fb21a0acSKatsuhiro Suzuki i2s_port2: port@2 { 255fb21a0acSKatsuhiro Suzuki i2s_line: endpoint { 256fb21a0acSKatsuhiro Suzuki dai-format = "i2s"; 257fb21a0acSKatsuhiro Suzuki remote-endpoint = <&evea_line>; 258fb21a0acSKatsuhiro Suzuki }; 259fb21a0acSKatsuhiro Suzuki }; 260fb21a0acSKatsuhiro Suzuki 261fb21a0acSKatsuhiro Suzuki i2s_port3: port@3 { 262fb21a0acSKatsuhiro Suzuki i2s_hpcmout1: endpoint { 263fb21a0acSKatsuhiro Suzuki }; 264fb21a0acSKatsuhiro Suzuki }; 265fb21a0acSKatsuhiro Suzuki 266fb21a0acSKatsuhiro Suzuki i2s_port4: port@4 { 267fb21a0acSKatsuhiro Suzuki i2s_hp: endpoint { 268fb21a0acSKatsuhiro Suzuki dai-format = "i2s"; 269fb21a0acSKatsuhiro Suzuki remote-endpoint = <&evea_hp>; 270fb21a0acSKatsuhiro Suzuki }; 271fb21a0acSKatsuhiro Suzuki }; 272fb21a0acSKatsuhiro Suzuki 273fb21a0acSKatsuhiro Suzuki spdif_port0: port@5 { 274fb21a0acSKatsuhiro Suzuki spdif_hiecout1: endpoint { 275fb21a0acSKatsuhiro Suzuki }; 276fb21a0acSKatsuhiro Suzuki }; 277fb21a0acSKatsuhiro Suzuki 278fb21a0acSKatsuhiro Suzuki src_port0: port@6 { 279fb21a0acSKatsuhiro Suzuki i2s_epcmout2: endpoint { 280fb21a0acSKatsuhiro Suzuki }; 281fb21a0acSKatsuhiro Suzuki }; 282fb21a0acSKatsuhiro Suzuki 283fb21a0acSKatsuhiro Suzuki src_port1: port@7 { 284fb21a0acSKatsuhiro Suzuki i2s_epcmout3: endpoint { 285fb21a0acSKatsuhiro Suzuki }; 286fb21a0acSKatsuhiro Suzuki }; 287fb21a0acSKatsuhiro Suzuki 288fb21a0acSKatsuhiro Suzuki comp_spdif_port0: port@8 { 289fb21a0acSKatsuhiro Suzuki comp_spdif_hiecout1: endpoint { 290fb21a0acSKatsuhiro Suzuki }; 291fb21a0acSKatsuhiro Suzuki }; 292fb21a0acSKatsuhiro Suzuki }; 293fb21a0acSKatsuhiro Suzuki 294fb21a0acSKatsuhiro Suzuki codec@57900000 { 295fb21a0acSKatsuhiro Suzuki compatible = "socionext,uniphier-evea"; 296fb21a0acSKatsuhiro Suzuki reg = <0x57900000 0x1000>; 297fb21a0acSKatsuhiro Suzuki clock-names = "evea", "exiv"; 298fb21a0acSKatsuhiro Suzuki clocks = <&sys_clk 41>, <&sys_clk 42>; 299fb21a0acSKatsuhiro Suzuki reset-names = "evea", "exiv", "adamv"; 300fb21a0acSKatsuhiro Suzuki resets = <&sys_rst 41>, <&sys_rst 42>, <&adamv_rst 0>; 301fb21a0acSKatsuhiro Suzuki #sound-dai-cells = <1>; 302fb21a0acSKatsuhiro Suzuki 303fb21a0acSKatsuhiro Suzuki port@0 { 304fb21a0acSKatsuhiro Suzuki evea_line: endpoint { 305fb21a0acSKatsuhiro Suzuki remote-endpoint = <&i2s_line>; 306fb21a0acSKatsuhiro Suzuki }; 307fb21a0acSKatsuhiro Suzuki }; 308fb21a0acSKatsuhiro Suzuki 309fb21a0acSKatsuhiro Suzuki port@1 { 310fb21a0acSKatsuhiro Suzuki evea_hp: endpoint { 311fb21a0acSKatsuhiro Suzuki remote-endpoint = <&i2s_hp>; 312fb21a0acSKatsuhiro Suzuki }; 313fb21a0acSKatsuhiro Suzuki }; 314fb21a0acSKatsuhiro Suzuki }; 315fb21a0acSKatsuhiro Suzuki 3165ebfa90bSKunihiko Hayashi syscon@57920000 { 317178b3568SKatsuhiro Suzuki compatible = "socionext,uniphier-ld11-adamv", 318178b3568SKatsuhiro Suzuki "simple-mfd", "syscon"; 319178b3568SKatsuhiro Suzuki reg = <0x57920000 0x1000>; 320178b3568SKatsuhiro Suzuki 3215ebfa90bSKunihiko Hayashi adamv_rst: reset-controller { 322178b3568SKatsuhiro Suzuki compatible = "socionext,uniphier-ld11-adamv-reset"; 323178b3568SKatsuhiro Suzuki #reset-cells = <1>; 324178b3568SKatsuhiro Suzuki }; 325178b3568SKatsuhiro Suzuki }; 326178b3568SKatsuhiro Suzuki 327270e0c3eSMasahiro Yamada i2c0: i2c@58780000 { 328270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 329270e0c3eSMasahiro Yamada status = "disabled"; 330270e0c3eSMasahiro Yamada reg = <0x58780000 0x80>; 331270e0c3eSMasahiro Yamada #address-cells = <1>; 332270e0c3eSMasahiro Yamada #size-cells = <0>; 3335ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; 334270e0c3eSMasahiro Yamada pinctrl-names = "default"; 335270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c0>; 336270e0c3eSMasahiro Yamada clocks = <&peri_clk 4>; 33776c48e1eSMasahiro Yamada resets = <&peri_rst 4>; 338270e0c3eSMasahiro Yamada clock-frequency = <100000>; 339270e0c3eSMasahiro Yamada }; 340270e0c3eSMasahiro Yamada 341270e0c3eSMasahiro Yamada i2c1: i2c@58781000 { 342270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 343270e0c3eSMasahiro Yamada status = "disabled"; 344270e0c3eSMasahiro Yamada reg = <0x58781000 0x80>; 345270e0c3eSMasahiro Yamada #address-cells = <1>; 346270e0c3eSMasahiro Yamada #size-cells = <0>; 3475ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; 348270e0c3eSMasahiro Yamada pinctrl-names = "default"; 349270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c1>; 350270e0c3eSMasahiro Yamada clocks = <&peri_clk 5>; 35176c48e1eSMasahiro Yamada resets = <&peri_rst 5>; 352270e0c3eSMasahiro Yamada clock-frequency = <100000>; 353270e0c3eSMasahiro Yamada }; 354270e0c3eSMasahiro Yamada 355270e0c3eSMasahiro Yamada i2c2: i2c@58782000 { 356270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 357270e0c3eSMasahiro Yamada reg = <0x58782000 0x80>; 358270e0c3eSMasahiro Yamada #address-cells = <1>; 359270e0c3eSMasahiro Yamada #size-cells = <0>; 3605ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 361270e0c3eSMasahiro Yamada clocks = <&peri_clk 6>; 36276c48e1eSMasahiro Yamada resets = <&peri_rst 6>; 363270e0c3eSMasahiro Yamada clock-frequency = <400000>; 364270e0c3eSMasahiro Yamada }; 365270e0c3eSMasahiro Yamada 366270e0c3eSMasahiro Yamada i2c3: i2c@58783000 { 367270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 368270e0c3eSMasahiro Yamada status = "disabled"; 369270e0c3eSMasahiro Yamada reg = <0x58783000 0x80>; 370270e0c3eSMasahiro Yamada #address-cells = <1>; 371270e0c3eSMasahiro Yamada #size-cells = <0>; 3725ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; 373270e0c3eSMasahiro Yamada pinctrl-names = "default"; 374270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c3>; 375270e0c3eSMasahiro Yamada clocks = <&peri_clk 7>; 37676c48e1eSMasahiro Yamada resets = <&peri_rst 7>; 377270e0c3eSMasahiro Yamada clock-frequency = <100000>; 378270e0c3eSMasahiro Yamada }; 379270e0c3eSMasahiro Yamada 380270e0c3eSMasahiro Yamada i2c4: i2c@58784000 { 381270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 382270e0c3eSMasahiro Yamada status = "disabled"; 383270e0c3eSMasahiro Yamada reg = <0x58784000 0x80>; 384270e0c3eSMasahiro Yamada #address-cells = <1>; 385270e0c3eSMasahiro Yamada #size-cells = <0>; 3865ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 387270e0c3eSMasahiro Yamada pinctrl-names = "default"; 388270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c4>; 389270e0c3eSMasahiro Yamada clocks = <&peri_clk 8>; 39076c48e1eSMasahiro Yamada resets = <&peri_rst 8>; 391270e0c3eSMasahiro Yamada clock-frequency = <100000>; 392270e0c3eSMasahiro Yamada }; 393270e0c3eSMasahiro Yamada 394270e0c3eSMasahiro Yamada i2c5: i2c@58785000 { 395270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 396270e0c3eSMasahiro Yamada reg = <0x58785000 0x80>; 397270e0c3eSMasahiro Yamada #address-cells = <1>; 398270e0c3eSMasahiro Yamada #size-cells = <0>; 3995ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 400270e0c3eSMasahiro Yamada clocks = <&peri_clk 9>; 40176c48e1eSMasahiro Yamada resets = <&peri_rst 9>; 402270e0c3eSMasahiro Yamada clock-frequency = <400000>; 403270e0c3eSMasahiro Yamada }; 404270e0c3eSMasahiro Yamada 405270e0c3eSMasahiro Yamada system_bus: system-bus@58c00000 { 406270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-system-bus"; 407270e0c3eSMasahiro Yamada status = "disabled"; 408270e0c3eSMasahiro Yamada reg = <0x58c00000 0x400>; 409270e0c3eSMasahiro Yamada #address-cells = <2>; 410270e0c3eSMasahiro Yamada #size-cells = <1>; 411270e0c3eSMasahiro Yamada pinctrl-names = "default"; 412270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_system_bus>; 413270e0c3eSMasahiro Yamada }; 414270e0c3eSMasahiro Yamada 415b10ee7e3SMasahiro Yamada smpctrl@59801000 { 416270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-smpctrl"; 417270e0c3eSMasahiro Yamada reg = <0x59801000 0x400>; 418270e0c3eSMasahiro Yamada }; 419270e0c3eSMasahiro Yamada 4205ebfa90bSKunihiko Hayashi syscon@59810000 { 4218f32b812SMasahiro Yamada compatible = "socionext,uniphier-ld11-sdctrl", 4228f32b812SMasahiro Yamada "simple-mfd", "syscon"; 4238f32b812SMasahiro Yamada reg = <0x59810000 0x400>; 4248f32b812SMasahiro Yamada 4255ebfa90bSKunihiko Hayashi sd_rst: reset-controller { 4268f32b812SMasahiro Yamada compatible = "socionext,uniphier-ld11-sd-reset"; 4278f32b812SMasahiro Yamada #reset-cells = <1>; 4288f32b812SMasahiro Yamada }; 4298f32b812SMasahiro Yamada }; 4308f32b812SMasahiro Yamada 4315ebfa90bSKunihiko Hayashi syscon@59820000 { 432fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld11-perictrl", 433270e0c3eSMasahiro Yamada "simple-mfd", "syscon"; 434270e0c3eSMasahiro Yamada reg = <0x59820000 0x200>; 435270e0c3eSMasahiro Yamada 4365ebfa90bSKunihiko Hayashi peri_clk: clock-controller { 437270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-peri-clock"; 438270e0c3eSMasahiro Yamada #clock-cells = <1>; 439270e0c3eSMasahiro Yamada }; 440270e0c3eSMasahiro Yamada 4415ebfa90bSKunihiko Hayashi peri_rst: reset-controller { 442270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-peri-reset"; 443270e0c3eSMasahiro Yamada #reset-cells = <1>; 444270e0c3eSMasahiro Yamada }; 445270e0c3eSMasahiro Yamada }; 446270e0c3eSMasahiro Yamada 447bb3f4672SMasahiro Yamada emmc: mmc@5a000000 { 4483a93cc26SMasahiro Yamada compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; 4493a93cc26SMasahiro Yamada reg = <0x5a000000 0x400>; 4505ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 4519c0a9700SMasahiro Yamada pinctrl-names = "default"; 4529c0a9700SMasahiro Yamada pinctrl-0 = <&pinctrl_emmc>; 4533a93cc26SMasahiro Yamada clocks = <&sys_clk 4>; 45476c48e1eSMasahiro Yamada resets = <&sys_rst 4>; 4553a93cc26SMasahiro Yamada bus-width = <8>; 4563a93cc26SMasahiro Yamada mmc-ddr-1_8v; 4573a93cc26SMasahiro Yamada mmc-hs200-1_8v; 458b6e5ec20SMasahiro Yamada mmc-pwrseq = <&emmc_pwrseq>; 459f4e5200fSMasahiro Yamada cdns,phy-input-delay-legacy = <9>; 460ba6f7011SMasahiro Yamada cdns,phy-input-delay-mmc-highspeed = <2>; 461ba6f7011SMasahiro Yamada cdns,phy-input-delay-mmc-ddr = <3>; 462e345ededSMasahiro Yamada cdns,phy-dll-delay-sdclk = <21>; 463e345ededSMasahiro Yamada cdns,phy-dll-delay-sdclk-hsmmc = <21>; 4643a93cc26SMasahiro Yamada }; 4653a93cc26SMasahiro Yamada 466270e0c3eSMasahiro Yamada usb0: usb@5a800100 { 467270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ehci", "generic-ehci"; 468270e0c3eSMasahiro Yamada status = "disabled"; 469270e0c3eSMasahiro Yamada reg = <0x5a800100 0x100>; 4705ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 471270e0c3eSMasahiro Yamada pinctrl-names = "default"; 472270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_usb0>; 473deaa5519SMasahiro Yamada clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>, 474deaa5519SMasahiro Yamada <&mio_clk 12>; 4757a201e31SMasahiro Yamada resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>, 4767a201e31SMasahiro Yamada <&mio_rst 12>; 477546cba06SKunihiko Hayashi phy-names = "usb"; 478546cba06SKunihiko Hayashi phys = <&usb_phy0>; 47931f1961dSKunihiko Hayashi has-transaction-translator; 480270e0c3eSMasahiro Yamada }; 481270e0c3eSMasahiro Yamada 482270e0c3eSMasahiro Yamada usb1: usb@5a810100 { 483270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ehci", "generic-ehci"; 484270e0c3eSMasahiro Yamada status = "disabled"; 485270e0c3eSMasahiro Yamada reg = <0x5a810100 0x100>; 4865ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>; 487270e0c3eSMasahiro Yamada pinctrl-names = "default"; 488270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_usb1>; 489deaa5519SMasahiro Yamada clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>, 490deaa5519SMasahiro Yamada <&mio_clk 13>; 4917a201e31SMasahiro Yamada resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>, 4927a201e31SMasahiro Yamada <&mio_rst 13>; 493546cba06SKunihiko Hayashi phy-names = "usb"; 494546cba06SKunihiko Hayashi phys = <&usb_phy1>; 49531f1961dSKunihiko Hayashi has-transaction-translator; 496270e0c3eSMasahiro Yamada }; 497270e0c3eSMasahiro Yamada 498270e0c3eSMasahiro Yamada usb2: usb@5a820100 { 499270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ehci", "generic-ehci"; 500270e0c3eSMasahiro Yamada status = "disabled"; 501270e0c3eSMasahiro Yamada reg = <0x5a820100 0x100>; 5025ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>; 503270e0c3eSMasahiro Yamada pinctrl-names = "default"; 504270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_usb2>; 505deaa5519SMasahiro Yamada clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 10>, 506deaa5519SMasahiro Yamada <&mio_clk 14>; 5077a201e31SMasahiro Yamada resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>, 5087a201e31SMasahiro Yamada <&mio_rst 14>; 509546cba06SKunihiko Hayashi phy-names = "usb"; 510546cba06SKunihiko Hayashi phys = <&usb_phy2>; 51131f1961dSKunihiko Hayashi has-transaction-translator; 512270e0c3eSMasahiro Yamada }; 513270e0c3eSMasahiro Yamada 5145ebfa90bSKunihiko Hayashi syscon@5b3e0000 { 515fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld11-mioctrl", 516270e0c3eSMasahiro Yamada "simple-mfd", "syscon"; 517270e0c3eSMasahiro Yamada reg = <0x5b3e0000 0x800>; 518270e0c3eSMasahiro Yamada 5195ebfa90bSKunihiko Hayashi mio_clk: clock-controller { 520270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-mio-clock"; 521270e0c3eSMasahiro Yamada #clock-cells = <1>; 522270e0c3eSMasahiro Yamada }; 523270e0c3eSMasahiro Yamada 5245ebfa90bSKunihiko Hayashi mio_rst: reset-controller { 525270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-mio-reset"; 526270e0c3eSMasahiro Yamada #reset-cells = <1>; 527270e0c3eSMasahiro Yamada resets = <&sys_rst 7>; 528270e0c3eSMasahiro Yamada }; 529270e0c3eSMasahiro Yamada }; 530270e0c3eSMasahiro Yamada 5315ebfa90bSKunihiko Hayashi soc_glue: syscon@5f800000 { 532fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld11-soc-glue", 533270e0c3eSMasahiro Yamada "simple-mfd", "syscon"; 534270e0c3eSMasahiro Yamada reg = <0x5f800000 0x2000>; 535270e0c3eSMasahiro Yamada 536270e0c3eSMasahiro Yamada pinctrl: pinctrl { 537270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-pinctrl"; 538270e0c3eSMasahiro Yamada }; 539546cba06SKunihiko Hayashi 5405ebfa90bSKunihiko Hayashi usb-hub { 541546cba06SKunihiko Hayashi compatible = "socionext,uniphier-ld11-usb2-phy"; 542546cba06SKunihiko Hayashi #address-cells = <1>; 543546cba06SKunihiko Hayashi #size-cells = <0>; 544546cba06SKunihiko Hayashi 545546cba06SKunihiko Hayashi usb_phy0: phy@0 { 546546cba06SKunihiko Hayashi reg = <0>; 547546cba06SKunihiko Hayashi #phy-cells = <0>; 548546cba06SKunihiko Hayashi }; 549546cba06SKunihiko Hayashi 550546cba06SKunihiko Hayashi usb_phy1: phy@1 { 551546cba06SKunihiko Hayashi reg = <1>; 552546cba06SKunihiko Hayashi #phy-cells = <0>; 553546cba06SKunihiko Hayashi }; 554546cba06SKunihiko Hayashi 555546cba06SKunihiko Hayashi usb_phy2: phy@2 { 556546cba06SKunihiko Hayashi reg = <2>; 557546cba06SKunihiko Hayashi #phy-cells = <0>; 558546cba06SKunihiko Hayashi }; 559546cba06SKunihiko Hayashi }; 560270e0c3eSMasahiro Yamada }; 561270e0c3eSMasahiro Yamada 5625ebfa90bSKunihiko Hayashi syscon@5f900000 { 563f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-ld11-soc-glue-debug", 564*f4d624a1SKunihiko Hayashi "simple-mfd", "syscon"; 565f45d6207SKunihiko Hayashi reg = <0x5f900000 0x2000>; 566f05851e1SKeiji Hayashibara #address-cells = <1>; 567f05851e1SKeiji Hayashibara #size-cells = <1>; 568f05851e1SKeiji Hayashibara ranges = <0 0x5f900000 0x2000>; 569f05851e1SKeiji Hayashibara 570f05851e1SKeiji Hayashibara efuse@100 { 571f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 572f05851e1SKeiji Hayashibara reg = <0x100 0x28>; 573f05851e1SKeiji Hayashibara }; 574f05851e1SKeiji Hayashibara 575f05851e1SKeiji Hayashibara efuse@200 { 576f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 577f05851e1SKeiji Hayashibara reg = <0x200 0x68>; 578f05851e1SKeiji Hayashibara }; 579f05851e1SKeiji Hayashibara }; 580f05851e1SKeiji Hayashibara 581f03b998dSKunihiko Hayashi xdmac: dma-controller@5fc10000 { 582f03b998dSKunihiko Hayashi compatible = "socionext,uniphier-xdmac"; 583f03b998dSKunihiko Hayashi reg = <0x5fc10000 0x5300>; 5845ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 585f03b998dSKunihiko Hayashi dma-channels = <16>; 586f03b998dSKunihiko Hayashi #dma-cells = <2>; 587f03b998dSKunihiko Hayashi }; 588f03b998dSKunihiko Hayashi 5899ddc285bSMasahiro Yamada aidet: interrupt-controller@5fc20000 { 5903dfc6e98SMasahiro Yamada compatible = "socionext,uniphier-ld11-aidet"; 5913dfc6e98SMasahiro Yamada reg = <0x5fc20000 0x200>; 5923dfc6e98SMasahiro Yamada interrupt-controller; 5933dfc6e98SMasahiro Yamada #interrupt-cells = <2>; 5943dfc6e98SMasahiro Yamada }; 5953dfc6e98SMasahiro Yamada 596270e0c3eSMasahiro Yamada gic: interrupt-controller@5fe00000 { 597270e0c3eSMasahiro Yamada compatible = "arm,gic-v3"; 598270e0c3eSMasahiro Yamada reg = <0x5fe00000 0x10000>, /* GICD */ 599270e0c3eSMasahiro Yamada <0x5fe40000 0x80000>; /* GICR */ 600270e0c3eSMasahiro Yamada interrupt-controller; 601270e0c3eSMasahiro Yamada #interrupt-cells = <3>; 6025ba95e8eSKunihiko Hayashi interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 603270e0c3eSMasahiro Yamada }; 604270e0c3eSMasahiro Yamada 6055ebfa90bSKunihiko Hayashi syscon@61840000 { 606270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-sysctrl", 607270e0c3eSMasahiro Yamada "simple-mfd", "syscon"; 6081ef64af8SMasahiro Yamada reg = <0x61840000 0x10000>; 609270e0c3eSMasahiro Yamada 6105ebfa90bSKunihiko Hayashi sys_clk: clock-controller { 611270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-clock"; 612270e0c3eSMasahiro Yamada #clock-cells = <1>; 613270e0c3eSMasahiro Yamada }; 614270e0c3eSMasahiro Yamada 6155ebfa90bSKunihiko Hayashi sys_rst: reset-controller { 616270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-reset"; 617270e0c3eSMasahiro Yamada #reset-cells = <1>; 618270e0c3eSMasahiro Yamada }; 6194c4c960aSKeiji Hayashibara 6204c4c960aSKeiji Hayashibara watchdog { 6214c4c960aSKeiji Hayashibara compatible = "socionext,uniphier-wdt"; 6224c4c960aSKeiji Hayashibara }; 623270e0c3eSMasahiro Yamada }; 624e5aefb38SMasahiro Yamada 625c73730eeSKunihiko Hayashi eth: ethernet@65000000 { 626c73730eeSKunihiko Hayashi compatible = "socionext,uniphier-ld11-ave4"; 627c73730eeSKunihiko Hayashi status = "disabled"; 628c73730eeSKunihiko Hayashi reg = <0x65000000 0x8500>; 6295ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; 630a34a464dSKunihiko Hayashi clock-names = "ether"; 631c73730eeSKunihiko Hayashi clocks = <&sys_clk 6>; 632a34a464dSKunihiko Hayashi reset-names = "ether"; 633c73730eeSKunihiko Hayashi resets = <&sys_rst 6>; 634b076ff8bSKunihiko Hayashi phy-mode = "internal"; 635c73730eeSKunihiko Hayashi local-mac-address = [00 00 00 00 00 00]; 636b076ff8bSKunihiko Hayashi socionext,syscon-phy-mode = <&soc_glue 0>; 637c73730eeSKunihiko Hayashi 638c73730eeSKunihiko Hayashi mdio: mdio { 639c73730eeSKunihiko Hayashi #address-cells = <1>; 640c73730eeSKunihiko Hayashi #size-cells = <0>; 641c73730eeSKunihiko Hayashi }; 642c73730eeSKunihiko Hayashi }; 643c73730eeSKunihiko Hayashi 644fcb0e53cSMasahiro Yamada nand: nand-controller@68000000 { 645e5aefb38SMasahiro Yamada compatible = "socionext,uniphier-denali-nand-v5b"; 646e5aefb38SMasahiro Yamada status = "disabled"; 647e5aefb38SMasahiro Yamada reg-names = "nand_data", "denali_reg"; 648e5aefb38SMasahiro Yamada reg = <0x68000000 0x20>, <0x68100000 0x1000>; 64953c580c1SMasahiro Yamada #address-cells = <1>; 65053c580c1SMasahiro Yamada #size-cells = <0>; 6515ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 652e5aefb38SMasahiro Yamada pinctrl-names = "default"; 653e5aefb38SMasahiro Yamada pinctrl-0 = <&pinctrl_nand>; 654bae120f8SMasahiro Yamada clock-names = "nand", "nand_x", "ecc"; 655bae120f8SMasahiro Yamada clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; 656e98d5023SMasahiro Yamada reset-names = "nand", "reg"; 657e98d5023SMasahiro Yamada resets = <&sys_rst 2>, <&sys_rst 2>; 658e5aefb38SMasahiro Yamada }; 659270e0c3eSMasahiro Yamada }; 660270e0c3eSMasahiro Yamada}; 661270e0c3eSMasahiro Yamada 6625740ea4eSMasahiro Yamada#include "uniphier-pinctrl.dtsi" 663fb21a0acSKatsuhiro Suzuki 664fb21a0acSKatsuhiro Suzuki&pinctrl_aoutiec1 { 665fb21a0acSKatsuhiro Suzuki drive-strength = <4>; /* default: 4mA */ 666fb21a0acSKatsuhiro Suzuki 667fb21a0acSKatsuhiro Suzuki ao1arc { 668fb21a0acSKatsuhiro Suzuki pins = "AO1ARC"; 669fb21a0acSKatsuhiro Suzuki drive-strength = <8>; /* 8mA */ 670fb21a0acSKatsuhiro Suzuki }; 671fb21a0acSKatsuhiro Suzuki}; 672