1270e0c3eSMasahiro Yamada/* 2270e0c3eSMasahiro Yamada * Device Tree Source for UniPhier LD11 SoC 3270e0c3eSMasahiro Yamada * 4270e0c3eSMasahiro Yamada * Copyright (C) 2016 Socionext Inc. 5270e0c3eSMasahiro Yamada * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 6270e0c3eSMasahiro Yamada * 712301cffSMasahiro Yamada * SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8270e0c3eSMasahiro Yamada */ 9270e0c3eSMasahiro Yamada 1079d4be39SMasahiro Yamada/memreserve/ 0x80000000 0x02000000; 11270e0c3eSMasahiro Yamada 12270e0c3eSMasahiro Yamada/ { 13270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11"; 14270e0c3eSMasahiro Yamada #address-cells = <2>; 15270e0c3eSMasahiro Yamada #size-cells = <2>; 16270e0c3eSMasahiro Yamada interrupt-parent = <&gic>; 17270e0c3eSMasahiro Yamada 18270e0c3eSMasahiro Yamada cpus { 19270e0c3eSMasahiro Yamada #address-cells = <2>; 20270e0c3eSMasahiro Yamada #size-cells = <0>; 21270e0c3eSMasahiro Yamada 22270e0c3eSMasahiro Yamada cpu-map { 23270e0c3eSMasahiro Yamada cluster0 { 24270e0c3eSMasahiro Yamada core0 { 25270e0c3eSMasahiro Yamada cpu = <&cpu0>; 26270e0c3eSMasahiro Yamada }; 27270e0c3eSMasahiro Yamada core1 { 28270e0c3eSMasahiro Yamada cpu = <&cpu1>; 29270e0c3eSMasahiro Yamada }; 30270e0c3eSMasahiro Yamada }; 31270e0c3eSMasahiro Yamada }; 32270e0c3eSMasahiro Yamada 33270e0c3eSMasahiro Yamada cpu0: cpu@0 { 34270e0c3eSMasahiro Yamada device_type = "cpu"; 35270e0c3eSMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 36270e0c3eSMasahiro Yamada reg = <0 0x000>; 37bdb81836SMasahiro Yamada clocks = <&sys_clk 33>; 382f81137fSMasahiro Yamada enable-method = "psci"; 39bdb81836SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 40270e0c3eSMasahiro Yamada }; 41270e0c3eSMasahiro Yamada 42270e0c3eSMasahiro Yamada cpu1: cpu@1 { 43270e0c3eSMasahiro Yamada device_type = "cpu"; 44270e0c3eSMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 45270e0c3eSMasahiro Yamada reg = <0 0x001>; 46bdb81836SMasahiro Yamada clocks = <&sys_clk 33>; 472f81137fSMasahiro Yamada enable-method = "psci"; 48bdb81836SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 49bdb81836SMasahiro Yamada }; 50bdb81836SMasahiro Yamada }; 51bdb81836SMasahiro Yamada 52bdb81836SMasahiro Yamada cluster0_opp: opp_table { 53bdb81836SMasahiro Yamada compatible = "operating-points-v2"; 54bdb81836SMasahiro Yamada opp-shared; 55bdb81836SMasahiro Yamada 563fc9a121SViresh Kumar opp-245000000 { 57bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <245000000>; 58bdb81836SMasahiro Yamada clock-latency-ns = <300>; 59bdb81836SMasahiro Yamada }; 603fc9a121SViresh Kumar opp-250000000 { 61bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 62bdb81836SMasahiro Yamada clock-latency-ns = <300>; 63bdb81836SMasahiro Yamada }; 643fc9a121SViresh Kumar opp-490000000 { 65bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <490000000>; 66bdb81836SMasahiro Yamada clock-latency-ns = <300>; 67bdb81836SMasahiro Yamada }; 683fc9a121SViresh Kumar opp-500000000 { 69bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 70bdb81836SMasahiro Yamada clock-latency-ns = <300>; 71bdb81836SMasahiro Yamada }; 723fc9a121SViresh Kumar opp-653334000 { 73bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <653334000>; 74bdb81836SMasahiro Yamada clock-latency-ns = <300>; 75bdb81836SMasahiro Yamada }; 763fc9a121SViresh Kumar opp-666667000 { 77bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 78bdb81836SMasahiro Yamada clock-latency-ns = <300>; 79bdb81836SMasahiro Yamada }; 803fc9a121SViresh Kumar opp-980000000 { 81bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <980000000>; 82bdb81836SMasahiro Yamada clock-latency-ns = <300>; 83270e0c3eSMasahiro Yamada }; 84270e0c3eSMasahiro Yamada }; 85270e0c3eSMasahiro Yamada 862f81137fSMasahiro Yamada psci { 872f81137fSMasahiro Yamada compatible = "arm,psci-1.0"; 882f81137fSMasahiro Yamada method = "smc"; 892f81137fSMasahiro Yamada }; 902f81137fSMasahiro Yamada 91270e0c3eSMasahiro Yamada clocks { 92270e0c3eSMasahiro Yamada refclk: ref { 93270e0c3eSMasahiro Yamada compatible = "fixed-clock"; 94270e0c3eSMasahiro Yamada #clock-cells = <0>; 95270e0c3eSMasahiro Yamada clock-frequency = <25000000>; 96270e0c3eSMasahiro Yamada }; 97270e0c3eSMasahiro Yamada }; 98270e0c3eSMasahiro Yamada 99270e0c3eSMasahiro Yamada timer { 100270e0c3eSMasahiro Yamada compatible = "arm,armv8-timer"; 101270e0c3eSMasahiro Yamada interrupts = <1 13 4>, 102270e0c3eSMasahiro Yamada <1 14 4>, 103270e0c3eSMasahiro Yamada <1 11 4>, 104270e0c3eSMasahiro Yamada <1 10 4>; 105270e0c3eSMasahiro Yamada }; 106270e0c3eSMasahiro Yamada 107b5027603SMasahiro Yamada soc@0 { 108270e0c3eSMasahiro Yamada compatible = "simple-bus"; 109270e0c3eSMasahiro Yamada #address-cells = <1>; 110270e0c3eSMasahiro Yamada #size-cells = <1>; 111270e0c3eSMasahiro Yamada ranges = <0 0 0 0xffffffff>; 112270e0c3eSMasahiro Yamada 113270e0c3eSMasahiro Yamada serial0: serial@54006800 { 114270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-uart"; 115270e0c3eSMasahiro Yamada status = "disabled"; 116270e0c3eSMasahiro Yamada reg = <0x54006800 0x40>; 117270e0c3eSMasahiro Yamada interrupts = <0 33 4>; 118270e0c3eSMasahiro Yamada pinctrl-names = "default"; 119270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_uart0>; 120270e0c3eSMasahiro Yamada clocks = <&peri_clk 0>; 121270e0c3eSMasahiro Yamada }; 122270e0c3eSMasahiro Yamada 123270e0c3eSMasahiro Yamada serial1: serial@54006900 { 124270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-uart"; 125270e0c3eSMasahiro Yamada status = "disabled"; 126270e0c3eSMasahiro Yamada reg = <0x54006900 0x40>; 127270e0c3eSMasahiro Yamada interrupts = <0 35 4>; 128270e0c3eSMasahiro Yamada pinctrl-names = "default"; 129270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_uart1>; 130270e0c3eSMasahiro Yamada clocks = <&peri_clk 1>; 131270e0c3eSMasahiro Yamada }; 132270e0c3eSMasahiro Yamada 133270e0c3eSMasahiro Yamada serial2: serial@54006a00 { 134270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-uart"; 135270e0c3eSMasahiro Yamada status = "disabled"; 136270e0c3eSMasahiro Yamada reg = <0x54006a00 0x40>; 137270e0c3eSMasahiro Yamada interrupts = <0 37 4>; 138270e0c3eSMasahiro Yamada pinctrl-names = "default"; 139270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_uart2>; 140270e0c3eSMasahiro Yamada clocks = <&peri_clk 2>; 141270e0c3eSMasahiro Yamada }; 142270e0c3eSMasahiro Yamada 143270e0c3eSMasahiro Yamada serial3: serial@54006b00 { 144270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-uart"; 145270e0c3eSMasahiro Yamada status = "disabled"; 146270e0c3eSMasahiro Yamada reg = <0x54006b00 0x40>; 147270e0c3eSMasahiro Yamada interrupts = <0 177 4>; 148270e0c3eSMasahiro Yamada pinctrl-names = "default"; 149270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_uart3>; 150270e0c3eSMasahiro Yamada clocks = <&peri_clk 3>; 151270e0c3eSMasahiro Yamada }; 152270e0c3eSMasahiro Yamada 153178b3568SKatsuhiro Suzuki adamv@57920000 { 154178b3568SKatsuhiro Suzuki compatible = "socionext,uniphier-ld11-adamv", 155178b3568SKatsuhiro Suzuki "simple-mfd", "syscon"; 156178b3568SKatsuhiro Suzuki reg = <0x57920000 0x1000>; 157178b3568SKatsuhiro Suzuki 158178b3568SKatsuhiro Suzuki adamv_rst: reset { 159178b3568SKatsuhiro Suzuki compatible = "socionext,uniphier-ld11-adamv-reset"; 160178b3568SKatsuhiro Suzuki #reset-cells = <1>; 161178b3568SKatsuhiro Suzuki }; 162178b3568SKatsuhiro Suzuki }; 163178b3568SKatsuhiro Suzuki 164270e0c3eSMasahiro Yamada i2c0: i2c@58780000 { 165270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 166270e0c3eSMasahiro Yamada status = "disabled"; 167270e0c3eSMasahiro Yamada reg = <0x58780000 0x80>; 168270e0c3eSMasahiro Yamada #address-cells = <1>; 169270e0c3eSMasahiro Yamada #size-cells = <0>; 170270e0c3eSMasahiro Yamada interrupts = <0 41 4>; 171270e0c3eSMasahiro Yamada pinctrl-names = "default"; 172270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c0>; 173270e0c3eSMasahiro Yamada clocks = <&peri_clk 4>; 174270e0c3eSMasahiro Yamada clock-frequency = <100000>; 175270e0c3eSMasahiro Yamada }; 176270e0c3eSMasahiro Yamada 177270e0c3eSMasahiro Yamada i2c1: i2c@58781000 { 178270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 179270e0c3eSMasahiro Yamada status = "disabled"; 180270e0c3eSMasahiro Yamada reg = <0x58781000 0x80>; 181270e0c3eSMasahiro Yamada #address-cells = <1>; 182270e0c3eSMasahiro Yamada #size-cells = <0>; 183270e0c3eSMasahiro Yamada interrupts = <0 42 4>; 184270e0c3eSMasahiro Yamada pinctrl-names = "default"; 185270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c1>; 186270e0c3eSMasahiro Yamada clocks = <&peri_clk 5>; 187270e0c3eSMasahiro Yamada clock-frequency = <100000>; 188270e0c3eSMasahiro Yamada }; 189270e0c3eSMasahiro Yamada 190270e0c3eSMasahiro Yamada i2c2: i2c@58782000 { 191270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 192270e0c3eSMasahiro Yamada reg = <0x58782000 0x80>; 193270e0c3eSMasahiro Yamada #address-cells = <1>; 194270e0c3eSMasahiro Yamada #size-cells = <0>; 195270e0c3eSMasahiro Yamada interrupts = <0 43 4>; 196270e0c3eSMasahiro Yamada clocks = <&peri_clk 6>; 197270e0c3eSMasahiro Yamada clock-frequency = <400000>; 198270e0c3eSMasahiro Yamada }; 199270e0c3eSMasahiro Yamada 200270e0c3eSMasahiro Yamada i2c3: i2c@58783000 { 201270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 202270e0c3eSMasahiro Yamada status = "disabled"; 203270e0c3eSMasahiro Yamada reg = <0x58783000 0x80>; 204270e0c3eSMasahiro Yamada #address-cells = <1>; 205270e0c3eSMasahiro Yamada #size-cells = <0>; 206270e0c3eSMasahiro Yamada interrupts = <0 44 4>; 207270e0c3eSMasahiro Yamada pinctrl-names = "default"; 208270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c3>; 209270e0c3eSMasahiro Yamada clocks = <&peri_clk 7>; 210270e0c3eSMasahiro Yamada clock-frequency = <100000>; 211270e0c3eSMasahiro Yamada }; 212270e0c3eSMasahiro Yamada 213270e0c3eSMasahiro Yamada i2c4: i2c@58784000 { 214270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 215270e0c3eSMasahiro Yamada status = "disabled"; 216270e0c3eSMasahiro Yamada reg = <0x58784000 0x80>; 217270e0c3eSMasahiro Yamada #address-cells = <1>; 218270e0c3eSMasahiro Yamada #size-cells = <0>; 219270e0c3eSMasahiro Yamada interrupts = <0 45 4>; 220270e0c3eSMasahiro Yamada pinctrl-names = "default"; 221270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c4>; 222270e0c3eSMasahiro Yamada clocks = <&peri_clk 8>; 223270e0c3eSMasahiro Yamada clock-frequency = <100000>; 224270e0c3eSMasahiro Yamada }; 225270e0c3eSMasahiro Yamada 226270e0c3eSMasahiro Yamada i2c5: i2c@58785000 { 227270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 228270e0c3eSMasahiro Yamada reg = <0x58785000 0x80>; 229270e0c3eSMasahiro Yamada #address-cells = <1>; 230270e0c3eSMasahiro Yamada #size-cells = <0>; 231270e0c3eSMasahiro Yamada interrupts = <0 25 4>; 232270e0c3eSMasahiro Yamada clocks = <&peri_clk 9>; 233270e0c3eSMasahiro Yamada clock-frequency = <400000>; 234270e0c3eSMasahiro Yamada }; 235270e0c3eSMasahiro Yamada 236270e0c3eSMasahiro Yamada system_bus: system-bus@58c00000 { 237270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-system-bus"; 238270e0c3eSMasahiro Yamada status = "disabled"; 239270e0c3eSMasahiro Yamada reg = <0x58c00000 0x400>; 240270e0c3eSMasahiro Yamada #address-cells = <2>; 241270e0c3eSMasahiro Yamada #size-cells = <1>; 242270e0c3eSMasahiro Yamada pinctrl-names = "default"; 243270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_system_bus>; 244270e0c3eSMasahiro Yamada }; 245270e0c3eSMasahiro Yamada 246b10ee7e3SMasahiro Yamada smpctrl@59801000 { 247270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-smpctrl"; 248270e0c3eSMasahiro Yamada reg = <0x59801000 0x400>; 249270e0c3eSMasahiro Yamada }; 250270e0c3eSMasahiro Yamada 2518f32b812SMasahiro Yamada sdctrl@59810000 { 2528f32b812SMasahiro Yamada compatible = "socionext,uniphier-ld11-sdctrl", 2538f32b812SMasahiro Yamada "simple-mfd", "syscon"; 2548f32b812SMasahiro Yamada reg = <0x59810000 0x400>; 2558f32b812SMasahiro Yamada 2568f32b812SMasahiro Yamada sd_rst: reset { 2578f32b812SMasahiro Yamada compatible = "socionext,uniphier-ld11-sd-reset"; 2588f32b812SMasahiro Yamada #reset-cells = <1>; 2598f32b812SMasahiro Yamada }; 2608f32b812SMasahiro Yamada }; 2618f32b812SMasahiro Yamada 262270e0c3eSMasahiro Yamada perictrl@59820000 { 263fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld11-perictrl", 264270e0c3eSMasahiro Yamada "simple-mfd", "syscon"; 265270e0c3eSMasahiro Yamada reg = <0x59820000 0x200>; 266270e0c3eSMasahiro Yamada 267270e0c3eSMasahiro Yamada peri_clk: clock { 268270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-peri-clock"; 269270e0c3eSMasahiro Yamada #clock-cells = <1>; 270270e0c3eSMasahiro Yamada }; 271270e0c3eSMasahiro Yamada 272270e0c3eSMasahiro Yamada peri_rst: reset { 273270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-peri-reset"; 274270e0c3eSMasahiro Yamada #reset-cells = <1>; 275270e0c3eSMasahiro Yamada }; 276270e0c3eSMasahiro Yamada }; 277270e0c3eSMasahiro Yamada 2783a93cc26SMasahiro Yamada emmc: sdhc@5a000000 { 2793a93cc26SMasahiro Yamada compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; 2803a93cc26SMasahiro Yamada reg = <0x5a000000 0x400>; 2813a93cc26SMasahiro Yamada interrupts = <0 78 4>; 2829c0a9700SMasahiro Yamada pinctrl-names = "default"; 2839c0a9700SMasahiro Yamada pinctrl-0 = <&pinctrl_emmc>; 2843a93cc26SMasahiro Yamada clocks = <&sys_clk 4>; 2853a93cc26SMasahiro Yamada bus-width = <8>; 2863a93cc26SMasahiro Yamada mmc-ddr-1_8v; 2873a93cc26SMasahiro Yamada mmc-hs200-1_8v; 288ba6f7011SMasahiro Yamada cdns,phy-input-delay-legacy = <4>; 289ba6f7011SMasahiro Yamada cdns,phy-input-delay-mmc-highspeed = <2>; 290ba6f7011SMasahiro Yamada cdns,phy-input-delay-mmc-ddr = <3>; 291e345ededSMasahiro Yamada cdns,phy-dll-delay-sdclk = <21>; 292e345ededSMasahiro Yamada cdns,phy-dll-delay-sdclk-hsmmc = <21>; 2933a93cc26SMasahiro Yamada }; 2943a93cc26SMasahiro Yamada 295270e0c3eSMasahiro Yamada usb0: usb@5a800100 { 296270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ehci", "generic-ehci"; 297270e0c3eSMasahiro Yamada status = "disabled"; 298270e0c3eSMasahiro Yamada reg = <0x5a800100 0x100>; 299270e0c3eSMasahiro Yamada interrupts = <0 243 4>; 300270e0c3eSMasahiro Yamada pinctrl-names = "default"; 301270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_usb0>; 302270e0c3eSMasahiro Yamada clocks = <&mio_clk 7>, <&mio_clk 8>, <&mio_clk 12>; 3037a201e31SMasahiro Yamada resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>, 3047a201e31SMasahiro Yamada <&mio_rst 12>; 305270e0c3eSMasahiro Yamada }; 306270e0c3eSMasahiro Yamada 307270e0c3eSMasahiro Yamada usb1: usb@5a810100 { 308270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ehci", "generic-ehci"; 309270e0c3eSMasahiro Yamada status = "disabled"; 310270e0c3eSMasahiro Yamada reg = <0x5a810100 0x100>; 311270e0c3eSMasahiro Yamada interrupts = <0 244 4>; 312270e0c3eSMasahiro Yamada pinctrl-names = "default"; 313270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_usb1>; 314270e0c3eSMasahiro Yamada clocks = <&mio_clk 7>, <&mio_clk 9>, <&mio_clk 13>; 3157a201e31SMasahiro Yamada resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>, 3167a201e31SMasahiro Yamada <&mio_rst 13>; 317270e0c3eSMasahiro Yamada }; 318270e0c3eSMasahiro Yamada 319270e0c3eSMasahiro Yamada usb2: usb@5a820100 { 320270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ehci", "generic-ehci"; 321270e0c3eSMasahiro Yamada status = "disabled"; 322270e0c3eSMasahiro Yamada reg = <0x5a820100 0x100>; 323270e0c3eSMasahiro Yamada interrupts = <0 245 4>; 324270e0c3eSMasahiro Yamada pinctrl-names = "default"; 325270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_usb2>; 326270e0c3eSMasahiro Yamada clocks = <&mio_clk 7>, <&mio_clk 10>, <&mio_clk 14>; 3277a201e31SMasahiro Yamada resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>, 3287a201e31SMasahiro Yamada <&mio_rst 14>; 329270e0c3eSMasahiro Yamada }; 330270e0c3eSMasahiro Yamada 331270e0c3eSMasahiro Yamada mioctrl@5b3e0000 { 332fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld11-mioctrl", 333270e0c3eSMasahiro Yamada "simple-mfd", "syscon"; 334270e0c3eSMasahiro Yamada reg = <0x5b3e0000 0x800>; 335270e0c3eSMasahiro Yamada 336270e0c3eSMasahiro Yamada mio_clk: clock { 337270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-mio-clock"; 338270e0c3eSMasahiro Yamada #clock-cells = <1>; 339270e0c3eSMasahiro Yamada }; 340270e0c3eSMasahiro Yamada 341270e0c3eSMasahiro Yamada mio_rst: reset { 342270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-mio-reset"; 343270e0c3eSMasahiro Yamada #reset-cells = <1>; 344270e0c3eSMasahiro Yamada resets = <&sys_rst 7>; 345270e0c3eSMasahiro Yamada }; 346270e0c3eSMasahiro Yamada }; 347270e0c3eSMasahiro Yamada 348270e0c3eSMasahiro Yamada soc-glue@5f800000 { 349fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld11-soc-glue", 350270e0c3eSMasahiro Yamada "simple-mfd", "syscon"; 351270e0c3eSMasahiro Yamada reg = <0x5f800000 0x2000>; 352270e0c3eSMasahiro Yamada 353270e0c3eSMasahiro Yamada pinctrl: pinctrl { 354270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-pinctrl"; 355270e0c3eSMasahiro Yamada }; 356270e0c3eSMasahiro Yamada }; 357270e0c3eSMasahiro Yamada 358f05851e1SKeiji Hayashibara soc-glue@5f900000 { 359f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-ld11-soc-glue-debug", 360f05851e1SKeiji Hayashibara "simple-mfd"; 361f05851e1SKeiji Hayashibara #address-cells = <1>; 362f05851e1SKeiji Hayashibara #size-cells = <1>; 363f05851e1SKeiji Hayashibara ranges = <0 0x5f900000 0x2000>; 364f05851e1SKeiji Hayashibara 365f05851e1SKeiji Hayashibara efuse@100 { 366f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 367f05851e1SKeiji Hayashibara reg = <0x100 0x28>; 368f05851e1SKeiji Hayashibara }; 369f05851e1SKeiji Hayashibara 370f05851e1SKeiji Hayashibara efuse@200 { 371f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 372f05851e1SKeiji Hayashibara reg = <0x200 0x68>; 373f05851e1SKeiji Hayashibara }; 374f05851e1SKeiji Hayashibara }; 375f05851e1SKeiji Hayashibara 3763dfc6e98SMasahiro Yamada aidet: aidet@5fc20000 { 3773dfc6e98SMasahiro Yamada compatible = "socionext,uniphier-ld11-aidet"; 3783dfc6e98SMasahiro Yamada reg = <0x5fc20000 0x200>; 3793dfc6e98SMasahiro Yamada interrupt-controller; 3803dfc6e98SMasahiro Yamada #interrupt-cells = <2>; 3813dfc6e98SMasahiro Yamada }; 3823dfc6e98SMasahiro Yamada 383270e0c3eSMasahiro Yamada gic: interrupt-controller@5fe00000 { 384270e0c3eSMasahiro Yamada compatible = "arm,gic-v3"; 385270e0c3eSMasahiro Yamada reg = <0x5fe00000 0x10000>, /* GICD */ 386270e0c3eSMasahiro Yamada <0x5fe40000 0x80000>; /* GICR */ 387270e0c3eSMasahiro Yamada interrupt-controller; 388270e0c3eSMasahiro Yamada #interrupt-cells = <3>; 389270e0c3eSMasahiro Yamada interrupts = <1 9 4>; 390270e0c3eSMasahiro Yamada }; 391270e0c3eSMasahiro Yamada 392270e0c3eSMasahiro Yamada sysctrl@61840000 { 393270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-sysctrl", 394270e0c3eSMasahiro Yamada "simple-mfd", "syscon"; 3951ef64af8SMasahiro Yamada reg = <0x61840000 0x10000>; 396270e0c3eSMasahiro Yamada 397270e0c3eSMasahiro Yamada sys_clk: clock { 398270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-clock"; 399270e0c3eSMasahiro Yamada #clock-cells = <1>; 400270e0c3eSMasahiro Yamada }; 401270e0c3eSMasahiro Yamada 402270e0c3eSMasahiro Yamada sys_rst: reset { 403270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-reset"; 404270e0c3eSMasahiro Yamada #reset-cells = <1>; 405270e0c3eSMasahiro Yamada }; 4064c4c960aSKeiji Hayashibara 4074c4c960aSKeiji Hayashibara watchdog { 4084c4c960aSKeiji Hayashibara compatible = "socionext,uniphier-wdt"; 4094c4c960aSKeiji Hayashibara }; 410270e0c3eSMasahiro Yamada }; 411e5aefb38SMasahiro Yamada 412e5aefb38SMasahiro Yamada nand: nand@68000000 { 413e5aefb38SMasahiro Yamada compatible = "socionext,uniphier-denali-nand-v5b"; 414e5aefb38SMasahiro Yamada status = "disabled"; 415e5aefb38SMasahiro Yamada reg-names = "nand_data", "denali_reg"; 416e5aefb38SMasahiro Yamada reg = <0x68000000 0x20>, <0x68100000 0x1000>; 417e5aefb38SMasahiro Yamada interrupts = <0 65 4>; 418e5aefb38SMasahiro Yamada pinctrl-names = "default"; 419e5aefb38SMasahiro Yamada pinctrl-0 = <&pinctrl_nand>; 420e5aefb38SMasahiro Yamada clocks = <&sys_clk 2>; 421e5aefb38SMasahiro Yamada }; 422270e0c3eSMasahiro Yamada }; 423270e0c3eSMasahiro Yamada}; 424270e0c3eSMasahiro Yamada 4255740ea4eSMasahiro Yamada#include "uniphier-pinctrl.dtsi" 426