1270e0c3eSMasahiro Yamada/* 2270e0c3eSMasahiro Yamada * Device Tree Source for UniPhier LD11 SoC 3270e0c3eSMasahiro Yamada * 4270e0c3eSMasahiro Yamada * Copyright (C) 2016 Socionext Inc. 5270e0c3eSMasahiro Yamada * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 6270e0c3eSMasahiro Yamada * 712301cffSMasahiro Yamada * SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8270e0c3eSMasahiro Yamada */ 9270e0c3eSMasahiro Yamada 10b6e5ec20SMasahiro Yamada#include <dt-bindings/gpio/gpio.h> 11b6e5ec20SMasahiro Yamada 1279d4be39SMasahiro Yamada/memreserve/ 0x80000000 0x02000000; 13270e0c3eSMasahiro Yamada 14270e0c3eSMasahiro Yamada/ { 15270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11"; 16270e0c3eSMasahiro Yamada #address-cells = <2>; 17270e0c3eSMasahiro Yamada #size-cells = <2>; 18270e0c3eSMasahiro Yamada interrupt-parent = <&gic>; 19270e0c3eSMasahiro Yamada 20270e0c3eSMasahiro Yamada cpus { 21270e0c3eSMasahiro Yamada #address-cells = <2>; 22270e0c3eSMasahiro Yamada #size-cells = <0>; 23270e0c3eSMasahiro Yamada 24270e0c3eSMasahiro Yamada cpu-map { 25270e0c3eSMasahiro Yamada cluster0 { 26270e0c3eSMasahiro Yamada core0 { 27270e0c3eSMasahiro Yamada cpu = <&cpu0>; 28270e0c3eSMasahiro Yamada }; 29270e0c3eSMasahiro Yamada core1 { 30270e0c3eSMasahiro Yamada cpu = <&cpu1>; 31270e0c3eSMasahiro Yamada }; 32270e0c3eSMasahiro Yamada }; 33270e0c3eSMasahiro Yamada }; 34270e0c3eSMasahiro Yamada 35270e0c3eSMasahiro Yamada cpu0: cpu@0 { 36270e0c3eSMasahiro Yamada device_type = "cpu"; 37270e0c3eSMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 38270e0c3eSMasahiro Yamada reg = <0 0x000>; 39bdb81836SMasahiro Yamada clocks = <&sys_clk 33>; 402f81137fSMasahiro Yamada enable-method = "psci"; 41bdb81836SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 42270e0c3eSMasahiro Yamada }; 43270e0c3eSMasahiro Yamada 44270e0c3eSMasahiro Yamada cpu1: cpu@1 { 45270e0c3eSMasahiro Yamada device_type = "cpu"; 46270e0c3eSMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 47270e0c3eSMasahiro Yamada reg = <0 0x001>; 48bdb81836SMasahiro Yamada clocks = <&sys_clk 33>; 492f81137fSMasahiro Yamada enable-method = "psci"; 50bdb81836SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 51bdb81836SMasahiro Yamada }; 52bdb81836SMasahiro Yamada }; 53bdb81836SMasahiro Yamada 549cd7d03fSMasahiro Yamada cluster0_opp: opp-table { 55bdb81836SMasahiro Yamada compatible = "operating-points-v2"; 56bdb81836SMasahiro Yamada opp-shared; 57bdb81836SMasahiro Yamada 583fc9a121SViresh Kumar opp-245000000 { 59bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <245000000>; 60bdb81836SMasahiro Yamada clock-latency-ns = <300>; 61bdb81836SMasahiro Yamada }; 623fc9a121SViresh Kumar opp-250000000 { 63bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 64bdb81836SMasahiro Yamada clock-latency-ns = <300>; 65bdb81836SMasahiro Yamada }; 663fc9a121SViresh Kumar opp-490000000 { 67bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <490000000>; 68bdb81836SMasahiro Yamada clock-latency-ns = <300>; 69bdb81836SMasahiro Yamada }; 703fc9a121SViresh Kumar opp-500000000 { 71bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 72bdb81836SMasahiro Yamada clock-latency-ns = <300>; 73bdb81836SMasahiro Yamada }; 743fc9a121SViresh Kumar opp-653334000 { 75bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <653334000>; 76bdb81836SMasahiro Yamada clock-latency-ns = <300>; 77bdb81836SMasahiro Yamada }; 783fc9a121SViresh Kumar opp-666667000 { 79bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 80bdb81836SMasahiro Yamada clock-latency-ns = <300>; 81bdb81836SMasahiro Yamada }; 823fc9a121SViresh Kumar opp-980000000 { 83bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <980000000>; 84bdb81836SMasahiro Yamada clock-latency-ns = <300>; 85270e0c3eSMasahiro Yamada }; 86270e0c3eSMasahiro Yamada }; 87270e0c3eSMasahiro Yamada 882f81137fSMasahiro Yamada psci { 892f81137fSMasahiro Yamada compatible = "arm,psci-1.0"; 902f81137fSMasahiro Yamada method = "smc"; 912f81137fSMasahiro Yamada }; 922f81137fSMasahiro Yamada 93270e0c3eSMasahiro Yamada clocks { 94270e0c3eSMasahiro Yamada refclk: ref { 95270e0c3eSMasahiro Yamada compatible = "fixed-clock"; 96270e0c3eSMasahiro Yamada #clock-cells = <0>; 97270e0c3eSMasahiro Yamada clock-frequency = <25000000>; 98270e0c3eSMasahiro Yamada }; 99270e0c3eSMasahiro Yamada }; 100270e0c3eSMasahiro Yamada 101b6e5ec20SMasahiro Yamada emmc_pwrseq: emmc-pwrseq { 102b6e5ec20SMasahiro Yamada compatible = "mmc-pwrseq-emmc"; 103b6e5ec20SMasahiro Yamada reset-gpios = <&gpio 26 GPIO_ACTIVE_LOW>; 104b6e5ec20SMasahiro Yamada }; 105b6e5ec20SMasahiro Yamada 106270e0c3eSMasahiro Yamada timer { 107270e0c3eSMasahiro Yamada compatible = "arm,armv8-timer"; 108270e0c3eSMasahiro Yamada interrupts = <1 13 4>, 109270e0c3eSMasahiro Yamada <1 14 4>, 110270e0c3eSMasahiro Yamada <1 11 4>, 111270e0c3eSMasahiro Yamada <1 10 4>; 112270e0c3eSMasahiro Yamada }; 113270e0c3eSMasahiro Yamada 114b5027603SMasahiro Yamada soc@0 { 115270e0c3eSMasahiro Yamada compatible = "simple-bus"; 116270e0c3eSMasahiro Yamada #address-cells = <1>; 117270e0c3eSMasahiro Yamada #size-cells = <1>; 118270e0c3eSMasahiro Yamada ranges = <0 0 0 0xffffffff>; 119270e0c3eSMasahiro Yamada 120270e0c3eSMasahiro Yamada serial0: serial@54006800 { 121270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-uart"; 122270e0c3eSMasahiro Yamada status = "disabled"; 123270e0c3eSMasahiro Yamada reg = <0x54006800 0x40>; 124270e0c3eSMasahiro Yamada interrupts = <0 33 4>; 125270e0c3eSMasahiro Yamada pinctrl-names = "default"; 126270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_uart0>; 127270e0c3eSMasahiro Yamada clocks = <&peri_clk 0>; 128270e0c3eSMasahiro Yamada }; 129270e0c3eSMasahiro Yamada 130270e0c3eSMasahiro Yamada serial1: serial@54006900 { 131270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-uart"; 132270e0c3eSMasahiro Yamada status = "disabled"; 133270e0c3eSMasahiro Yamada reg = <0x54006900 0x40>; 134270e0c3eSMasahiro Yamada interrupts = <0 35 4>; 135270e0c3eSMasahiro Yamada pinctrl-names = "default"; 136270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_uart1>; 137270e0c3eSMasahiro Yamada clocks = <&peri_clk 1>; 138270e0c3eSMasahiro Yamada }; 139270e0c3eSMasahiro Yamada 140270e0c3eSMasahiro Yamada serial2: serial@54006a00 { 141270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-uart"; 142270e0c3eSMasahiro Yamada status = "disabled"; 143270e0c3eSMasahiro Yamada reg = <0x54006a00 0x40>; 144270e0c3eSMasahiro Yamada interrupts = <0 37 4>; 145270e0c3eSMasahiro Yamada pinctrl-names = "default"; 146270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_uart2>; 147270e0c3eSMasahiro Yamada clocks = <&peri_clk 2>; 148270e0c3eSMasahiro Yamada }; 149270e0c3eSMasahiro Yamada 150270e0c3eSMasahiro Yamada serial3: serial@54006b00 { 151270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-uart"; 152270e0c3eSMasahiro Yamada status = "disabled"; 153270e0c3eSMasahiro Yamada reg = <0x54006b00 0x40>; 154270e0c3eSMasahiro Yamada interrupts = <0 177 4>; 155270e0c3eSMasahiro Yamada pinctrl-names = "default"; 156270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_uart3>; 157270e0c3eSMasahiro Yamada clocks = <&peri_clk 3>; 158270e0c3eSMasahiro Yamada }; 159270e0c3eSMasahiro Yamada 160277b51e7SMasahiro Yamada gpio: gpio@55000000 { 161277b51e7SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 162277b51e7SMasahiro Yamada reg = <0x55000000 0x200>; 163277b51e7SMasahiro Yamada interrupt-parent = <&aidet>; 164277b51e7SMasahiro Yamada interrupt-controller; 165277b51e7SMasahiro Yamada #interrupt-cells = <2>; 166277b51e7SMasahiro Yamada gpio-controller; 167277b51e7SMasahiro Yamada #gpio-cells = <2>; 168277b51e7SMasahiro Yamada gpio-ranges = <&pinctrl 0 0 0>, 169277b51e7SMasahiro Yamada <&pinctrl 43 0 0>, 170277b51e7SMasahiro Yamada <&pinctrl 51 0 0>, 171277b51e7SMasahiro Yamada <&pinctrl 96 0 0>, 172277b51e7SMasahiro Yamada <&pinctrl 160 0 0>, 173277b51e7SMasahiro Yamada <&pinctrl 184 0 0>; 174277b51e7SMasahiro Yamada gpio-ranges-group-names = "gpio_range0", 175277b51e7SMasahiro Yamada "gpio_range1", 176277b51e7SMasahiro Yamada "gpio_range2", 177277b51e7SMasahiro Yamada "gpio_range3", 178277b51e7SMasahiro Yamada "gpio_range4", 179277b51e7SMasahiro Yamada "gpio_range5"; 180277b51e7SMasahiro Yamada ngpios = <200>; 181277b51e7SMasahiro Yamada socionext,interrupt-ranges = <0 48 16>, <16 154 5>, 182277b51e7SMasahiro Yamada <21 217 3>; 183277b51e7SMasahiro Yamada }; 184277b51e7SMasahiro Yamada 185178b3568SKatsuhiro Suzuki adamv@57920000 { 186178b3568SKatsuhiro Suzuki compatible = "socionext,uniphier-ld11-adamv", 187178b3568SKatsuhiro Suzuki "simple-mfd", "syscon"; 188178b3568SKatsuhiro Suzuki reg = <0x57920000 0x1000>; 189178b3568SKatsuhiro Suzuki 190178b3568SKatsuhiro Suzuki adamv_rst: reset { 191178b3568SKatsuhiro Suzuki compatible = "socionext,uniphier-ld11-adamv-reset"; 192178b3568SKatsuhiro Suzuki #reset-cells = <1>; 193178b3568SKatsuhiro Suzuki }; 194178b3568SKatsuhiro Suzuki }; 195178b3568SKatsuhiro Suzuki 196270e0c3eSMasahiro Yamada i2c0: i2c@58780000 { 197270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 198270e0c3eSMasahiro Yamada status = "disabled"; 199270e0c3eSMasahiro Yamada reg = <0x58780000 0x80>; 200270e0c3eSMasahiro Yamada #address-cells = <1>; 201270e0c3eSMasahiro Yamada #size-cells = <0>; 202270e0c3eSMasahiro Yamada interrupts = <0 41 4>; 203270e0c3eSMasahiro Yamada pinctrl-names = "default"; 204270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c0>; 205270e0c3eSMasahiro Yamada clocks = <&peri_clk 4>; 206270e0c3eSMasahiro Yamada clock-frequency = <100000>; 207270e0c3eSMasahiro Yamada }; 208270e0c3eSMasahiro Yamada 209270e0c3eSMasahiro Yamada i2c1: i2c@58781000 { 210270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 211270e0c3eSMasahiro Yamada status = "disabled"; 212270e0c3eSMasahiro Yamada reg = <0x58781000 0x80>; 213270e0c3eSMasahiro Yamada #address-cells = <1>; 214270e0c3eSMasahiro Yamada #size-cells = <0>; 215270e0c3eSMasahiro Yamada interrupts = <0 42 4>; 216270e0c3eSMasahiro Yamada pinctrl-names = "default"; 217270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c1>; 218270e0c3eSMasahiro Yamada clocks = <&peri_clk 5>; 219270e0c3eSMasahiro Yamada clock-frequency = <100000>; 220270e0c3eSMasahiro Yamada }; 221270e0c3eSMasahiro Yamada 222270e0c3eSMasahiro Yamada i2c2: i2c@58782000 { 223270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 224270e0c3eSMasahiro Yamada reg = <0x58782000 0x80>; 225270e0c3eSMasahiro Yamada #address-cells = <1>; 226270e0c3eSMasahiro Yamada #size-cells = <0>; 227270e0c3eSMasahiro Yamada interrupts = <0 43 4>; 228270e0c3eSMasahiro Yamada clocks = <&peri_clk 6>; 229270e0c3eSMasahiro Yamada clock-frequency = <400000>; 230270e0c3eSMasahiro Yamada }; 231270e0c3eSMasahiro Yamada 232270e0c3eSMasahiro Yamada i2c3: i2c@58783000 { 233270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 234270e0c3eSMasahiro Yamada status = "disabled"; 235270e0c3eSMasahiro Yamada reg = <0x58783000 0x80>; 236270e0c3eSMasahiro Yamada #address-cells = <1>; 237270e0c3eSMasahiro Yamada #size-cells = <0>; 238270e0c3eSMasahiro Yamada interrupts = <0 44 4>; 239270e0c3eSMasahiro Yamada pinctrl-names = "default"; 240270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c3>; 241270e0c3eSMasahiro Yamada clocks = <&peri_clk 7>; 242270e0c3eSMasahiro Yamada clock-frequency = <100000>; 243270e0c3eSMasahiro Yamada }; 244270e0c3eSMasahiro Yamada 245270e0c3eSMasahiro Yamada i2c4: i2c@58784000 { 246270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 247270e0c3eSMasahiro Yamada status = "disabled"; 248270e0c3eSMasahiro Yamada reg = <0x58784000 0x80>; 249270e0c3eSMasahiro Yamada #address-cells = <1>; 250270e0c3eSMasahiro Yamada #size-cells = <0>; 251270e0c3eSMasahiro Yamada interrupts = <0 45 4>; 252270e0c3eSMasahiro Yamada pinctrl-names = "default"; 253270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c4>; 254270e0c3eSMasahiro Yamada clocks = <&peri_clk 8>; 255270e0c3eSMasahiro Yamada clock-frequency = <100000>; 256270e0c3eSMasahiro Yamada }; 257270e0c3eSMasahiro Yamada 258270e0c3eSMasahiro Yamada i2c5: i2c@58785000 { 259270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 260270e0c3eSMasahiro Yamada reg = <0x58785000 0x80>; 261270e0c3eSMasahiro Yamada #address-cells = <1>; 262270e0c3eSMasahiro Yamada #size-cells = <0>; 263270e0c3eSMasahiro Yamada interrupts = <0 25 4>; 264270e0c3eSMasahiro Yamada clocks = <&peri_clk 9>; 265270e0c3eSMasahiro Yamada clock-frequency = <400000>; 266270e0c3eSMasahiro Yamada }; 267270e0c3eSMasahiro Yamada 268270e0c3eSMasahiro Yamada system_bus: system-bus@58c00000 { 269270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-system-bus"; 270270e0c3eSMasahiro Yamada status = "disabled"; 271270e0c3eSMasahiro Yamada reg = <0x58c00000 0x400>; 272270e0c3eSMasahiro Yamada #address-cells = <2>; 273270e0c3eSMasahiro Yamada #size-cells = <1>; 274270e0c3eSMasahiro Yamada pinctrl-names = "default"; 275270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_system_bus>; 276270e0c3eSMasahiro Yamada }; 277270e0c3eSMasahiro Yamada 278b10ee7e3SMasahiro Yamada smpctrl@59801000 { 279270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-smpctrl"; 280270e0c3eSMasahiro Yamada reg = <0x59801000 0x400>; 281270e0c3eSMasahiro Yamada }; 282270e0c3eSMasahiro Yamada 2838f32b812SMasahiro Yamada sdctrl@59810000 { 2848f32b812SMasahiro Yamada compatible = "socionext,uniphier-ld11-sdctrl", 2858f32b812SMasahiro Yamada "simple-mfd", "syscon"; 2868f32b812SMasahiro Yamada reg = <0x59810000 0x400>; 2878f32b812SMasahiro Yamada 2888f32b812SMasahiro Yamada sd_rst: reset { 2898f32b812SMasahiro Yamada compatible = "socionext,uniphier-ld11-sd-reset"; 2908f32b812SMasahiro Yamada #reset-cells = <1>; 2918f32b812SMasahiro Yamada }; 2928f32b812SMasahiro Yamada }; 2938f32b812SMasahiro Yamada 294270e0c3eSMasahiro Yamada perictrl@59820000 { 295fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld11-perictrl", 296270e0c3eSMasahiro Yamada "simple-mfd", "syscon"; 297270e0c3eSMasahiro Yamada reg = <0x59820000 0x200>; 298270e0c3eSMasahiro Yamada 299270e0c3eSMasahiro Yamada peri_clk: clock { 300270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-peri-clock"; 301270e0c3eSMasahiro Yamada #clock-cells = <1>; 302270e0c3eSMasahiro Yamada }; 303270e0c3eSMasahiro Yamada 304270e0c3eSMasahiro Yamada peri_rst: reset { 305270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-peri-reset"; 306270e0c3eSMasahiro Yamada #reset-cells = <1>; 307270e0c3eSMasahiro Yamada }; 308270e0c3eSMasahiro Yamada }; 309270e0c3eSMasahiro Yamada 3103a93cc26SMasahiro Yamada emmc: sdhc@5a000000 { 3113a93cc26SMasahiro Yamada compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; 3123a93cc26SMasahiro Yamada reg = <0x5a000000 0x400>; 3133a93cc26SMasahiro Yamada interrupts = <0 78 4>; 3149c0a9700SMasahiro Yamada pinctrl-names = "default"; 3159c0a9700SMasahiro Yamada pinctrl-0 = <&pinctrl_emmc>; 3163a93cc26SMasahiro Yamada clocks = <&sys_clk 4>; 3173a93cc26SMasahiro Yamada bus-width = <8>; 3183a93cc26SMasahiro Yamada mmc-ddr-1_8v; 3193a93cc26SMasahiro Yamada mmc-hs200-1_8v; 320b6e5ec20SMasahiro Yamada mmc-pwrseq = <&emmc_pwrseq>; 321ba6f7011SMasahiro Yamada cdns,phy-input-delay-legacy = <4>; 322ba6f7011SMasahiro Yamada cdns,phy-input-delay-mmc-highspeed = <2>; 323ba6f7011SMasahiro Yamada cdns,phy-input-delay-mmc-ddr = <3>; 324e345ededSMasahiro Yamada cdns,phy-dll-delay-sdclk = <21>; 325e345ededSMasahiro Yamada cdns,phy-dll-delay-sdclk-hsmmc = <21>; 3263a93cc26SMasahiro Yamada }; 3273a93cc26SMasahiro Yamada 328270e0c3eSMasahiro Yamada usb0: usb@5a800100 { 329270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ehci", "generic-ehci"; 330270e0c3eSMasahiro Yamada status = "disabled"; 331270e0c3eSMasahiro Yamada reg = <0x5a800100 0x100>; 332270e0c3eSMasahiro Yamada interrupts = <0 243 4>; 333270e0c3eSMasahiro Yamada pinctrl-names = "default"; 334270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_usb0>; 335270e0c3eSMasahiro Yamada clocks = <&mio_clk 7>, <&mio_clk 8>, <&mio_clk 12>; 3367a201e31SMasahiro Yamada resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>, 3377a201e31SMasahiro Yamada <&mio_rst 12>; 338270e0c3eSMasahiro Yamada }; 339270e0c3eSMasahiro Yamada 340270e0c3eSMasahiro Yamada usb1: usb@5a810100 { 341270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ehci", "generic-ehci"; 342270e0c3eSMasahiro Yamada status = "disabled"; 343270e0c3eSMasahiro Yamada reg = <0x5a810100 0x100>; 344270e0c3eSMasahiro Yamada interrupts = <0 244 4>; 345270e0c3eSMasahiro Yamada pinctrl-names = "default"; 346270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_usb1>; 347270e0c3eSMasahiro Yamada clocks = <&mio_clk 7>, <&mio_clk 9>, <&mio_clk 13>; 3487a201e31SMasahiro Yamada resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>, 3497a201e31SMasahiro Yamada <&mio_rst 13>; 350270e0c3eSMasahiro Yamada }; 351270e0c3eSMasahiro Yamada 352270e0c3eSMasahiro Yamada usb2: usb@5a820100 { 353270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ehci", "generic-ehci"; 354270e0c3eSMasahiro Yamada status = "disabled"; 355270e0c3eSMasahiro Yamada reg = <0x5a820100 0x100>; 356270e0c3eSMasahiro Yamada interrupts = <0 245 4>; 357270e0c3eSMasahiro Yamada pinctrl-names = "default"; 358270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_usb2>; 359270e0c3eSMasahiro Yamada clocks = <&mio_clk 7>, <&mio_clk 10>, <&mio_clk 14>; 3607a201e31SMasahiro Yamada resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>, 3617a201e31SMasahiro Yamada <&mio_rst 14>; 362270e0c3eSMasahiro Yamada }; 363270e0c3eSMasahiro Yamada 364270e0c3eSMasahiro Yamada mioctrl@5b3e0000 { 365fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld11-mioctrl", 366270e0c3eSMasahiro Yamada "simple-mfd", "syscon"; 367270e0c3eSMasahiro Yamada reg = <0x5b3e0000 0x800>; 368270e0c3eSMasahiro Yamada 369270e0c3eSMasahiro Yamada mio_clk: clock { 370270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-mio-clock"; 371270e0c3eSMasahiro Yamada #clock-cells = <1>; 372270e0c3eSMasahiro Yamada }; 373270e0c3eSMasahiro Yamada 374270e0c3eSMasahiro Yamada mio_rst: reset { 375270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-mio-reset"; 376270e0c3eSMasahiro Yamada #reset-cells = <1>; 377270e0c3eSMasahiro Yamada resets = <&sys_rst 7>; 378270e0c3eSMasahiro Yamada }; 379270e0c3eSMasahiro Yamada }; 380270e0c3eSMasahiro Yamada 381270e0c3eSMasahiro Yamada soc-glue@5f800000 { 382fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld11-soc-glue", 383270e0c3eSMasahiro Yamada "simple-mfd", "syscon"; 384270e0c3eSMasahiro Yamada reg = <0x5f800000 0x2000>; 385270e0c3eSMasahiro Yamada 386270e0c3eSMasahiro Yamada pinctrl: pinctrl { 387270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-pinctrl"; 388270e0c3eSMasahiro Yamada }; 389270e0c3eSMasahiro Yamada }; 390270e0c3eSMasahiro Yamada 391f05851e1SKeiji Hayashibara soc-glue@5f900000 { 392f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-ld11-soc-glue-debug", 393f05851e1SKeiji Hayashibara "simple-mfd"; 394f05851e1SKeiji Hayashibara #address-cells = <1>; 395f05851e1SKeiji Hayashibara #size-cells = <1>; 396f05851e1SKeiji Hayashibara ranges = <0 0x5f900000 0x2000>; 397f05851e1SKeiji Hayashibara 398f05851e1SKeiji Hayashibara efuse@100 { 399f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 400f05851e1SKeiji Hayashibara reg = <0x100 0x28>; 401f05851e1SKeiji Hayashibara }; 402f05851e1SKeiji Hayashibara 403f05851e1SKeiji Hayashibara efuse@200 { 404f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 405f05851e1SKeiji Hayashibara reg = <0x200 0x68>; 406f05851e1SKeiji Hayashibara }; 407f05851e1SKeiji Hayashibara }; 408f05851e1SKeiji Hayashibara 4093dfc6e98SMasahiro Yamada aidet: aidet@5fc20000 { 4103dfc6e98SMasahiro Yamada compatible = "socionext,uniphier-ld11-aidet"; 4113dfc6e98SMasahiro Yamada reg = <0x5fc20000 0x200>; 4123dfc6e98SMasahiro Yamada interrupt-controller; 4133dfc6e98SMasahiro Yamada #interrupt-cells = <2>; 4143dfc6e98SMasahiro Yamada }; 4153dfc6e98SMasahiro Yamada 416270e0c3eSMasahiro Yamada gic: interrupt-controller@5fe00000 { 417270e0c3eSMasahiro Yamada compatible = "arm,gic-v3"; 418270e0c3eSMasahiro Yamada reg = <0x5fe00000 0x10000>, /* GICD */ 419270e0c3eSMasahiro Yamada <0x5fe40000 0x80000>; /* GICR */ 420270e0c3eSMasahiro Yamada interrupt-controller; 421270e0c3eSMasahiro Yamada #interrupt-cells = <3>; 422270e0c3eSMasahiro Yamada interrupts = <1 9 4>; 423270e0c3eSMasahiro Yamada }; 424270e0c3eSMasahiro Yamada 425270e0c3eSMasahiro Yamada sysctrl@61840000 { 426270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-sysctrl", 427270e0c3eSMasahiro Yamada "simple-mfd", "syscon"; 4281ef64af8SMasahiro Yamada reg = <0x61840000 0x10000>; 429270e0c3eSMasahiro Yamada 430270e0c3eSMasahiro Yamada sys_clk: clock { 431270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-clock"; 432270e0c3eSMasahiro Yamada #clock-cells = <1>; 433270e0c3eSMasahiro Yamada }; 434270e0c3eSMasahiro Yamada 435270e0c3eSMasahiro Yamada sys_rst: reset { 436270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-reset"; 437270e0c3eSMasahiro Yamada #reset-cells = <1>; 438270e0c3eSMasahiro Yamada }; 4394c4c960aSKeiji Hayashibara 4404c4c960aSKeiji Hayashibara watchdog { 4414c4c960aSKeiji Hayashibara compatible = "socionext,uniphier-wdt"; 4424c4c960aSKeiji Hayashibara }; 443270e0c3eSMasahiro Yamada }; 444e5aefb38SMasahiro Yamada 445e5aefb38SMasahiro Yamada nand: nand@68000000 { 446e5aefb38SMasahiro Yamada compatible = "socionext,uniphier-denali-nand-v5b"; 447e5aefb38SMasahiro Yamada status = "disabled"; 448e5aefb38SMasahiro Yamada reg-names = "nand_data", "denali_reg"; 449e5aefb38SMasahiro Yamada reg = <0x68000000 0x20>, <0x68100000 0x1000>; 450e5aefb38SMasahiro Yamada interrupts = <0 65 4>; 451e5aefb38SMasahiro Yamada pinctrl-names = "default"; 452e5aefb38SMasahiro Yamada pinctrl-0 = <&pinctrl_nand>; 453e5aefb38SMasahiro Yamada clocks = <&sys_clk 2>; 454e5aefb38SMasahiro Yamada }; 455270e0c3eSMasahiro Yamada }; 456270e0c3eSMasahiro Yamada}; 457270e0c3eSMasahiro Yamada 4585740ea4eSMasahiro Yamada#include "uniphier-pinctrl.dtsi" 459