1270e0c3eSMasahiro Yamada/* 2270e0c3eSMasahiro Yamada * Device Tree Source for UniPhier LD11 SoC 3270e0c3eSMasahiro Yamada * 4270e0c3eSMasahiro Yamada * Copyright (C) 2016 Socionext Inc. 5270e0c3eSMasahiro Yamada * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 6270e0c3eSMasahiro Yamada * 7270e0c3eSMasahiro Yamada * This file is dual-licensed: you can use it either under the terms 8270e0c3eSMasahiro Yamada * of the GPL or the X11 license, at your option. Note that this dual 9270e0c3eSMasahiro Yamada * licensing only applies to this file, and not this project as a 10270e0c3eSMasahiro Yamada * whole. 11270e0c3eSMasahiro Yamada * 12270e0c3eSMasahiro Yamada * a) This file is free software; you can redistribute it and/or 13270e0c3eSMasahiro Yamada * modify it under the terms of the GNU General Public License as 14270e0c3eSMasahiro Yamada * published by the Free Software Foundation; either version 2 of the 15270e0c3eSMasahiro Yamada * License, or (at your option) any later version. 16270e0c3eSMasahiro Yamada * 17270e0c3eSMasahiro Yamada * This file is distributed in the hope that it will be useful, 18270e0c3eSMasahiro Yamada * but WITHOUT ANY WARRANTY; without even the implied warranty of 19270e0c3eSMasahiro Yamada * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20270e0c3eSMasahiro Yamada * GNU General Public License for more details. 21270e0c3eSMasahiro Yamada * 22270e0c3eSMasahiro Yamada * Or, alternatively, 23270e0c3eSMasahiro Yamada * 24270e0c3eSMasahiro Yamada * b) Permission is hereby granted, free of charge, to any person 25270e0c3eSMasahiro Yamada * obtaining a copy of this software and associated documentation 26270e0c3eSMasahiro Yamada * files (the "Software"), to deal in the Software without 27270e0c3eSMasahiro Yamada * restriction, including without limitation the rights to use, 28270e0c3eSMasahiro Yamada * copy, modify, merge, publish, distribute, sublicense, and/or 29270e0c3eSMasahiro Yamada * sell copies of the Software, and to permit persons to whom the 30270e0c3eSMasahiro Yamada * Software is furnished to do so, subject to the following 31270e0c3eSMasahiro Yamada * conditions: 32270e0c3eSMasahiro Yamada * 33270e0c3eSMasahiro Yamada * The above copyright notice and this permission notice shall be 34270e0c3eSMasahiro Yamada * included in all copies or substantial portions of the Software. 35270e0c3eSMasahiro Yamada * 36270e0c3eSMasahiro Yamada * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 37270e0c3eSMasahiro Yamada * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 38270e0c3eSMasahiro Yamada * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 39270e0c3eSMasahiro Yamada * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 40270e0c3eSMasahiro Yamada * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 41270e0c3eSMasahiro Yamada * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 42270e0c3eSMasahiro Yamada * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 43270e0c3eSMasahiro Yamada * OTHER DEALINGS IN THE SOFTWARE. 44270e0c3eSMasahiro Yamada */ 45270e0c3eSMasahiro Yamada 462f81137fSMasahiro Yamada/memreserve/ 0x80000000 0x00080000; 47270e0c3eSMasahiro Yamada 48270e0c3eSMasahiro Yamada/ { 49270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11"; 50270e0c3eSMasahiro Yamada #address-cells = <2>; 51270e0c3eSMasahiro Yamada #size-cells = <2>; 52270e0c3eSMasahiro Yamada interrupt-parent = <&gic>; 53270e0c3eSMasahiro Yamada 54270e0c3eSMasahiro Yamada cpus { 55270e0c3eSMasahiro Yamada #address-cells = <2>; 56270e0c3eSMasahiro Yamada #size-cells = <0>; 57270e0c3eSMasahiro Yamada 58270e0c3eSMasahiro Yamada cpu-map { 59270e0c3eSMasahiro Yamada cluster0 { 60270e0c3eSMasahiro Yamada core0 { 61270e0c3eSMasahiro Yamada cpu = <&cpu0>; 62270e0c3eSMasahiro Yamada }; 63270e0c3eSMasahiro Yamada core1 { 64270e0c3eSMasahiro Yamada cpu = <&cpu1>; 65270e0c3eSMasahiro Yamada }; 66270e0c3eSMasahiro Yamada }; 67270e0c3eSMasahiro Yamada }; 68270e0c3eSMasahiro Yamada 69270e0c3eSMasahiro Yamada cpu0: cpu@0 { 70270e0c3eSMasahiro Yamada device_type = "cpu"; 71270e0c3eSMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 72270e0c3eSMasahiro Yamada reg = <0 0x000>; 73bdb81836SMasahiro Yamada clocks = <&sys_clk 33>; 742f81137fSMasahiro Yamada enable-method = "psci"; 75bdb81836SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 76270e0c3eSMasahiro Yamada }; 77270e0c3eSMasahiro Yamada 78270e0c3eSMasahiro Yamada cpu1: cpu@1 { 79270e0c3eSMasahiro Yamada device_type = "cpu"; 80270e0c3eSMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 81270e0c3eSMasahiro Yamada reg = <0 0x001>; 82bdb81836SMasahiro Yamada clocks = <&sys_clk 33>; 832f81137fSMasahiro Yamada enable-method = "psci"; 84bdb81836SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 85bdb81836SMasahiro Yamada }; 86bdb81836SMasahiro Yamada }; 87bdb81836SMasahiro Yamada 88bdb81836SMasahiro Yamada cluster0_opp: opp_table { 89bdb81836SMasahiro Yamada compatible = "operating-points-v2"; 90bdb81836SMasahiro Yamada opp-shared; 91bdb81836SMasahiro Yamada 92bdb81836SMasahiro Yamada opp@245000000 { 93bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <245000000>; 94bdb81836SMasahiro Yamada clock-latency-ns = <300>; 95bdb81836SMasahiro Yamada }; 96bdb81836SMasahiro Yamada opp@250000000 { 97bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 98bdb81836SMasahiro Yamada clock-latency-ns = <300>; 99bdb81836SMasahiro Yamada }; 100bdb81836SMasahiro Yamada opp@490000000 { 101bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <490000000>; 102bdb81836SMasahiro Yamada clock-latency-ns = <300>; 103bdb81836SMasahiro Yamada }; 104bdb81836SMasahiro Yamada opp@500000000 { 105bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 106bdb81836SMasahiro Yamada clock-latency-ns = <300>; 107bdb81836SMasahiro Yamada }; 108bdb81836SMasahiro Yamada opp@653334000 { 109bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <653334000>; 110bdb81836SMasahiro Yamada clock-latency-ns = <300>; 111bdb81836SMasahiro Yamada }; 112bdb81836SMasahiro Yamada opp@666667000 { 113bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 114bdb81836SMasahiro Yamada clock-latency-ns = <300>; 115bdb81836SMasahiro Yamada }; 116bdb81836SMasahiro Yamada opp@980000000 { 117bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <980000000>; 118bdb81836SMasahiro Yamada clock-latency-ns = <300>; 119270e0c3eSMasahiro Yamada }; 120270e0c3eSMasahiro Yamada }; 121270e0c3eSMasahiro Yamada 1222f81137fSMasahiro Yamada psci { 1232f81137fSMasahiro Yamada compatible = "arm,psci-1.0"; 1242f81137fSMasahiro Yamada method = "smc"; 1252f81137fSMasahiro Yamada }; 1262f81137fSMasahiro Yamada 127270e0c3eSMasahiro Yamada clocks { 128270e0c3eSMasahiro Yamada refclk: ref { 129270e0c3eSMasahiro Yamada compatible = "fixed-clock"; 130270e0c3eSMasahiro Yamada #clock-cells = <0>; 131270e0c3eSMasahiro Yamada clock-frequency = <25000000>; 132270e0c3eSMasahiro Yamada }; 133270e0c3eSMasahiro Yamada }; 134270e0c3eSMasahiro Yamada 135270e0c3eSMasahiro Yamada timer { 136270e0c3eSMasahiro Yamada compatible = "arm,armv8-timer"; 137270e0c3eSMasahiro Yamada interrupts = <1 13 4>, 138270e0c3eSMasahiro Yamada <1 14 4>, 139270e0c3eSMasahiro Yamada <1 11 4>, 140270e0c3eSMasahiro Yamada <1 10 4>; 141270e0c3eSMasahiro Yamada }; 142270e0c3eSMasahiro Yamada 143270e0c3eSMasahiro Yamada soc { 144270e0c3eSMasahiro Yamada compatible = "simple-bus"; 145270e0c3eSMasahiro Yamada #address-cells = <1>; 146270e0c3eSMasahiro Yamada #size-cells = <1>; 147270e0c3eSMasahiro Yamada ranges = <0 0 0 0xffffffff>; 148270e0c3eSMasahiro Yamada 149270e0c3eSMasahiro Yamada serial0: serial@54006800 { 150270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-uart"; 151270e0c3eSMasahiro Yamada status = "disabled"; 152270e0c3eSMasahiro Yamada reg = <0x54006800 0x40>; 153270e0c3eSMasahiro Yamada interrupts = <0 33 4>; 154270e0c3eSMasahiro Yamada pinctrl-names = "default"; 155270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_uart0>; 156270e0c3eSMasahiro Yamada clocks = <&peri_clk 0>; 157270e0c3eSMasahiro Yamada }; 158270e0c3eSMasahiro Yamada 159270e0c3eSMasahiro Yamada serial1: serial@54006900 { 160270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-uart"; 161270e0c3eSMasahiro Yamada status = "disabled"; 162270e0c3eSMasahiro Yamada reg = <0x54006900 0x40>; 163270e0c3eSMasahiro Yamada interrupts = <0 35 4>; 164270e0c3eSMasahiro Yamada pinctrl-names = "default"; 165270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_uart1>; 166270e0c3eSMasahiro Yamada clocks = <&peri_clk 1>; 167270e0c3eSMasahiro Yamada }; 168270e0c3eSMasahiro Yamada 169270e0c3eSMasahiro Yamada serial2: serial@54006a00 { 170270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-uart"; 171270e0c3eSMasahiro Yamada status = "disabled"; 172270e0c3eSMasahiro Yamada reg = <0x54006a00 0x40>; 173270e0c3eSMasahiro Yamada interrupts = <0 37 4>; 174270e0c3eSMasahiro Yamada pinctrl-names = "default"; 175270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_uart2>; 176270e0c3eSMasahiro Yamada clocks = <&peri_clk 2>; 177270e0c3eSMasahiro Yamada }; 178270e0c3eSMasahiro Yamada 179270e0c3eSMasahiro Yamada serial3: serial@54006b00 { 180270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-uart"; 181270e0c3eSMasahiro Yamada status = "disabled"; 182270e0c3eSMasahiro Yamada reg = <0x54006b00 0x40>; 183270e0c3eSMasahiro Yamada interrupts = <0 177 4>; 184270e0c3eSMasahiro Yamada pinctrl-names = "default"; 185270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_uart3>; 186270e0c3eSMasahiro Yamada clocks = <&peri_clk 3>; 187270e0c3eSMasahiro Yamada }; 188270e0c3eSMasahiro Yamada 189270e0c3eSMasahiro Yamada i2c0: i2c@58780000 { 190270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 191270e0c3eSMasahiro Yamada status = "disabled"; 192270e0c3eSMasahiro Yamada reg = <0x58780000 0x80>; 193270e0c3eSMasahiro Yamada #address-cells = <1>; 194270e0c3eSMasahiro Yamada #size-cells = <0>; 195270e0c3eSMasahiro Yamada interrupts = <0 41 4>; 196270e0c3eSMasahiro Yamada pinctrl-names = "default"; 197270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c0>; 198270e0c3eSMasahiro Yamada clocks = <&peri_clk 4>; 199270e0c3eSMasahiro Yamada clock-frequency = <100000>; 200270e0c3eSMasahiro Yamada }; 201270e0c3eSMasahiro Yamada 202270e0c3eSMasahiro Yamada i2c1: i2c@58781000 { 203270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 204270e0c3eSMasahiro Yamada status = "disabled"; 205270e0c3eSMasahiro Yamada reg = <0x58781000 0x80>; 206270e0c3eSMasahiro Yamada #address-cells = <1>; 207270e0c3eSMasahiro Yamada #size-cells = <0>; 208270e0c3eSMasahiro Yamada interrupts = <0 42 4>; 209270e0c3eSMasahiro Yamada pinctrl-names = "default"; 210270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c1>; 211270e0c3eSMasahiro Yamada clocks = <&peri_clk 5>; 212270e0c3eSMasahiro Yamada clock-frequency = <100000>; 213270e0c3eSMasahiro Yamada }; 214270e0c3eSMasahiro Yamada 215270e0c3eSMasahiro Yamada i2c2: i2c@58782000 { 216270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 217270e0c3eSMasahiro Yamada reg = <0x58782000 0x80>; 218270e0c3eSMasahiro Yamada #address-cells = <1>; 219270e0c3eSMasahiro Yamada #size-cells = <0>; 220270e0c3eSMasahiro Yamada interrupts = <0 43 4>; 221270e0c3eSMasahiro Yamada clocks = <&peri_clk 6>; 222270e0c3eSMasahiro Yamada clock-frequency = <400000>; 223270e0c3eSMasahiro Yamada }; 224270e0c3eSMasahiro Yamada 225270e0c3eSMasahiro Yamada i2c3: i2c@58783000 { 226270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 227270e0c3eSMasahiro Yamada status = "disabled"; 228270e0c3eSMasahiro Yamada reg = <0x58783000 0x80>; 229270e0c3eSMasahiro Yamada #address-cells = <1>; 230270e0c3eSMasahiro Yamada #size-cells = <0>; 231270e0c3eSMasahiro Yamada interrupts = <0 44 4>; 232270e0c3eSMasahiro Yamada pinctrl-names = "default"; 233270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c3>; 234270e0c3eSMasahiro Yamada clocks = <&peri_clk 7>; 235270e0c3eSMasahiro Yamada clock-frequency = <100000>; 236270e0c3eSMasahiro Yamada }; 237270e0c3eSMasahiro Yamada 238270e0c3eSMasahiro Yamada i2c4: i2c@58784000 { 239270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 240270e0c3eSMasahiro Yamada status = "disabled"; 241270e0c3eSMasahiro Yamada reg = <0x58784000 0x80>; 242270e0c3eSMasahiro Yamada #address-cells = <1>; 243270e0c3eSMasahiro Yamada #size-cells = <0>; 244270e0c3eSMasahiro Yamada interrupts = <0 45 4>; 245270e0c3eSMasahiro Yamada pinctrl-names = "default"; 246270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c4>; 247270e0c3eSMasahiro Yamada clocks = <&peri_clk 8>; 248270e0c3eSMasahiro Yamada clock-frequency = <100000>; 249270e0c3eSMasahiro Yamada }; 250270e0c3eSMasahiro Yamada 251270e0c3eSMasahiro Yamada i2c5: i2c@58785000 { 252270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 253270e0c3eSMasahiro Yamada reg = <0x58785000 0x80>; 254270e0c3eSMasahiro Yamada #address-cells = <1>; 255270e0c3eSMasahiro Yamada #size-cells = <0>; 256270e0c3eSMasahiro Yamada interrupts = <0 25 4>; 257270e0c3eSMasahiro Yamada clocks = <&peri_clk 9>; 258270e0c3eSMasahiro Yamada clock-frequency = <400000>; 259270e0c3eSMasahiro Yamada }; 260270e0c3eSMasahiro Yamada 261270e0c3eSMasahiro Yamada system_bus: system-bus@58c00000 { 262270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-system-bus"; 263270e0c3eSMasahiro Yamada status = "disabled"; 264270e0c3eSMasahiro Yamada reg = <0x58c00000 0x400>; 265270e0c3eSMasahiro Yamada #address-cells = <2>; 266270e0c3eSMasahiro Yamada #size-cells = <1>; 267270e0c3eSMasahiro Yamada pinctrl-names = "default"; 268270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_system_bus>; 269270e0c3eSMasahiro Yamada }; 270270e0c3eSMasahiro Yamada 271270e0c3eSMasahiro Yamada smpctrl@59800000 { 272270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-smpctrl"; 273270e0c3eSMasahiro Yamada reg = <0x59801000 0x400>; 274270e0c3eSMasahiro Yamada }; 275270e0c3eSMasahiro Yamada 2768f32b812SMasahiro Yamada sdctrl@59810000 { 2778f32b812SMasahiro Yamada compatible = "socionext,uniphier-ld11-sdctrl", 2788f32b812SMasahiro Yamada "simple-mfd", "syscon"; 2798f32b812SMasahiro Yamada reg = <0x59810000 0x400>; 2808f32b812SMasahiro Yamada 2818f32b812SMasahiro Yamada sd_rst: reset { 2828f32b812SMasahiro Yamada compatible = "socionext,uniphier-ld11-sd-reset"; 2838f32b812SMasahiro Yamada #reset-cells = <1>; 2848f32b812SMasahiro Yamada }; 2858f32b812SMasahiro Yamada }; 2868f32b812SMasahiro Yamada 287270e0c3eSMasahiro Yamada perictrl@59820000 { 288fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld11-perictrl", 289270e0c3eSMasahiro Yamada "simple-mfd", "syscon"; 290270e0c3eSMasahiro Yamada reg = <0x59820000 0x200>; 291270e0c3eSMasahiro Yamada 292270e0c3eSMasahiro Yamada peri_clk: clock { 293270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-peri-clock"; 294270e0c3eSMasahiro Yamada #clock-cells = <1>; 295270e0c3eSMasahiro Yamada }; 296270e0c3eSMasahiro Yamada 297270e0c3eSMasahiro Yamada peri_rst: reset { 298270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-peri-reset"; 299270e0c3eSMasahiro Yamada #reset-cells = <1>; 300270e0c3eSMasahiro Yamada }; 301270e0c3eSMasahiro Yamada }; 302270e0c3eSMasahiro Yamada 3033a93cc26SMasahiro Yamada emmc: sdhc@5a000000 { 3043a93cc26SMasahiro Yamada compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; 3053a93cc26SMasahiro Yamada reg = <0x5a000000 0x400>; 3063a93cc26SMasahiro Yamada interrupts = <0 78 4>; 3073a93cc26SMasahiro Yamada clocks = <&sys_clk 4>; 3083a93cc26SMasahiro Yamada bus-width = <8>; 3093a93cc26SMasahiro Yamada mmc-ddr-1_8v; 3103a93cc26SMasahiro Yamada mmc-hs200-1_8v; 3113a93cc26SMasahiro Yamada }; 3123a93cc26SMasahiro Yamada 313270e0c3eSMasahiro Yamada usb0: usb@5a800100 { 314270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ehci", "generic-ehci"; 315270e0c3eSMasahiro Yamada status = "disabled"; 316270e0c3eSMasahiro Yamada reg = <0x5a800100 0x100>; 317270e0c3eSMasahiro Yamada interrupts = <0 243 4>; 318270e0c3eSMasahiro Yamada pinctrl-names = "default"; 319270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_usb0>; 320270e0c3eSMasahiro Yamada clocks = <&mio_clk 7>, <&mio_clk 8>, <&mio_clk 12>; 321270e0c3eSMasahiro Yamada resets = <&mio_rst 7>, <&mio_rst 8>, <&mio_rst 12>, <&sys_rst 8>; 322270e0c3eSMasahiro Yamada }; 323270e0c3eSMasahiro Yamada 324270e0c3eSMasahiro Yamada usb1: usb@5a810100 { 325270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ehci", "generic-ehci"; 326270e0c3eSMasahiro Yamada status = "disabled"; 327270e0c3eSMasahiro Yamada reg = <0x5a810100 0x100>; 328270e0c3eSMasahiro Yamada interrupts = <0 244 4>; 329270e0c3eSMasahiro Yamada pinctrl-names = "default"; 330270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_usb1>; 331270e0c3eSMasahiro Yamada clocks = <&mio_clk 7>, <&mio_clk 9>, <&mio_clk 13>; 332270e0c3eSMasahiro Yamada resets = <&mio_rst 7>, <&mio_rst 9>, <&mio_rst 13>, <&sys_rst 8>; 333270e0c3eSMasahiro Yamada }; 334270e0c3eSMasahiro Yamada 335270e0c3eSMasahiro Yamada usb2: usb@5a820100 { 336270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ehci", "generic-ehci"; 337270e0c3eSMasahiro Yamada status = "disabled"; 338270e0c3eSMasahiro Yamada reg = <0x5a820100 0x100>; 339270e0c3eSMasahiro Yamada interrupts = <0 245 4>; 340270e0c3eSMasahiro Yamada pinctrl-names = "default"; 341270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_usb2>; 342270e0c3eSMasahiro Yamada clocks = <&mio_clk 7>, <&mio_clk 10>, <&mio_clk 14>; 343270e0c3eSMasahiro Yamada resets = <&mio_rst 7>, <&mio_rst 10>, <&mio_rst 14>, <&sys_rst 8>; 344270e0c3eSMasahiro Yamada }; 345270e0c3eSMasahiro Yamada 346270e0c3eSMasahiro Yamada mioctrl@5b3e0000 { 347fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld11-mioctrl", 348270e0c3eSMasahiro Yamada "simple-mfd", "syscon"; 349270e0c3eSMasahiro Yamada reg = <0x5b3e0000 0x800>; 350270e0c3eSMasahiro Yamada 351270e0c3eSMasahiro Yamada mio_clk: clock { 352270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-mio-clock"; 353270e0c3eSMasahiro Yamada #clock-cells = <1>; 354270e0c3eSMasahiro Yamada }; 355270e0c3eSMasahiro Yamada 356270e0c3eSMasahiro Yamada mio_rst: reset { 357270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-mio-reset"; 358270e0c3eSMasahiro Yamada #reset-cells = <1>; 359270e0c3eSMasahiro Yamada resets = <&sys_rst 7>; 360270e0c3eSMasahiro Yamada }; 361270e0c3eSMasahiro Yamada }; 362270e0c3eSMasahiro Yamada 363270e0c3eSMasahiro Yamada soc-glue@5f800000 { 364fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld11-soc-glue", 365270e0c3eSMasahiro Yamada "simple-mfd", "syscon"; 366270e0c3eSMasahiro Yamada reg = <0x5f800000 0x2000>; 367270e0c3eSMasahiro Yamada 368270e0c3eSMasahiro Yamada pinctrl: pinctrl { 369270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-pinctrl"; 370270e0c3eSMasahiro Yamada }; 371270e0c3eSMasahiro Yamada }; 372270e0c3eSMasahiro Yamada 373270e0c3eSMasahiro Yamada gic: interrupt-controller@5fe00000 { 374270e0c3eSMasahiro Yamada compatible = "arm,gic-v3"; 375270e0c3eSMasahiro Yamada reg = <0x5fe00000 0x10000>, /* GICD */ 376270e0c3eSMasahiro Yamada <0x5fe40000 0x80000>; /* GICR */ 377270e0c3eSMasahiro Yamada interrupt-controller; 378270e0c3eSMasahiro Yamada #interrupt-cells = <3>; 379270e0c3eSMasahiro Yamada interrupts = <1 9 4>; 380270e0c3eSMasahiro Yamada }; 381270e0c3eSMasahiro Yamada 382270e0c3eSMasahiro Yamada sysctrl@61840000 { 383270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-sysctrl", 384270e0c3eSMasahiro Yamada "simple-mfd", "syscon"; 3851ef64af8SMasahiro Yamada reg = <0x61840000 0x10000>; 386270e0c3eSMasahiro Yamada 387270e0c3eSMasahiro Yamada sys_clk: clock { 388270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-clock"; 389270e0c3eSMasahiro Yamada #clock-cells = <1>; 390270e0c3eSMasahiro Yamada }; 391270e0c3eSMasahiro Yamada 392270e0c3eSMasahiro Yamada sys_rst: reset { 393270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-reset"; 394270e0c3eSMasahiro Yamada #reset-cells = <1>; 395270e0c3eSMasahiro Yamada }; 396270e0c3eSMasahiro Yamada }; 397270e0c3eSMasahiro Yamada }; 398270e0c3eSMasahiro Yamada}; 399270e0c3eSMasahiro Yamada 400270e0c3eSMasahiro Yamada/include/ "uniphier-pinctrl.dtsi" 401