105f7e3d1SMasahiro Yamada// SPDX-License-Identifier: GPL-2.0+ OR MIT 205f7e3d1SMasahiro Yamada// 305f7e3d1SMasahiro Yamada// Device Tree Source for UniPhier LD11 SoC 405f7e3d1SMasahiro Yamada// 505f7e3d1SMasahiro Yamada// Copyright (C) 2016 Socionext Inc. 605f7e3d1SMasahiro Yamada// Author: Masahiro Yamada <yamada.masahiro@socionext.com> 7270e0c3eSMasahiro Yamada 8b6e5ec20SMasahiro Yamada#include <dt-bindings/gpio/gpio.h> 98311ca57SMasahiro Yamada#include <dt-bindings/gpio/uniphier-gpio.h> 10b6e5ec20SMasahiro Yamada 1179d4be39SMasahiro Yamada/memreserve/ 0x80000000 0x02000000; 12270e0c3eSMasahiro Yamada 13270e0c3eSMasahiro Yamada/ { 14270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11"; 15270e0c3eSMasahiro Yamada #address-cells = <2>; 16270e0c3eSMasahiro Yamada #size-cells = <2>; 17270e0c3eSMasahiro Yamada interrupt-parent = <&gic>; 18270e0c3eSMasahiro Yamada 19270e0c3eSMasahiro Yamada cpus { 20270e0c3eSMasahiro Yamada #address-cells = <2>; 21270e0c3eSMasahiro Yamada #size-cells = <0>; 22270e0c3eSMasahiro Yamada 23270e0c3eSMasahiro Yamada cpu-map { 24270e0c3eSMasahiro Yamada cluster0 { 25270e0c3eSMasahiro Yamada core0 { 26270e0c3eSMasahiro Yamada cpu = <&cpu0>; 27270e0c3eSMasahiro Yamada }; 28270e0c3eSMasahiro Yamada core1 { 29270e0c3eSMasahiro Yamada cpu = <&cpu1>; 30270e0c3eSMasahiro Yamada }; 31270e0c3eSMasahiro Yamada }; 32270e0c3eSMasahiro Yamada }; 33270e0c3eSMasahiro Yamada 34270e0c3eSMasahiro Yamada cpu0: cpu@0 { 35270e0c3eSMasahiro Yamada device_type = "cpu"; 36270e0c3eSMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 37270e0c3eSMasahiro Yamada reg = <0 0x000>; 38bdb81836SMasahiro Yamada clocks = <&sys_clk 33>; 392f81137fSMasahiro Yamada enable-method = "psci"; 40bdb81836SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 41270e0c3eSMasahiro Yamada }; 42270e0c3eSMasahiro Yamada 43270e0c3eSMasahiro Yamada cpu1: cpu@1 { 44270e0c3eSMasahiro Yamada device_type = "cpu"; 45270e0c3eSMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 46270e0c3eSMasahiro Yamada reg = <0 0x001>; 47bdb81836SMasahiro Yamada clocks = <&sys_clk 33>; 482f81137fSMasahiro Yamada enable-method = "psci"; 49bdb81836SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 50bdb81836SMasahiro Yamada }; 51bdb81836SMasahiro Yamada }; 52bdb81836SMasahiro Yamada 539cd7d03fSMasahiro Yamada cluster0_opp: opp-table { 54bdb81836SMasahiro Yamada compatible = "operating-points-v2"; 55bdb81836SMasahiro Yamada opp-shared; 56bdb81836SMasahiro Yamada 573fc9a121SViresh Kumar opp-245000000 { 58bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <245000000>; 59bdb81836SMasahiro Yamada clock-latency-ns = <300>; 60bdb81836SMasahiro Yamada }; 613fc9a121SViresh Kumar opp-250000000 { 62bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 63bdb81836SMasahiro Yamada clock-latency-ns = <300>; 64bdb81836SMasahiro Yamada }; 653fc9a121SViresh Kumar opp-490000000 { 66bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <490000000>; 67bdb81836SMasahiro Yamada clock-latency-ns = <300>; 68bdb81836SMasahiro Yamada }; 693fc9a121SViresh Kumar opp-500000000 { 70bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 71bdb81836SMasahiro Yamada clock-latency-ns = <300>; 72bdb81836SMasahiro Yamada }; 733fc9a121SViresh Kumar opp-653334000 { 74bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <653334000>; 75bdb81836SMasahiro Yamada clock-latency-ns = <300>; 76bdb81836SMasahiro Yamada }; 773fc9a121SViresh Kumar opp-666667000 { 78bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 79bdb81836SMasahiro Yamada clock-latency-ns = <300>; 80bdb81836SMasahiro Yamada }; 813fc9a121SViresh Kumar opp-980000000 { 82bdb81836SMasahiro Yamada opp-hz = /bits/ 64 <980000000>; 83bdb81836SMasahiro Yamada clock-latency-ns = <300>; 84270e0c3eSMasahiro Yamada }; 85270e0c3eSMasahiro Yamada }; 86270e0c3eSMasahiro Yamada 872f81137fSMasahiro Yamada psci { 882f81137fSMasahiro Yamada compatible = "arm,psci-1.0"; 892f81137fSMasahiro Yamada method = "smc"; 902f81137fSMasahiro Yamada }; 912f81137fSMasahiro Yamada 92270e0c3eSMasahiro Yamada clocks { 93270e0c3eSMasahiro Yamada refclk: ref { 94270e0c3eSMasahiro Yamada compatible = "fixed-clock"; 95270e0c3eSMasahiro Yamada #clock-cells = <0>; 96270e0c3eSMasahiro Yamada clock-frequency = <25000000>; 97270e0c3eSMasahiro Yamada }; 98270e0c3eSMasahiro Yamada }; 99270e0c3eSMasahiro Yamada 100b6e5ec20SMasahiro Yamada emmc_pwrseq: emmc-pwrseq { 101b6e5ec20SMasahiro Yamada compatible = "mmc-pwrseq-emmc"; 1028311ca57SMasahiro Yamada reset-gpios = <&gpio UNIPHIER_GPIO_PORT(3, 2) GPIO_ACTIVE_LOW>; 103b6e5ec20SMasahiro Yamada }; 104b6e5ec20SMasahiro Yamada 105270e0c3eSMasahiro Yamada timer { 106270e0c3eSMasahiro Yamada compatible = "arm,armv8-timer"; 107270e0c3eSMasahiro Yamada interrupts = <1 13 4>, 108270e0c3eSMasahiro Yamada <1 14 4>, 109270e0c3eSMasahiro Yamada <1 11 4>, 110270e0c3eSMasahiro Yamada <1 10 4>; 111270e0c3eSMasahiro Yamada }; 112270e0c3eSMasahiro Yamada 113b5027603SMasahiro Yamada soc@0 { 114270e0c3eSMasahiro Yamada compatible = "simple-bus"; 115270e0c3eSMasahiro Yamada #address-cells = <1>; 116270e0c3eSMasahiro Yamada #size-cells = <1>; 117270e0c3eSMasahiro Yamada ranges = <0 0 0 0xffffffff>; 118270e0c3eSMasahiro Yamada 119270e0c3eSMasahiro Yamada serial0: serial@54006800 { 120270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-uart"; 121270e0c3eSMasahiro Yamada status = "disabled"; 122270e0c3eSMasahiro Yamada reg = <0x54006800 0x40>; 123270e0c3eSMasahiro Yamada interrupts = <0 33 4>; 124270e0c3eSMasahiro Yamada pinctrl-names = "default"; 125270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_uart0>; 126270e0c3eSMasahiro Yamada clocks = <&peri_clk 0>; 12776c48e1eSMasahiro Yamada resets = <&peri_rst 0>; 128270e0c3eSMasahiro Yamada }; 129270e0c3eSMasahiro Yamada 130270e0c3eSMasahiro Yamada serial1: serial@54006900 { 131270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-uart"; 132270e0c3eSMasahiro Yamada status = "disabled"; 133270e0c3eSMasahiro Yamada reg = <0x54006900 0x40>; 134270e0c3eSMasahiro Yamada interrupts = <0 35 4>; 135270e0c3eSMasahiro Yamada pinctrl-names = "default"; 136270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_uart1>; 137270e0c3eSMasahiro Yamada clocks = <&peri_clk 1>; 13876c48e1eSMasahiro Yamada resets = <&peri_rst 1>; 139270e0c3eSMasahiro Yamada }; 140270e0c3eSMasahiro Yamada 141270e0c3eSMasahiro Yamada serial2: serial@54006a00 { 142270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-uart"; 143270e0c3eSMasahiro Yamada status = "disabled"; 144270e0c3eSMasahiro Yamada reg = <0x54006a00 0x40>; 145270e0c3eSMasahiro Yamada interrupts = <0 37 4>; 146270e0c3eSMasahiro Yamada pinctrl-names = "default"; 147270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_uart2>; 148270e0c3eSMasahiro Yamada clocks = <&peri_clk 2>; 14976c48e1eSMasahiro Yamada resets = <&peri_rst 2>; 150270e0c3eSMasahiro Yamada }; 151270e0c3eSMasahiro Yamada 152270e0c3eSMasahiro Yamada serial3: serial@54006b00 { 153270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-uart"; 154270e0c3eSMasahiro Yamada status = "disabled"; 155270e0c3eSMasahiro Yamada reg = <0x54006b00 0x40>; 156270e0c3eSMasahiro Yamada interrupts = <0 177 4>; 157270e0c3eSMasahiro Yamada pinctrl-names = "default"; 158270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_uart3>; 159270e0c3eSMasahiro Yamada clocks = <&peri_clk 3>; 16076c48e1eSMasahiro Yamada resets = <&peri_rst 3>; 161270e0c3eSMasahiro Yamada }; 162270e0c3eSMasahiro Yamada 163277b51e7SMasahiro Yamada gpio: gpio@55000000 { 164277b51e7SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 165277b51e7SMasahiro Yamada reg = <0x55000000 0x200>; 166277b51e7SMasahiro Yamada interrupt-parent = <&aidet>; 167277b51e7SMasahiro Yamada interrupt-controller; 168277b51e7SMasahiro Yamada #interrupt-cells = <2>; 169277b51e7SMasahiro Yamada gpio-controller; 170277b51e7SMasahiro Yamada #gpio-cells = <2>; 171277b51e7SMasahiro Yamada gpio-ranges = <&pinctrl 0 0 0>, 172277b51e7SMasahiro Yamada <&pinctrl 43 0 0>, 173277b51e7SMasahiro Yamada <&pinctrl 51 0 0>, 174277b51e7SMasahiro Yamada <&pinctrl 96 0 0>, 175277b51e7SMasahiro Yamada <&pinctrl 160 0 0>, 176277b51e7SMasahiro Yamada <&pinctrl 184 0 0>; 177277b51e7SMasahiro Yamada gpio-ranges-group-names = "gpio_range0", 178277b51e7SMasahiro Yamada "gpio_range1", 179277b51e7SMasahiro Yamada "gpio_range2", 180277b51e7SMasahiro Yamada "gpio_range3", 181277b51e7SMasahiro Yamada "gpio_range4", 182277b51e7SMasahiro Yamada "gpio_range5"; 183277b51e7SMasahiro Yamada ngpios = <200>; 184277b51e7SMasahiro Yamada socionext,interrupt-ranges = <0 48 16>, <16 154 5>, 185277b51e7SMasahiro Yamada <21 217 3>; 186270e0c3eSMasahiro Yamada }; 187270e0c3eSMasahiro Yamada 188fb21a0acSKatsuhiro Suzuki audio@56000000 { 189fb21a0acSKatsuhiro Suzuki compatible = "socionext,uniphier-ld11-aio"; 190fb21a0acSKatsuhiro Suzuki reg = <0x56000000 0x80000>; 191fb21a0acSKatsuhiro Suzuki interrupts = <0 144 4>; 192fb21a0acSKatsuhiro Suzuki pinctrl-names = "default"; 193fb21a0acSKatsuhiro Suzuki pinctrl-0 = <&pinctrl_aout1>, 194fb21a0acSKatsuhiro Suzuki <&pinctrl_aoutiec1>; 195fb21a0acSKatsuhiro Suzuki clock-names = "aio"; 196fb21a0acSKatsuhiro Suzuki clocks = <&sys_clk 40>; 197fb21a0acSKatsuhiro Suzuki reset-names = "aio"; 198fb21a0acSKatsuhiro Suzuki resets = <&sys_rst 40>; 199fb21a0acSKatsuhiro Suzuki #sound-dai-cells = <1>; 200fb21a0acSKatsuhiro Suzuki 201fb21a0acSKatsuhiro Suzuki i2s_port0: port@0 { 202fb21a0acSKatsuhiro Suzuki i2s_hdmi: endpoint { 203fb21a0acSKatsuhiro Suzuki }; 204fb21a0acSKatsuhiro Suzuki }; 205fb21a0acSKatsuhiro Suzuki 206fb21a0acSKatsuhiro Suzuki i2s_port1: port@1 { 207fb21a0acSKatsuhiro Suzuki i2s_pcmin2: endpoint { 208fb21a0acSKatsuhiro Suzuki }; 209fb21a0acSKatsuhiro Suzuki }; 210fb21a0acSKatsuhiro Suzuki 211fb21a0acSKatsuhiro Suzuki i2s_port2: port@2 { 212fb21a0acSKatsuhiro Suzuki i2s_line: endpoint { 213fb21a0acSKatsuhiro Suzuki dai-format = "i2s"; 214fb21a0acSKatsuhiro Suzuki remote-endpoint = <&evea_line>; 215fb21a0acSKatsuhiro Suzuki }; 216fb21a0acSKatsuhiro Suzuki }; 217fb21a0acSKatsuhiro Suzuki 218fb21a0acSKatsuhiro Suzuki i2s_port3: port@3 { 219fb21a0acSKatsuhiro Suzuki i2s_hpcmout1: endpoint { 220fb21a0acSKatsuhiro Suzuki }; 221fb21a0acSKatsuhiro Suzuki }; 222fb21a0acSKatsuhiro Suzuki 223fb21a0acSKatsuhiro Suzuki i2s_port4: port@4 { 224fb21a0acSKatsuhiro Suzuki i2s_hp: endpoint { 225fb21a0acSKatsuhiro Suzuki dai-format = "i2s"; 226fb21a0acSKatsuhiro Suzuki remote-endpoint = <&evea_hp>; 227fb21a0acSKatsuhiro Suzuki }; 228fb21a0acSKatsuhiro Suzuki }; 229fb21a0acSKatsuhiro Suzuki 230fb21a0acSKatsuhiro Suzuki spdif_port0: port@5 { 231fb21a0acSKatsuhiro Suzuki spdif_hiecout1: endpoint { 232fb21a0acSKatsuhiro Suzuki }; 233fb21a0acSKatsuhiro Suzuki }; 234fb21a0acSKatsuhiro Suzuki 235fb21a0acSKatsuhiro Suzuki src_port0: port@6 { 236fb21a0acSKatsuhiro Suzuki i2s_epcmout2: endpoint { 237fb21a0acSKatsuhiro Suzuki }; 238fb21a0acSKatsuhiro Suzuki }; 239fb21a0acSKatsuhiro Suzuki 240fb21a0acSKatsuhiro Suzuki src_port1: port@7 { 241fb21a0acSKatsuhiro Suzuki i2s_epcmout3: endpoint { 242fb21a0acSKatsuhiro Suzuki }; 243fb21a0acSKatsuhiro Suzuki }; 244fb21a0acSKatsuhiro Suzuki 245fb21a0acSKatsuhiro Suzuki comp_spdif_port0: port@8 { 246fb21a0acSKatsuhiro Suzuki comp_spdif_hiecout1: endpoint { 247fb21a0acSKatsuhiro Suzuki }; 248fb21a0acSKatsuhiro Suzuki }; 249fb21a0acSKatsuhiro Suzuki }; 250fb21a0acSKatsuhiro Suzuki 251fb21a0acSKatsuhiro Suzuki codec@57900000 { 252fb21a0acSKatsuhiro Suzuki compatible = "socionext,uniphier-evea"; 253fb21a0acSKatsuhiro Suzuki reg = <0x57900000 0x1000>; 254fb21a0acSKatsuhiro Suzuki clock-names = "evea", "exiv"; 255fb21a0acSKatsuhiro Suzuki clocks = <&sys_clk 41>, <&sys_clk 42>; 256fb21a0acSKatsuhiro Suzuki reset-names = "evea", "exiv", "adamv"; 257fb21a0acSKatsuhiro Suzuki resets = <&sys_rst 41>, <&sys_rst 42>, <&adamv_rst 0>; 258fb21a0acSKatsuhiro Suzuki #sound-dai-cells = <1>; 259fb21a0acSKatsuhiro Suzuki 260fb21a0acSKatsuhiro Suzuki port@0 { 261fb21a0acSKatsuhiro Suzuki evea_line: endpoint { 262fb21a0acSKatsuhiro Suzuki remote-endpoint = <&i2s_line>; 263fb21a0acSKatsuhiro Suzuki }; 264fb21a0acSKatsuhiro Suzuki }; 265fb21a0acSKatsuhiro Suzuki 266fb21a0acSKatsuhiro Suzuki port@1 { 267fb21a0acSKatsuhiro Suzuki evea_hp: endpoint { 268fb21a0acSKatsuhiro Suzuki remote-endpoint = <&i2s_hp>; 269fb21a0acSKatsuhiro Suzuki }; 270fb21a0acSKatsuhiro Suzuki }; 271fb21a0acSKatsuhiro Suzuki }; 272fb21a0acSKatsuhiro Suzuki 273178b3568SKatsuhiro Suzuki adamv@57920000 { 274178b3568SKatsuhiro Suzuki compatible = "socionext,uniphier-ld11-adamv", 275178b3568SKatsuhiro Suzuki "simple-mfd", "syscon"; 276178b3568SKatsuhiro Suzuki reg = <0x57920000 0x1000>; 277178b3568SKatsuhiro Suzuki 278178b3568SKatsuhiro Suzuki adamv_rst: reset { 279178b3568SKatsuhiro Suzuki compatible = "socionext,uniphier-ld11-adamv-reset"; 280178b3568SKatsuhiro Suzuki #reset-cells = <1>; 281178b3568SKatsuhiro Suzuki }; 282178b3568SKatsuhiro Suzuki }; 283178b3568SKatsuhiro Suzuki 284270e0c3eSMasahiro Yamada i2c0: i2c@58780000 { 285270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 286270e0c3eSMasahiro Yamada status = "disabled"; 287270e0c3eSMasahiro Yamada reg = <0x58780000 0x80>; 288270e0c3eSMasahiro Yamada #address-cells = <1>; 289270e0c3eSMasahiro Yamada #size-cells = <0>; 290270e0c3eSMasahiro Yamada interrupts = <0 41 4>; 291270e0c3eSMasahiro Yamada pinctrl-names = "default"; 292270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c0>; 293270e0c3eSMasahiro Yamada clocks = <&peri_clk 4>; 29476c48e1eSMasahiro Yamada resets = <&peri_rst 4>; 295270e0c3eSMasahiro Yamada clock-frequency = <100000>; 296270e0c3eSMasahiro Yamada }; 297270e0c3eSMasahiro Yamada 298270e0c3eSMasahiro Yamada i2c1: i2c@58781000 { 299270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 300270e0c3eSMasahiro Yamada status = "disabled"; 301270e0c3eSMasahiro Yamada reg = <0x58781000 0x80>; 302270e0c3eSMasahiro Yamada #address-cells = <1>; 303270e0c3eSMasahiro Yamada #size-cells = <0>; 304270e0c3eSMasahiro Yamada interrupts = <0 42 4>; 305270e0c3eSMasahiro Yamada pinctrl-names = "default"; 306270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c1>; 307270e0c3eSMasahiro Yamada clocks = <&peri_clk 5>; 30876c48e1eSMasahiro Yamada resets = <&peri_rst 5>; 309270e0c3eSMasahiro Yamada clock-frequency = <100000>; 310270e0c3eSMasahiro Yamada }; 311270e0c3eSMasahiro Yamada 312270e0c3eSMasahiro Yamada i2c2: i2c@58782000 { 313270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 314270e0c3eSMasahiro Yamada reg = <0x58782000 0x80>; 315270e0c3eSMasahiro Yamada #address-cells = <1>; 316270e0c3eSMasahiro Yamada #size-cells = <0>; 317270e0c3eSMasahiro Yamada interrupts = <0 43 4>; 318270e0c3eSMasahiro Yamada clocks = <&peri_clk 6>; 31976c48e1eSMasahiro Yamada resets = <&peri_rst 6>; 320270e0c3eSMasahiro Yamada clock-frequency = <400000>; 321270e0c3eSMasahiro Yamada }; 322270e0c3eSMasahiro Yamada 323270e0c3eSMasahiro Yamada i2c3: i2c@58783000 { 324270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 325270e0c3eSMasahiro Yamada status = "disabled"; 326270e0c3eSMasahiro Yamada reg = <0x58783000 0x80>; 327270e0c3eSMasahiro Yamada #address-cells = <1>; 328270e0c3eSMasahiro Yamada #size-cells = <0>; 329270e0c3eSMasahiro Yamada interrupts = <0 44 4>; 330270e0c3eSMasahiro Yamada pinctrl-names = "default"; 331270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c3>; 332270e0c3eSMasahiro Yamada clocks = <&peri_clk 7>; 33376c48e1eSMasahiro Yamada resets = <&peri_rst 7>; 334270e0c3eSMasahiro Yamada clock-frequency = <100000>; 335270e0c3eSMasahiro Yamada }; 336270e0c3eSMasahiro Yamada 337270e0c3eSMasahiro Yamada i2c4: i2c@58784000 { 338270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 339270e0c3eSMasahiro Yamada status = "disabled"; 340270e0c3eSMasahiro Yamada reg = <0x58784000 0x80>; 341270e0c3eSMasahiro Yamada #address-cells = <1>; 342270e0c3eSMasahiro Yamada #size-cells = <0>; 343270e0c3eSMasahiro Yamada interrupts = <0 45 4>; 344270e0c3eSMasahiro Yamada pinctrl-names = "default"; 345270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c4>; 346270e0c3eSMasahiro Yamada clocks = <&peri_clk 8>; 34776c48e1eSMasahiro Yamada resets = <&peri_rst 8>; 348270e0c3eSMasahiro Yamada clock-frequency = <100000>; 349270e0c3eSMasahiro Yamada }; 350270e0c3eSMasahiro Yamada 351270e0c3eSMasahiro Yamada i2c5: i2c@58785000 { 352270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 353270e0c3eSMasahiro Yamada reg = <0x58785000 0x80>; 354270e0c3eSMasahiro Yamada #address-cells = <1>; 355270e0c3eSMasahiro Yamada #size-cells = <0>; 356270e0c3eSMasahiro Yamada interrupts = <0 25 4>; 357270e0c3eSMasahiro Yamada clocks = <&peri_clk 9>; 35876c48e1eSMasahiro Yamada resets = <&peri_rst 9>; 359270e0c3eSMasahiro Yamada clock-frequency = <400000>; 360270e0c3eSMasahiro Yamada }; 361270e0c3eSMasahiro Yamada 362270e0c3eSMasahiro Yamada system_bus: system-bus@58c00000 { 363270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-system-bus"; 364270e0c3eSMasahiro Yamada status = "disabled"; 365270e0c3eSMasahiro Yamada reg = <0x58c00000 0x400>; 366270e0c3eSMasahiro Yamada #address-cells = <2>; 367270e0c3eSMasahiro Yamada #size-cells = <1>; 368270e0c3eSMasahiro Yamada pinctrl-names = "default"; 369270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_system_bus>; 370270e0c3eSMasahiro Yamada }; 371270e0c3eSMasahiro Yamada 372b10ee7e3SMasahiro Yamada smpctrl@59801000 { 373270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-smpctrl"; 374270e0c3eSMasahiro Yamada reg = <0x59801000 0x400>; 375270e0c3eSMasahiro Yamada }; 376270e0c3eSMasahiro Yamada 3778f32b812SMasahiro Yamada sdctrl@59810000 { 3788f32b812SMasahiro Yamada compatible = "socionext,uniphier-ld11-sdctrl", 3798f32b812SMasahiro Yamada "simple-mfd", "syscon"; 3808f32b812SMasahiro Yamada reg = <0x59810000 0x400>; 3818f32b812SMasahiro Yamada 3828f32b812SMasahiro Yamada sd_rst: reset { 3838f32b812SMasahiro Yamada compatible = "socionext,uniphier-ld11-sd-reset"; 3848f32b812SMasahiro Yamada #reset-cells = <1>; 3858f32b812SMasahiro Yamada }; 3868f32b812SMasahiro Yamada }; 3878f32b812SMasahiro Yamada 388270e0c3eSMasahiro Yamada perictrl@59820000 { 389fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld11-perictrl", 390270e0c3eSMasahiro Yamada "simple-mfd", "syscon"; 391270e0c3eSMasahiro Yamada reg = <0x59820000 0x200>; 392270e0c3eSMasahiro Yamada 393270e0c3eSMasahiro Yamada peri_clk: clock { 394270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-peri-clock"; 395270e0c3eSMasahiro Yamada #clock-cells = <1>; 396270e0c3eSMasahiro Yamada }; 397270e0c3eSMasahiro Yamada 398270e0c3eSMasahiro Yamada peri_rst: reset { 399270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-peri-reset"; 400270e0c3eSMasahiro Yamada #reset-cells = <1>; 401270e0c3eSMasahiro Yamada }; 402270e0c3eSMasahiro Yamada }; 403270e0c3eSMasahiro Yamada 4043a93cc26SMasahiro Yamada emmc: sdhc@5a000000 { 4053a93cc26SMasahiro Yamada compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; 4063a93cc26SMasahiro Yamada reg = <0x5a000000 0x400>; 4073a93cc26SMasahiro Yamada interrupts = <0 78 4>; 4089c0a9700SMasahiro Yamada pinctrl-names = "default"; 4099c0a9700SMasahiro Yamada pinctrl-0 = <&pinctrl_emmc>; 4103a93cc26SMasahiro Yamada clocks = <&sys_clk 4>; 41176c48e1eSMasahiro Yamada resets = <&sys_rst 4>; 4123a93cc26SMasahiro Yamada bus-width = <8>; 4133a93cc26SMasahiro Yamada mmc-ddr-1_8v; 4143a93cc26SMasahiro Yamada mmc-hs200-1_8v; 415b6e5ec20SMasahiro Yamada mmc-pwrseq = <&emmc_pwrseq>; 416ba6f7011SMasahiro Yamada cdns,phy-input-delay-legacy = <4>; 417ba6f7011SMasahiro Yamada cdns,phy-input-delay-mmc-highspeed = <2>; 418ba6f7011SMasahiro Yamada cdns,phy-input-delay-mmc-ddr = <3>; 419e345ededSMasahiro Yamada cdns,phy-dll-delay-sdclk = <21>; 420e345ededSMasahiro Yamada cdns,phy-dll-delay-sdclk-hsmmc = <21>; 4213a93cc26SMasahiro Yamada }; 4223a93cc26SMasahiro Yamada 423270e0c3eSMasahiro Yamada usb0: usb@5a800100 { 424270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ehci", "generic-ehci"; 425270e0c3eSMasahiro Yamada status = "disabled"; 426270e0c3eSMasahiro Yamada reg = <0x5a800100 0x100>; 427270e0c3eSMasahiro Yamada interrupts = <0 243 4>; 428270e0c3eSMasahiro Yamada pinctrl-names = "default"; 429270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_usb0>; 430deaa5519SMasahiro Yamada clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>, 431deaa5519SMasahiro Yamada <&mio_clk 12>; 4327a201e31SMasahiro Yamada resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>, 4337a201e31SMasahiro Yamada <&mio_rst 12>; 43431f1961dSKunihiko Hayashi has-transaction-translator; 435270e0c3eSMasahiro Yamada }; 436270e0c3eSMasahiro Yamada 437270e0c3eSMasahiro Yamada usb1: usb@5a810100 { 438270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ehci", "generic-ehci"; 439270e0c3eSMasahiro Yamada status = "disabled"; 440270e0c3eSMasahiro Yamada reg = <0x5a810100 0x100>; 441270e0c3eSMasahiro Yamada interrupts = <0 244 4>; 442270e0c3eSMasahiro Yamada pinctrl-names = "default"; 443270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_usb1>; 444deaa5519SMasahiro Yamada clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>, 445deaa5519SMasahiro Yamada <&mio_clk 13>; 4467a201e31SMasahiro Yamada resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>, 4477a201e31SMasahiro Yamada <&mio_rst 13>; 44831f1961dSKunihiko Hayashi has-transaction-translator; 449270e0c3eSMasahiro Yamada }; 450270e0c3eSMasahiro Yamada 451270e0c3eSMasahiro Yamada usb2: usb@5a820100 { 452270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ehci", "generic-ehci"; 453270e0c3eSMasahiro Yamada status = "disabled"; 454270e0c3eSMasahiro Yamada reg = <0x5a820100 0x100>; 455270e0c3eSMasahiro Yamada interrupts = <0 245 4>; 456270e0c3eSMasahiro Yamada pinctrl-names = "default"; 457270e0c3eSMasahiro Yamada pinctrl-0 = <&pinctrl_usb2>; 458deaa5519SMasahiro Yamada clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 10>, 459deaa5519SMasahiro Yamada <&mio_clk 14>; 4607a201e31SMasahiro Yamada resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>, 4617a201e31SMasahiro Yamada <&mio_rst 14>; 46231f1961dSKunihiko Hayashi has-transaction-translator; 463270e0c3eSMasahiro Yamada }; 464270e0c3eSMasahiro Yamada 465270e0c3eSMasahiro Yamada mioctrl@5b3e0000 { 466fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld11-mioctrl", 467270e0c3eSMasahiro Yamada "simple-mfd", "syscon"; 468270e0c3eSMasahiro Yamada reg = <0x5b3e0000 0x800>; 469270e0c3eSMasahiro Yamada 470270e0c3eSMasahiro Yamada mio_clk: clock { 471270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-mio-clock"; 472270e0c3eSMasahiro Yamada #clock-cells = <1>; 473270e0c3eSMasahiro Yamada }; 474270e0c3eSMasahiro Yamada 475270e0c3eSMasahiro Yamada mio_rst: reset { 476270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-mio-reset"; 477270e0c3eSMasahiro Yamada #reset-cells = <1>; 478270e0c3eSMasahiro Yamada resets = <&sys_rst 7>; 479270e0c3eSMasahiro Yamada }; 480270e0c3eSMasahiro Yamada }; 481270e0c3eSMasahiro Yamada 482270e0c3eSMasahiro Yamada soc-glue@5f800000 { 483fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld11-soc-glue", 484270e0c3eSMasahiro Yamada "simple-mfd", "syscon"; 485270e0c3eSMasahiro Yamada reg = <0x5f800000 0x2000>; 486270e0c3eSMasahiro Yamada 487270e0c3eSMasahiro Yamada pinctrl: pinctrl { 488270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-pinctrl"; 489270e0c3eSMasahiro Yamada }; 490270e0c3eSMasahiro Yamada }; 491270e0c3eSMasahiro Yamada 492f05851e1SKeiji Hayashibara soc-glue@5f900000 { 493f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-ld11-soc-glue-debug", 494f05851e1SKeiji Hayashibara "simple-mfd"; 495f05851e1SKeiji Hayashibara #address-cells = <1>; 496f05851e1SKeiji Hayashibara #size-cells = <1>; 497f05851e1SKeiji Hayashibara ranges = <0 0x5f900000 0x2000>; 498f05851e1SKeiji Hayashibara 499f05851e1SKeiji Hayashibara efuse@100 { 500f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 501f05851e1SKeiji Hayashibara reg = <0x100 0x28>; 502f05851e1SKeiji Hayashibara }; 503f05851e1SKeiji Hayashibara 504f05851e1SKeiji Hayashibara efuse@200 { 505f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 506f05851e1SKeiji Hayashibara reg = <0x200 0x68>; 507f05851e1SKeiji Hayashibara }; 508f05851e1SKeiji Hayashibara }; 509f05851e1SKeiji Hayashibara 5103dfc6e98SMasahiro Yamada aidet: aidet@5fc20000 { 5113dfc6e98SMasahiro Yamada compatible = "socionext,uniphier-ld11-aidet"; 5123dfc6e98SMasahiro Yamada reg = <0x5fc20000 0x200>; 5133dfc6e98SMasahiro Yamada interrupt-controller; 5143dfc6e98SMasahiro Yamada #interrupt-cells = <2>; 5153dfc6e98SMasahiro Yamada }; 5163dfc6e98SMasahiro Yamada 517270e0c3eSMasahiro Yamada gic: interrupt-controller@5fe00000 { 518270e0c3eSMasahiro Yamada compatible = "arm,gic-v3"; 519270e0c3eSMasahiro Yamada reg = <0x5fe00000 0x10000>, /* GICD */ 520270e0c3eSMasahiro Yamada <0x5fe40000 0x80000>; /* GICR */ 521270e0c3eSMasahiro Yamada interrupt-controller; 522270e0c3eSMasahiro Yamada #interrupt-cells = <3>; 523270e0c3eSMasahiro Yamada interrupts = <1 9 4>; 524270e0c3eSMasahiro Yamada }; 525270e0c3eSMasahiro Yamada 526270e0c3eSMasahiro Yamada sysctrl@61840000 { 527270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-sysctrl", 528270e0c3eSMasahiro Yamada "simple-mfd", "syscon"; 5291ef64af8SMasahiro Yamada reg = <0x61840000 0x10000>; 530270e0c3eSMasahiro Yamada 531270e0c3eSMasahiro Yamada sys_clk: clock { 532270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-clock"; 533270e0c3eSMasahiro Yamada #clock-cells = <1>; 534270e0c3eSMasahiro Yamada }; 535270e0c3eSMasahiro Yamada 536270e0c3eSMasahiro Yamada sys_rst: reset { 537270e0c3eSMasahiro Yamada compatible = "socionext,uniphier-ld11-reset"; 538270e0c3eSMasahiro Yamada #reset-cells = <1>; 539270e0c3eSMasahiro Yamada }; 5404c4c960aSKeiji Hayashibara 5414c4c960aSKeiji Hayashibara watchdog { 5424c4c960aSKeiji Hayashibara compatible = "socionext,uniphier-wdt"; 5434c4c960aSKeiji Hayashibara }; 544270e0c3eSMasahiro Yamada }; 545e5aefb38SMasahiro Yamada 546c73730eeSKunihiko Hayashi eth: ethernet@65000000 { 547c73730eeSKunihiko Hayashi compatible = "socionext,uniphier-ld11-ave4"; 548c73730eeSKunihiko Hayashi status = "disabled"; 549c73730eeSKunihiko Hayashi reg = <0x65000000 0x8500>; 550c73730eeSKunihiko Hayashi interrupts = <0 66 4>; 551c73730eeSKunihiko Hayashi clocks = <&sys_clk 6>; 552c73730eeSKunihiko Hayashi resets = <&sys_rst 6>; 553c73730eeSKunihiko Hayashi phy-mode = "rmii"; 554c73730eeSKunihiko Hayashi local-mac-address = [00 00 00 00 00 00]; 555c73730eeSKunihiko Hayashi 556c73730eeSKunihiko Hayashi mdio: mdio { 557c73730eeSKunihiko Hayashi #address-cells = <1>; 558c73730eeSKunihiko Hayashi #size-cells = <0>; 559c73730eeSKunihiko Hayashi }; 560c73730eeSKunihiko Hayashi }; 561c73730eeSKunihiko Hayashi 562e5aefb38SMasahiro Yamada nand: nand@68000000 { 563e5aefb38SMasahiro Yamada compatible = "socionext,uniphier-denali-nand-v5b"; 564e5aefb38SMasahiro Yamada status = "disabled"; 565e5aefb38SMasahiro Yamada reg-names = "nand_data", "denali_reg"; 566e5aefb38SMasahiro Yamada reg = <0x68000000 0x20>, <0x68100000 0x1000>; 567e5aefb38SMasahiro Yamada interrupts = <0 65 4>; 568e5aefb38SMasahiro Yamada pinctrl-names = "default"; 569e5aefb38SMasahiro Yamada pinctrl-0 = <&pinctrl_nand>; 570e5aefb38SMasahiro Yamada clocks = <&sys_clk 2>; 57176c48e1eSMasahiro Yamada resets = <&sys_rst 2>; 572e5aefb38SMasahiro Yamada }; 573270e0c3eSMasahiro Yamada }; 574270e0c3eSMasahiro Yamada}; 575270e0c3eSMasahiro Yamada 5765740ea4eSMasahiro Yamada#include "uniphier-pinctrl.dtsi" 577fb21a0acSKatsuhiro Suzuki 578fb21a0acSKatsuhiro Suzuki&pinctrl_aoutiec1 { 579fb21a0acSKatsuhiro Suzuki drive-strength = <4>; /* default: 4mA */ 580fb21a0acSKatsuhiro Suzuki 581fb21a0acSKatsuhiro Suzuki ao1arc { 582fb21a0acSKatsuhiro Suzuki pins = "AO1ARC"; 583fb21a0acSKatsuhiro Suzuki drive-strength = <8>; /* 8mA */ 584fb21a0acSKatsuhiro Suzuki }; 585fb21a0acSKatsuhiro Suzuki}; 586