1ce0c63b6SBiju Das// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2ce0c63b6SBiju Das/* 3ce0c63b6SBiju Das * Device Tree Source for the RZ/G2LC SMARC pincontrol parts 4ce0c63b6SBiju Das * 5ce0c63b6SBiju Das * Copyright (C) 2021 Renesas Electronics Corp. 6ce0c63b6SBiju Das */ 7ce0c63b6SBiju Das 8ce0c63b6SBiju Das#include <dt-bindings/gpio/gpio.h> 9ce0c63b6SBiju Das#include <dt-bindings/pinctrl/rzg2l-pinctrl.h> 10ce0c63b6SBiju Das 11ce0c63b6SBiju Das&pinctrl { 12ce0c63b6SBiju Das pinctrl-0 = <&sound_clk_pins>; 13ce0c63b6SBiju Das pinctrl-names = "default"; 14ce0c63b6SBiju Das 15ce0c63b6SBiju Das scif0_pins: scif0 { 16ce0c63b6SBiju Das pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>, /* TxD */ 17ce0c63b6SBiju Das <RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */ 18ce0c63b6SBiju Das }; 19ce0c63b6SBiju Das 20*81a27b1fSBiju Das sd1-pwr-en-hog { 21*81a27b1fSBiju Das gpio-hog; 22*81a27b1fSBiju Das gpios = <RZG2L_GPIO(39, 2) GPIO_ACTIVE_HIGH>; 23*81a27b1fSBiju Das output-high; 24*81a27b1fSBiju Das line-name = "sd1_pwr_en"; 25*81a27b1fSBiju Das }; 26*81a27b1fSBiju Das 27*81a27b1fSBiju Das sdhi1_pins: sd1 { 28*81a27b1fSBiju Das sd1_data { 29*81a27b1fSBiju Das pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3"; 30*81a27b1fSBiju Das power-source = <3300>; 31*81a27b1fSBiju Das }; 32*81a27b1fSBiju Das 33*81a27b1fSBiju Das sd1_ctrl { 34*81a27b1fSBiju Das pins = "SD1_CLK", "SD1_CMD"; 35*81a27b1fSBiju Das power-source = <3300>; 36*81a27b1fSBiju Das }; 37*81a27b1fSBiju Das 38*81a27b1fSBiju Das sd1_mux { 39*81a27b1fSBiju Das pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */ 40*81a27b1fSBiju Das }; 41*81a27b1fSBiju Das }; 42*81a27b1fSBiju Das 43*81a27b1fSBiju Das sdhi1_pins_uhs: sd1_uhs { 44*81a27b1fSBiju Das sd1_data_uhs { 45*81a27b1fSBiju Das pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3"; 46*81a27b1fSBiju Das power-source = <1800>; 47*81a27b1fSBiju Das }; 48*81a27b1fSBiju Das 49*81a27b1fSBiju Das sd1_ctrl_uhs { 50*81a27b1fSBiju Das pins = "SD1_CLK", "SD1_CMD"; 51*81a27b1fSBiju Das power-source = <1800>; 52*81a27b1fSBiju Das }; 53*81a27b1fSBiju Das 54*81a27b1fSBiju Das sd1_mux_uhs { 55*81a27b1fSBiju Das pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */ 56*81a27b1fSBiju Das }; 57*81a27b1fSBiju Das }; 58*81a27b1fSBiju Das 59ce0c63b6SBiju Das sound_clk_pins: sound_clk { 60ce0c63b6SBiju Das pins = "AUDIO_CLK1", "AUDIO_CLK2"; 61ce0c63b6SBiju Das input-enable; 62ce0c63b6SBiju Das }; 63ce0c63b6SBiju Das}; 64ce0c63b6SBiju Das 65