1ce0c63b6SBiju Das// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2ce0c63b6SBiju Das/* 3ce0c63b6SBiju Das * Device Tree Source for the RZ/G2LC SMARC pincontrol parts 4ce0c63b6SBiju Das * 5ce0c63b6SBiju Das * Copyright (C) 2021 Renesas Electronics Corp. 6ce0c63b6SBiju Das */ 7ce0c63b6SBiju Das 8ce0c63b6SBiju Das#include <dt-bindings/gpio/gpio.h> 9ce0c63b6SBiju Das#include <dt-bindings/pinctrl/rzg2l-pinctrl.h> 10ce0c63b6SBiju Das 11ce0c63b6SBiju Das&pinctrl { 12ce0c63b6SBiju Das pinctrl-0 = <&sound_clk_pins>; 13ce0c63b6SBiju Das pinctrl-names = "default"; 14ce0c63b6SBiju Das 15ce0c63b6SBiju Das scif0_pins: scif0 { 16ce0c63b6SBiju Das pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>, /* TxD */ 17ce0c63b6SBiju Das <RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */ 18ce0c63b6SBiju Das }; 19ce0c63b6SBiju Das 2046da6327SBiju Das#if SW_SCIF_CAN 2146da6327SBiju Das /* SW8 should be at position 2->1 */ 2246da6327SBiju Das can1_pins: can1 { 2346da6327SBiju Das pinmux = <RZG2L_PORT_PINMUX(40, 0, 3)>, /* TxD */ 2446da6327SBiju Das <RZG2L_PORT_PINMUX(40, 1, 3)>; /* RxD */ 2546da6327SBiju Das }; 2646da6327SBiju Das#endif 2746da6327SBiju Das 28fa00d6dcSBiju Das scif1_pins: scif1 { 29fa00d6dcSBiju Das pinmux = <RZG2L_PORT_PINMUX(40, 0, 1)>, /* TxD */ 30fa00d6dcSBiju Das <RZG2L_PORT_PINMUX(40, 1, 1)>, /* RxD */ 31fa00d6dcSBiju Das <RZG2L_PORT_PINMUX(41, 0, 1)>, /* CTS# */ 32fa00d6dcSBiju Das <RZG2L_PORT_PINMUX(41, 1, 1)>; /* RTS# */ 33fa00d6dcSBiju Das }; 34fa00d6dcSBiju Das 3546da6327SBiju Das#if SW_RSPI_CAN 3646da6327SBiju Das /* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */ 37*48d8ee5bSGeert Uytterhoeven can1-stb-hog { 3846da6327SBiju Das gpio-hog; 3946da6327SBiju Das gpios = <RZG2L_GPIO(44, 3) GPIO_ACTIVE_HIGH>; 4046da6327SBiju Das output-low; 4146da6327SBiju Das line-name = "can1_stb"; 4246da6327SBiju Das }; 4346da6327SBiju Das 4446da6327SBiju Das can1_pins: can1 { 4546da6327SBiju Das pinmux = <RZG2L_PORT_PINMUX(44, 0, 3)>, /* TxD */ 4646da6327SBiju Das <RZG2L_PORT_PINMUX(44, 1, 3)>; /* RxD */ 4746da6327SBiju Das }; 4846da6327SBiju Das#endif 4946da6327SBiju Das 5081a27b1fSBiju Das sd1-pwr-en-hog { 5181a27b1fSBiju Das gpio-hog; 5281a27b1fSBiju Das gpios = <RZG2L_GPIO(39, 2) GPIO_ACTIVE_HIGH>; 5381a27b1fSBiju Das output-high; 5481a27b1fSBiju Das line-name = "sd1_pwr_en"; 5581a27b1fSBiju Das }; 5681a27b1fSBiju Das 5781a27b1fSBiju Das sdhi1_pins: sd1 { 5881a27b1fSBiju Das sd1_data { 5981a27b1fSBiju Das pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3"; 6081a27b1fSBiju Das power-source = <3300>; 6181a27b1fSBiju Das }; 6281a27b1fSBiju Das 6381a27b1fSBiju Das sd1_ctrl { 6481a27b1fSBiju Das pins = "SD1_CLK", "SD1_CMD"; 6581a27b1fSBiju Das power-source = <3300>; 6681a27b1fSBiju Das }; 6781a27b1fSBiju Das 6881a27b1fSBiju Das sd1_mux { 6981a27b1fSBiju Das pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */ 7081a27b1fSBiju Das }; 7181a27b1fSBiju Das }; 7281a27b1fSBiju Das 7381a27b1fSBiju Das sdhi1_pins_uhs: sd1_uhs { 7481a27b1fSBiju Das sd1_data_uhs { 7581a27b1fSBiju Das pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3"; 7681a27b1fSBiju Das power-source = <1800>; 7781a27b1fSBiju Das }; 7881a27b1fSBiju Das 7981a27b1fSBiju Das sd1_ctrl_uhs { 8081a27b1fSBiju Das pins = "SD1_CLK", "SD1_CMD"; 8181a27b1fSBiju Das power-source = <1800>; 8281a27b1fSBiju Das }; 8381a27b1fSBiju Das 8481a27b1fSBiju Das sd1_mux_uhs { 8581a27b1fSBiju Das pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */ 8681a27b1fSBiju Das }; 8781a27b1fSBiju Das }; 8881a27b1fSBiju Das 89ce0c63b6SBiju Das sound_clk_pins: sound_clk { 90ce0c63b6SBiju Das pins = "AUDIO_CLK1", "AUDIO_CLK2"; 91ce0c63b6SBiju Das input-enable; 92ce0c63b6SBiju Das }; 93ce0c63b6SBiju Das}; 94ce0c63b6SBiju Das 95