1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the HiHope RZ/G2[MN] main board common parts 4 * 5 * Copyright (C) 2019 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/gpio/gpio.h> 9 10/ { 11 aliases { 12 serial0 = &scif2; 13 }; 14 15 chosen { 16 bootargs = "ignore_loglevel"; 17 stdout-path = "serial0:115200n8"; 18 }; 19 20 reg_1p8v: regulator0 { 21 compatible = "regulator-fixed"; 22 regulator-name = "fixed-1.8V"; 23 regulator-min-microvolt = <1800000>; 24 regulator-max-microvolt = <1800000>; 25 regulator-boot-on; 26 regulator-always-on; 27 }; 28 29 reg_3p3v: regulator1 { 30 compatible = "regulator-fixed"; 31 regulator-name = "fixed-3.3V"; 32 regulator-min-microvolt = <3300000>; 33 regulator-max-microvolt = <3300000>; 34 regulator-boot-on; 35 regulator-always-on; 36 }; 37 38 vbus0_usb2: regulator-vbus0-usb2 { 39 compatible = "regulator-fixed"; 40 41 regulator-name = "USB20_VBUS0"; 42 regulator-min-microvolt = <5000000>; 43 regulator-max-microvolt = <5000000>; 44 45 gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>; 46 enable-active-high; 47 }; 48 49 vccq_sdhi0: regulator-vccq-sdhi0 { 50 compatible = "regulator-gpio"; 51 52 regulator-name = "SDHI0 VccQ"; 53 regulator-min-microvolt = <1800000>; 54 regulator-max-microvolt = <3300000>; 55 56 gpios = <&gpio6 30 GPIO_ACTIVE_HIGH>; 57 gpios-states = <1>; 58 states = <3300000 1 59 1800000 0>; 60 }; 61}; 62 63&ehci0 { 64 status = "okay"; 65}; 66 67&ehci1 { 68 status = "okay"; 69}; 70 71&extal_clk { 72 clock-frequency = <16666666>; 73}; 74 75&extalr_clk { 76 clock-frequency = <32768>; 77}; 78 79&gpio6 { 80 usb1-reset { 81 gpio-hog; 82 gpios = <10 GPIO_ACTIVE_LOW>; 83 output-low; 84 line-name = "usb1-reset"; 85 }; 86}; 87 88&hsusb { 89 dr_mode = "otg"; 90 status = "okay"; 91}; 92 93&ohci0 { 94 status = "okay"; 95}; 96 97&ohci1 { 98 status = "okay"; 99}; 100 101&pcie_bus_clk { 102 clock-frequency = <100000000>; 103}; 104 105&pfc { 106 pinctrl-0 = <&scif_clk_pins>; 107 pinctrl-names = "default"; 108 109 scif2_pins: scif2 { 110 groups = "scif2_data_a"; 111 function = "scif2"; 112 }; 113 114 scif_clk_pins: scif_clk { 115 groups = "scif_clk_a"; 116 function = "scif_clk"; 117 }; 118 119 sdhi0_pins: sd0 { 120 groups = "sdhi0_data4", "sdhi0_ctrl"; 121 function = "sdhi0"; 122 power-source = <3300>; 123 }; 124 125 sdhi0_pins_uhs: sd0_uhs { 126 groups = "sdhi0_data4", "sdhi0_ctrl"; 127 function = "sdhi0"; 128 power-source = <1800>; 129 }; 130 131 sdhi3_pins: sd3 { 132 groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds"; 133 function = "sdhi3"; 134 power-source = <1800>; 135 }; 136 137 usb0_pins: usb0 { 138 groups = "usb0"; 139 function = "usb0"; 140 }; 141 142 usb1_pins: usb1 { 143 mux { 144 groups = "usb1"; 145 function = "usb1"; 146 }; 147 148 ovc { 149 pins = "GP_6_27"; 150 bias-pull-up; 151 }; 152 }; 153}; 154 155&rwdt { 156 timeout-sec = <60>; 157 status = "okay"; 158}; 159 160&scif2 { 161 pinctrl-0 = <&scif2_pins>; 162 pinctrl-names = "default"; 163 164 status = "okay"; 165}; 166 167&scif_clk { 168 clock-frequency = <14745600>; 169}; 170 171&sdhi0 { 172 pinctrl-0 = <&sdhi0_pins>; 173 pinctrl-1 = <&sdhi0_pins_uhs>; 174 pinctrl-names = "default", "state_uhs"; 175 176 vmmc-supply = <®_3p3v>; 177 vqmmc-supply = <&vccq_sdhi0>; 178 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; 179 bus-width = <4>; 180 sd-uhs-sdr50; 181 sd-uhs-sdr104; 182 status = "okay"; 183}; 184 185&sdhi3 { 186 pinctrl-0 = <&sdhi3_pins>; 187 pinctrl-1 = <&sdhi3_pins>; 188 pinctrl-names = "default", "state_uhs"; 189 190 vmmc-supply = <®_3p3v>; 191 vqmmc-supply = <®_1p8v>; 192 bus-width = <8>; 193 mmc-hs200-1_8v; 194 non-removable; 195 fixed-emmc-driver-type = <1>; 196}; 197 198&usb_extal_clk { 199 clock-frequency = <50000000>; 200}; 201 202&usb2_phy0 { 203 pinctrl-0 = <&usb0_pins>; 204 pinctrl-names = "default"; 205 206 vbus-supply = <&vbus0_usb2>; 207 status = "okay"; 208}; 209 210&usb2_phy1 { 211 pinctrl-0 = <&usb1_pins>; 212 pinctrl-names = "default"; 213 214 status = "okay"; 215}; 216