1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Common Board Device Tree for 4 * Microsoft Mobile MSM8994 Octagon Platforms 5 * 6 * Copyright (c) 2020, Konrad Dybcio 7 * Copyright (c) 2020, Gustave Monce <gustave.monce@outlook.com> 8 */ 9 10#include "pm8994.dtsi" 11#include "pmi8994.dtsi" 12#include <dt-bindings/gpio/gpio.h> 13#include <dt-bindings/input/gpio-keys.h> 14#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 15 16/* 17 * Delete all generic (msm8994.dtsi) reserved 18 * memory mappings which are different in this device. 19 */ 20/delete-node/ &adsp_mem; 21/delete-node/ &audio_mem; 22/delete-node/ &cont_splash_mem; 23/delete-node/ &mba_mem; 24/delete-node/ &mpss_mem; 25/delete-node/ &peripheral_region; 26/delete-node/ &rmtfs_mem; 27/delete-node/ &smem_mem; 28 29/ { 30 /* 31 * Most Lumia 950/XL users use GRUB to load their kernels, 32 * hence there is no need for msm-id and friends. 33 */ 34 35 /* 36 * This enables graphical output via bootloader-enabled display. 37 * acpi=no is required due to WP platforms having ACPI support, but 38 * only for Windows-based OSes. 39 */ 40 chosen { 41 bootargs = "earlycon=efifb console=efifb acpi=no"; 42 43 #address-cells = <2>; 44 #size-cells = <2>; 45 ranges; 46 }; 47 48 gpio-keys { 49 compatible = "gpio-keys"; 50 input-name = "gpio-keys"; 51 autorepeat; 52 53 volupkey { 54 label = "Volume Up"; 55 gpios = <&pm8994_gpios 3 GPIO_ACTIVE_LOW>; 56 linux,input-type = <1>; 57 linux,code = <KEY_VOLUMEUP>; 58 wakeup-source; 59 debounce-interval = <15>; 60 }; 61 62 camsnapkey { 63 label = "Camera Snapshot"; 64 gpios = <&pm8994_gpios 4 GPIO_ACTIVE_LOW>; 65 linux,input-type = <1>; 66 linux,code = <KEY_CAMERA>; 67 wakeup-source; 68 debounce-interval = <15>; 69 }; 70 71 camfocuskey { 72 label = "Camera Focus"; 73 gpios = <&pm8994_gpios 5 GPIO_ACTIVE_LOW>; 74 linux,input-type = <1>; 75 linux,code = <KEY_VOLUMEUP>; 76 wakeup-source; 77 debounce-interval = <15>; 78 }; 79 }; 80 81 gpio-hall-sensor { 82 compatible = "gpio-keys"; 83 84 pinctrl-names = "default"; 85 pinctrl-0 = <&hall_front_default &hall_back_default>; 86 87 label = "GPIO Hall Effect Sensor"; 88 89 hall-front-sensor { 90 label = "Hall Effect Front Sensor"; 91 gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>; 92 linux,input-type = <EV_SW>; 93 linux,code = <SW_LID>; 94 linux,can-disable; 95 }; 96 97 hall-back-sensor { 98 label = "Hall Effect Back Sensor"; 99 gpios = <&tlmm 75 GPIO_ACTIVE_HIGH>; 100 linux,input-type = <EV_SW>; 101 linux,code = <SW_MACHINE_COVER>; 102 linux,can-disable; 103 }; 104 }; 105 106 reserved-memory { 107 /* 108 * This device being a WP platform has a very different 109 * memory layout than other Android based devices. 110 * This memory layout is directly copied from the original 111 * device UEFI firmware, and adapted based on observations 112 * using JTAG for the Qualcomm Peripheral Image regions. 113 */ 114 115 uefi_mem: memory@200000 { 116 reg = <0 0x200000 0 0x100000>; 117 no-map; 118 }; 119 120 mppark_mem: memory@300000 { 121 reg = <0 0x300000 0 0x80000>; 122 no-map; 123 }; 124 125 fbpt_mem: memory@380000 { 126 reg = <0 0x380000 0 0x1000>; 127 no-map; 128 }; 129 130 dbg2_mem: memory@381000 { 131 reg = <0 0x381000 0 0x4000>; 132 no-map; 133 }; 134 135 capsule_mem: memory@385000 { 136 reg = <0 0x385000 0 0x1000>; 137 no-map; 138 }; 139 140 tpmctrl_mem: memory@386000 { 141 reg = <0 0x386000 0 0x3000>; 142 no-map; 143 }; 144 145 uefiinfo_mem: memory@389000 { 146 reg = <0 0x389000 0 0x1000>; 147 no-map; 148 }; 149 150 reset_mem: memory@389000 { 151 reg = <0 0x389000 0 0x1000>; 152 no-map; 153 }; 154 155 resuncached_mem: memory@38e000 { 156 reg = <0 0x38e000 0 0x72000>; 157 no-map; 158 }; 159 160 disp_mem: memory@400000 { 161 reg = <0 0x400000 0 0x800000>; 162 no-map; 163 }; 164 165 uefistack_mem: memory@c00000 { 166 reg = <0 0xc00000 0 0x40000>; 167 no-map; 168 }; 169 170 cpuvect_mem: memory@c40000 { 171 reg = <0 0xc40000 0 0x10000>; 172 no-map; 173 }; 174 175 rescached_mem: memory@400000 { 176 reg = <0 0xc50000 0 0xb0000>; 177 no-map; 178 }; 179 180 tzapps_mem: memory@6500000 { 181 reg = <0 0x6500000 0 0x500000>; 182 no-map; 183 }; 184 185 smem_mem: memory@6a00000 { 186 reg = <0 0x6a00000 0 0x200000>; 187 no-map; 188 }; 189 190 hyp_mem: memory@6c00000 { 191 reg = <0 0x6c00000 0 0x100000>; 192 no-map; 193 }; 194 195 tz_mem: memory@6d00000 { 196 reg = <0 0x6d00000 0 0x160000>; 197 no-map; 198 }; 199 200 rfsa_adsp_mem: memory@6e60000 { 201 reg = <0 0x6e60000 0 0x10000>; 202 no-map; 203 }; 204 205 rfsa_mpss_mem: memory@6e70000 { 206 compatible = "qcom,rmtfs-mem"; 207 reg = <0 0x6e70000 0 0x10000>; 208 no-map; 209 210 qcom,client-id = <1>; 211 }; 212 213 /* 214 * Value obtained from the device original ACPI DSDT table 215 * MPSS_EFS / SBL 216 */ 217 mba_mem: memory@6e80000 { 218 reg = <0 0x6e80000 0 0x180000>; 219 no-map; 220 }; 221 222 /* 223 * Peripheral Image loader region begin! 224 * The region reserved for pil is 0x7000000-0xef00000 225 */ 226 227 mpss_mem: memory@7000000 { 228 reg = <0 0x7000000 0 0x5a00000>; 229 no-map; 230 }; 231 232 adsp_mem: memory@ca00000 { 233 reg = <0 0xca00000 0 0x1800000>; 234 no-map; 235 }; 236 237 venus_mem: memory@e200000 { 238 reg = <0 0xe200000 0 0x500000>; 239 no-map; 240 }; 241 242 pil_metadata_mem: memory@e700000 { 243 reg = <0 0xe700000 0 0x4000>; 244 no-map; 245 }; 246 247 memory@e704000 { 248 reg = <0 0xe704000 0 0x7fc000>; 249 no-map; 250 }; 251 /* Peripheral Image loader region end */ 252 253 cnss_mem: memory@ef00000 { 254 reg = <0 0xef00000 0 0x300000>; 255 no-map; 256 }; 257 }; 258}; 259 260&blsp1_i2c1 { 261 status = "okay"; 262 263 rmi4-i2c-dev@4b { 264 compatible = "syna,rmi4-i2c"; 265 reg = <0x4b>; 266 #address-cells = <1>; 267 #size-cells = <0>; 268 269 interrupt-parent = <&tlmm>; 270 interrupts = <77 IRQ_TYPE_EDGE_FALLING>; 271 272 rmi4-f01@1 { 273 reg = <0x01>; 274 syna,nosleep-mode = <1>; 275 }; 276 277 rmi4-f12@12 { 278 reg = <0x12>; 279 syna,sensor-type = <1>; 280 syna,clip-x-low = <0>; 281 syna,clip-x-high = <1440>; 282 syna,clip-y-low = <0>; 283 syna,clip-y-high = <2560>; 284 }; 285 }; 286}; 287 288&blsp1_uart2 { 289 status = "okay"; 290}; 291 292&blsp2_uart2 { 293 status = "okay"; 294}; 295 296&pmi8994_spmi_regulators { 297 vdd_gfx: s2@1700 { 298 reg = <0x1700 0x100>; 299 regulator-min-microvolt = <980000>; 300 regulator-max-microvolt = <980000>; 301 }; 302}; 303 304&rpm_requests { 305 /* These values were taken from the original firmware ACPI tables */ 306 pm8994_regulators: pm8994-regulators { 307 compatible = "qcom,rpm-pm8994-regulators"; 308 309 vdd_s1-supply = <&vph_pwr>; 310 vdd_s2-supply = <&vph_pwr>; 311 vdd_s3-supply = <&vph_pwr>; 312 vdd_s4-supply = <&vph_pwr>; 313 vdd_s5-supply = <&vph_pwr>; 314 vdd_s6-supply = <&vph_pwr>; 315 vdd_s7-supply = <&vph_pwr>; 316 vdd_s8-supply = <&vph_pwr>; 317 vdd_s9-supply = <&vph_pwr>; 318 vdd_s10-supply = <&vph_pwr>; 319 vdd_s11-supply = <&vph_pwr>; 320 vdd_s12-supply = <&vph_pwr>; 321 vdd_l1-supply = <&vreg_s1b_1p0>; 322 vdd_l2_l26_l28-supply = <&vreg_s3a_1p3>; 323 vdd_l3_l11-supply = <&vreg_s3a_1p3>; 324 vdd_l4_l27_l31-supply = <&vreg_s3a_1p3>; 325 vdd_l5_l7-supply = <&vreg_s5a_2p15>; 326 vdd_l6_l12_l32-supply = <&vreg_s5a_2p15>; 327 vdd_l8_l16_l30-supply = <&vph_pwr>; 328 vdd_l9_l10_l18_l22-supply = <&vph_pwr_bbyp>; 329 vdd_l13_l19_l23_l24-supply = <&vph_pwr_bbyp>; 330 vdd_l14_l15-supply = <&vreg_s5a_2p15>; 331 vdd_l17_l29-supply = <&vph_pwr_bbyp>; 332 vdd_l20_l21-supply = <&vph_pwr_bbyp>; 333 vdd_l25-supply = <&vreg_s5a_2p15>; 334 vdd_lvs1_2-supply = <&vreg_s4a_1p8>; 335 336 /* S1, S2, S6 and S12 are managed by RPMPD */ 337 338 vreg_s3a_1p3: s3 { 339 regulator-min-microvolt = <1300000>; 340 regulator-max-microvolt = <1300000>; 341 regulator-allow-set-load; 342 regulator-system-load = <300000>; 343 }; 344 345 vreg_s4a_1p8: s4 { 346 regulator-min-microvolt = <1800000>; 347 regulator-max-microvolt = <1800000>; 348 regulator-allow-set-load; 349 regulator-always-on; 350 regulator-system-load = <325000>; 351 }; 352 353 vreg_s5a_2p15: s5 { 354 regulator-min-microvolt = <2150000>; 355 regulator-max-microvolt = <2150000>; 356 regulator-allow-set-load; 357 regulator-system-load = <325000>; 358 }; 359 360 vreg_s7a_1p0: s7 { 361 regulator-min-microvolt = <1000000>; 362 regulator-max-microvolt = <1000000>; 363 }; 364 365 /* 366 * S8 - SPMI-managed VDD_APC0 367 * S9, S10 and S11 (the main one) - SPMI-managed VDD_APC1 368 */ 369 370 vreg_l1a_1p0: l1 { 371 regulator-min-microvolt = <1000000>; 372 regulator-max-microvolt = <1000000>; 373 }; 374 375 vreg_l2a_1p25: l2 { 376 regulator-min-microvolt = <1250000>; 377 regulator-max-microvolt = <1250000>; 378 regulator-allow-set-load; 379 regulator-system-load = <4160>; 380 }; 381 382 vreg_l3a_1p2: l3 { 383 regulator-min-microvolt = <1200000>; 384 regulator-max-microvolt = <1200000>; 385 regulator-always-on; 386 regulator-allow-set-load; 387 regulator-system-load = <80000>; 388 }; 389 390 vreg_l4a_1p225: l4 { 391 regulator-min-microvolt = <1225000>; 392 regulator-max-microvolt = <1225000>; 393 }; 394 395 /* L5 is inaccessible from RPM */ 396 397 vreg_l6a_1p8: l6 { 398 regulator-min-microvolt = <1800000>; 399 regulator-max-microvolt = <1800000>; 400 regulator-allow-set-load; 401 regulator-system-load = <1000>; 402 }; 403 404 /* L7 is inaccessible from RPM */ 405 406 vreg_l8a_1p8: l8 { 407 regulator-min-microvolt = <1800000>; 408 regulator-max-microvolt = <1800000>; 409 }; 410 411 vreg_l9a_1p8: l9 { 412 regulator-min-microvolt = <1800000>; 413 regulator-max-microvolt = <1800000>; 414 }; 415 416 vreg_l10a_1p8: l10 { 417 regulator-min-microvolt = <1800000>; 418 regulator-max-microvolt = <1800000>; 419 }; 420 421 vreg_l11a_1p2: l11 { 422 regulator-min-microvolt = <1200000>; 423 regulator-max-microvolt = <1200000>; 424 regulator-always-on; 425 regulator-allow-set-load; 426 regulator-system-load = <35000>; 427 }; 428 429 vreg_l12a_1p8: l12 { 430 regulator-min-microvolt = <1800000>; 431 regulator-max-microvolt = <1800000>; 432 regulator-always-on; 433 regulator-allow-set-load; 434 regulator-system-load = <50000>; 435 }; 436 437 vreg_l13a_2p95: l13 { 438 regulator-min-microvolt = <1850000>; 439 regulator-max-microvolt = <2950000>; 440 regulator-always-on; 441 regulator-allow-set-load; 442 regulator-system-load = <22000>; 443 }; 444 445 vreg_l14a_1p8: l14 { 446 regulator-min-microvolt = <1800000>; 447 regulator-max-microvolt = <1800000>; 448 regulator-always-on; 449 regulator-allow-set-load; 450 regulator-system-load = <52000>; 451 }; 452 453 vreg_l15a_1p8: l15 { 454 regulator-min-microvolt = <1800000>; 455 regulator-max-microvolt = <1800000>; 456 }; 457 458 vreg_l16a_2p7: l16 { 459 regulator-min-microvolt = <2700000>; 460 regulator-max-microvolt = <2700000>; 461 }; 462 463 vreg_l17a_2p7: l17 { 464 regulator-min-microvolt = <2800000>; 465 regulator-max-microvolt = <2800000>; 466 regulator-always-on; 467 regulator-allow-set-load; 468 regulator-system-load = <300000>; 469 }; 470 471 vreg_l18a_2p85: l18 { 472 regulator-min-microvolt = <2850000>; 473 regulator-max-microvolt = <2850000>; 474 regulator-always-on; 475 regulator-allow-set-load; 476 regulator-system-load = <600000>; 477 }; 478 479 vreg_l19a_3p3: l19 { 480 regulator-min-microvolt = <3300000>; 481 regulator-max-microvolt = <3300000>; 482 regulator-always-on; 483 regulator-allow-set-load; 484 regulator-system-load = <500000>; 485 }; 486 487 vreg_l20a_2p95: l20 { 488 regulator-min-microvolt = <2950000>; 489 regulator-max-microvolt = <2950000>; 490 regulator-always-on; 491 regulator-boot-on; 492 regulator-allow-set-load; 493 regulator-system-load = <570000>; 494 }; 495 496 vreg_l21a_2p95: l21 { 497 regulator-min-microvolt = <2950000>; 498 regulator-max-microvolt = <2950000>; 499 regulator-always-on; 500 regulator-allow-set-load; 501 regulator-system-load = <800000>; 502 }; 503 504 vreg_l22a_3p0: l22 { 505 regulator-min-microvolt = <3000000>; 506 regulator-max-microvolt = <3000000>; 507 regulator-always-on; 508 regulator-allow-set-load; 509 regulator-system-load = <150000>; 510 }; 511 512 vreg_l23a_2p8: l23 { 513 regulator-min-microvolt = <2850000>; 514 regulator-max-microvolt = <2850000>; 515 regulator-always-on; 516 regulator-allow-set-load; 517 regulator-system-load = <80000>; 518 }; 519 520 vreg_l24a_3p075: l24 { 521 regulator-min-microvolt = <3075000>; 522 regulator-max-microvolt = <3150000>; 523 regulator-allow-set-load; 524 regulator-system-load = <5800>; 525 }; 526 527 vreg_l25a_1p1: l25 { 528 regulator-min-microvolt = <1150000>; 529 regulator-max-microvolt = <1150000>; 530 regulator-always-on; 531 regulator-allow-set-load; 532 regulator-system-load = <80000>; 533 }; 534 535 vreg_l26a_1p0: l26 { 536 regulator-min-microvolt = <1000000>; 537 regulator-max-microvolt = <1000000>; 538 }; 539 540 vreg_l27a_1p05: l27 { 541 regulator-min-microvolt = <1000000>; 542 regulator-max-microvolt = <1000000>; 543 regulator-always-on; 544 regulator-allow-set-load; 545 regulator-system-load = <500000>; 546 }; 547 548 vreg_l28a_1p0: l28 { 549 regulator-min-microvolt = <1000000>; 550 regulator-max-microvolt = <1000000>; 551 regulator-always-on; 552 regulator-allow-set-load; 553 regulator-system-load = <26000>; 554 }; 555 556 vreg_l29a_2p8: l29 { 557 regulator-min-microvolt = <2850000>; 558 regulator-max-microvolt = <2850000>; 559 regulator-always-on; 560 regulator-allow-set-load; 561 regulator-system-load = <80000>; 562 }; 563 564 vreg_l30a_1p8: l30 { 565 regulator-min-microvolt = <1800000>; 566 regulator-max-microvolt = <1800000>; 567 regulator-always-on; 568 regulator-allow-set-load; 569 regulator-system-load = <2500>; 570 }; 571 572 vreg_l31a_1p2: l31 { 573 regulator-min-microvolt = <1200000>; 574 regulator-max-microvolt = <1200000>; 575 regulator-always-on; 576 regulator-allow-set-load; 577 regulator-system-load = <600000>; 578 }; 579 580 vreg_l32a_1p8: l32 { 581 regulator-min-microvolt = <1800000>; 582 regulator-max-microvolt = <1800000>; 583 }; 584 585 vreg_lvs1a_1p8: lvs1 { }; 586 587 vreg_lvs2a_1p8: lvs2 { }; 588 }; 589 590 pmi8994_regulators: pmi8994-regulators { 591 compatible = "qcom,rpm-pmi8994-regulators"; 592 593 vdd_s1-supply = <&vph_pwr>; 594 vdd_bst_byp-supply = <&vph_pwr>; 595 596 vreg_s1b_1p0: s1 { 597 regulator-min-microvolt = <1025000>; 598 regulator-max-microvolt = <1025000>; 599 }; 600 601 /* S2 & S3 - VDD_GFX */ 602 603 vph_pwr_bbyp: boost-bypass { 604 regulator-min-microvolt = <3300000>; 605 regulator-max-microvolt = <3300000>; 606 }; 607 }; 608}; 609 610&sdhc1 { 611 status = "okay"; 612}; 613 614&tlmm { 615 hall_front_default: hall-front-default { 616 pins = "gpio42"; 617 function = "gpio"; 618 drive-strength = <2>; 619 bias-disable; 620 }; 621 622 hall_back_default: hall-back-default { 623 pins = "gpio75"; 624 function = "gpio"; 625 drive-strength = <2>; 626 bias-disable; 627 }; 628}; 629